Thin-film transistor (TFT) devices composed of metal oxide semiconductors have attracted tremendous research attention globally in recent years. Owing to their ability to offer mobility, metal oxide semiconductor materials can enable high-performance...
In this work, three-dimensional modeling of the surface potential along the cylindrical surrounding double-gate (CSDG) MOSFET is proposed. The derived surface potential is used to predict the values of electron mobility along the length of the device...
An analytical surface-potential-based drain current model for amorphous indium–gallium–zinc–oxide (a-InGaZnO) thin film transistors (TFTs) is proposed by introducing an effective charge density approach in this paper. This approach gives two initial...
In this study, the initial electrical properties, positive gate bias stress (PBS), and drain current stress (DCS)-induced instabilities of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) with various active layer thicknesses...
The transconductance-to-drain-current method is a transistor sizing methodology that is commonly used in CMOS technology. In this study, we explored by means of simulations, a case of study and three figures of merit used for the method, and we concl...
This paper reports a detailed analysis of the drain current modulation of a single-drain normal-gate n channel metal-oxide semiconductor field effect transistor (n-MOSFET) under an on-chip magnetic field. A single-drain n-MOSFET has been fabricated a...
Polycrystalline silicon (poly-Si) thin film transistors (TFT) with a tri-gate fin-like structure and wide drain were designed and simulated to improve gate-induced drain leakage (GIDL), ON-state current, and breakdown voltage. The GIDL of fin-like TF...
A novel concept of drain current modelling in rectangular normal MOS transistors with the Lorentz force has been proposed for the first time. The single-drain MOS transistor is qualified as a magnetic sensor. To create the Lorentz force, a DC loop cu...
Thin film transistors (TFTs) fabricated on flexible and large area substrates have been studied with great interest due to their future applications. Recent studies have developed new semiconductors such as a-SiGe:H for fabrication of high performanc...
Silicon german ium (SiGe) has attracted significant attention for applications in the source/drain (S/D) regions of p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs). However, in SiGe, as the Ge concentration increases, high-densi...
Doing internships is increasingly common in Portugal, often being regarded as a prerequisite for entering the labour market. This trend reinforces the need to understand the interns’ perception of the ideal characteristics for this type of expe...
This paper presents an electrical thermometry method designed for kilowatt(kW)-level Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). The dependence of the drain current on the channel temperature in GaN HEMTs is utilized as a means...
A low leakage poly-Si thin film transistor (TFT) is proposed featuring hydrogenated amorphous silicon (a-Si:H) buffer layer and source/drain extension (SDE) by using technology computer aided design (TCAD) simulation. This architecture reduces off-cu...
Sub-harmonic oscillations are a key stability concern in fast-switched inductor power supplies using clocked constant-period peak/valley-current loops. Using generalized models, IC designers can predict and suppress sub-harmonic oscillations with min...
This work primarily focuses on the degradation degree of bulk current (IB) for 28 nm stacked high-k (HK) n-channel metal–oxide–semiconductor field-effect transistors (MOSFETs), sensed and stressed with the channel-hot-carrier test and the...
This paper proposes a cross-scale simulation approach for evaluating the steady-state electrothermal performance of power MOSFETs at the device–package–heatsink–board (DPHB) level. A co-simulation framework is designed by employing...
To improve the on-state current and reduce the miller capacitance of the conventional junction-less tunneling field effect transistor (JLTFET), the junction-less TFET with Ge/Si0.3Ge0.7/Si heterojunction and heterogeneous gate dielectric (H-JLTFET) i...
A single unified analytical model is presented to predict the shot noise for both the source-to-drain (SD) and the gate tunneling current in sub-10 nm MOSFETs with ultrathin oxide. Based on the Landauer formula, the model is constructed from the sequ...
In this study, a novel low impact ionization rate (low-IIR) poly-Si thin film transistor featuring a current and electric field split (CES) structure with bottom field plate (BFP) and partial thicker channel raised source/drain (RSD) designs is propo...
In this study, the nonlinearity characteristics of bilayer graphene field-effect transistors (Bi-GFETs) are analyzed by using a small-signal equivalent circuit. The static nonlinearity is determined by applying mathematical operation on the drain cur...
Single-event effects (SEE) are an important index of radiation resistance for fully depleted silicon on insulator (FDSOI) devices. The research into traditional FDSOI devices is based on simulation software, which is time consuming, requires a large...
In this paper, a novel tunnel field-effect transistor (TFET) has been demonstrated. The proposed TFET features a SiGe channel, a fin structure and an elevated drain to improve its electrical performance. As a result, it shows high-level ON-state curr...
The device structure of DLTFET is optimized by the Silvaco TCAD software to solve the problems of lower on-state current and larger miller capacitance of traditional doping-less tunneling field effect transistors (DLTFETs), and the performance can be...
Low-refresh-rate driving is an effective way to reduce the power consumption of active-matrix organic light-emitting diode (AMOLED) displays. However, in conventional low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) pixel cir...
As semiconductor devices approach the sub-10 nm technology node, the self-heating effect (SHE) induced by confined geometries (e.g., FinFETs and nanosheet FETs) has emerged as a critical bottleneck affecting both performance and reliability. This cha...
The buffer and surface trapping effects on low-frequency (LF) Y-parameters of Fe-doped AlGaN/GaN high-electron mobility transistors (HEMTs) are analyzed through experimental and simulation studies. The drain current transient (DCT) characterization i...
In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in ter...
The practical use of tunnel field-effect transistors is retarded by the low on-state current. In this paper, the energy-band engineering of InAs/Si heterojunction and novel device structure of source-pocket concept are combined in a single tunnel fie...
In this paper, we propose a new buried channel array transistor structure to solve the problem of current leakage occurring in the capacitors of dynamic random-access memory (DRAM) cells. This structure has a superior off current performance compared...
In this paper we present a systematic approach to sort out different types of random telegraph noises (RTN) in CMOS image sensors (CIS) by examining their dependencies on the transfer gate off-voltage, the reset gate off-voltage, the photodiode integ...
Deprotonation-induced conductivity shift of poly(3,4-ethylenedixoythiophene)s (PEDOTs) in aqueous solutions is a promising platform for chemical or biological sensor due to its large signal output and minimum effect from material morphology. Carboxyl...
Nephrogenic diabetes insipidus (NDI), which can be congenital or acquired, results from the failure of the kidney to respond to the anti-diuretic hormone (ADH). This will lead to excessive water loss from the body in the form of urine. The kidney, th...
In this work, we report on AlGaN/GaN HEMT sensors for acetone concentration below
This work studies the impact of different physical and material parameters on the channel resistance,
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The global variability of ultra-thin body and buried oxide (UTBB) MOSFETs in subthreshold and off regimes of operation is analyzed. The variability of the off-state drain current, subthreshold slope, drain-induced barrier lowering (DIBL), gate leakag...
We identify correlation between the drain currents in pristine n-channel FinFET transistors and changes in time-0 currents induced by hot-carrier stress. To achieve this goal, we employ our statistical simulation model for hot-carrier degradation (HC...
Silicon carbide (SiC) MOSFETs exhibit superior performance compared to traditional silicon (Si) MOSFETs, characterized by faster switching speeds, lower on-resistance, higher breakdown voltage, and greater operational temperature tolerance. These att...
A current improved and electric field reduced double-gate (DG) polycrystalline silicon thin-film transistor with two-step source/drain (DGTSD-TFT) design is proposed and demonstrated in this study. The two-step source/drain (TSD) design, which consis...
One major concern of channel engineering in nanotransistors is the coupling of the conduction channel to the source/drain contacts. In a number of previous publications, we have developed a semiempirical quantum model in quantitative agreement with t...
The aim of this paper is to model the effects of threading dislocations on both gate and drain currents of AlGaN/GaN high electron mobility transistors (HEMTs). The fraction of filled traps increases with the threading dislocations, while the trappin...
Tunnel field-effect transistor (Tunnel FET) with asymmetric spacer is proposed to obtain high on-current and reduced inverter delay simultaneously. In order to analyze the proposed Tunnel FET, electrical characteristics are evaluated by technology co...
In this paper, we propose and investigate an electrically doped (ED) PNPN tunnel field effect transistor (FET), in which the drain side tunneling barrier width is effectively controlled to obtain a suppressed ambipolar current. We present that the pr...
We present technology computer aided design (TCAD) results for wide band-gap Sn-doped α-Ga2O3 metal–semiconductor field-effect transistors (MESFETs). In particular, the effect of gate work function and electrode gap length on the electric...
Due to the influence of parasitic internal parameters and junction capacitance, the silicon carbide (SiC) power devices are frequently marred by significant overshoots in current and voltage, as well as high-frequency oscillations during the switchin...
In this work, conventional and drain offset junctionless (JL) finlike thin-film transistors (FinTFTs) with and without extended gate field plate (E-GFP) are fabricated. Drain offset JL FinTFTs showed a higher breakdown voltage than that of the conven...
This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene cha...
An organic ferroelectric capacitor, using polyvinylidene difluoride (PVDF) as the dielectric, was fabricated. By connecting the PVDF capacitor in series to the gate of a commercially purchased metal-oxide–semiconductor field-effect transistor (...
Intra-abdominal infections (IAI) are common in hospitalized patients, both in and outside of the intensive care unit. Management principles include antimicrobial therapy and source control. Typically, these infections are polymicrobial, and intra-ope...
The bit density is generally increased by stacking more layers in 3D NAND Flash. Gate-induced drain leakage (GIDL) erase is a critical enabler in the future development of 3D NAND Flash. The relationship between the drain-to-body potential (Vdb) of G...
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