Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
Abstract
:1. Introduction
2. Device Structure
3. Results and Discussion
4. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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Kim, Y.K.; Lee, J.S.; Kim, G.; Park, T.; Kim, H.J.; Cho, Y.P.; Park, Y.J.; Lee, M.J. Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors. Electronics 2019, 8, 8. https://doi.org/10.3390/electronics8010008
Kim YK, Lee JS, Kim G, Park T, Kim HJ, Cho YP, Park YJ, Lee MJ. Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors. Electronics. 2019; 8(1):8. https://doi.org/10.3390/electronics8010008
Chicago/Turabian StyleKim, Young Kwon, Jin Sung Lee, Geon Kim, Taesik Park, Hui Jung Kim, Young Pyo Cho, Young June Park, and Myoung Jin Lee. 2019. "Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors" Electronics 8, no. 1: 8. https://doi.org/10.3390/electronics8010008