Electronics

Editorial

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3 pages, 144 KiB

Open AccessEditorial

Nanoelectronic Materials, Devices and Modeling: Current Research Trends

by Hao Zhu and Qiliang Li

Electronics 2019, 8(5), 564; https://doi.org/10.3390/electronics8050564 - 22 May 2019

Cited by 4 | Viewed by 2869

Abstract

As CMOS scaling is approaching the fundamental physical limits, a wide range of new nanoelectronic materials and devices have been proposed and explored to extend and/or replace the current electronic devices and circuits so as to maintain progress in speed and integration density [...] Read more.

As CMOS scaling is approaching the fundamental physical limits, a wide range of new nanoelectronic materials and devices have been proposed and explored to extend and/or replace the current electronic devices and circuits so as to maintain progress in speed and integration density [...] Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

Research

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13 pages, 3852 KiB

Open AccessArticle

Gallium Nitride Normally-Off Vertical Field-Effect Transistor Featuring an Additional Back Current Blocking Layer Structure

by Huolin Huang, Feiyu Li, Zhonghao Sun, Nan Sun, Feng Zhang, Yaqing Cao, Hui Zhang and Pengcheng Tao

Electronics 2019, 8(2), 241; https://doi.org/10.3390/electronics8020241 - 20 Feb 2019

Cited by 8 | Viewed by 6100

Abstract

A gallium nitride (GaN) semiconductor vertical field-effect transistor (VFET) has several attractive advantages such as high power density capability and small device size. Currently, some of the main issues hindering its development include the realization of normally off operation and the improvement of [...] Read more.

A gallium nitride (GaN) semiconductor vertical field-effect transistor (VFET) has several attractive advantages such as high power density capability and small device size. Currently, some of the main issues hindering its development include the realization of normally off operation and the improvement of high breakdown voltage (BV) characteristics. In this work, a trenched-gate scheme is employed to realize the normally off VFET. Meanwhile, an additional back current blocking layer (BCBL) is proposed and inserted into the GaN normally off VFET to improve the device performance. The electrical characteristics of the proposed device (called BCBL-VFET) are investigated systematically and the structural parameters are optimized through theoretical calculations and TCAD simulations. We demonstrate that the BCBL-VFET exhibits a normally off operation with a large positive threshold voltage of 3.5 V and an obviously increased BV of 1800 V owing to the uniform electric field distribution achieved around the gate region. However, the device only shows a small degradation of on-resistance (R_ON). The proposed scheme provides a useful reference for engineers in device fabrication work and will be promising for the applications of power electronics. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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8 pages, 1652 KiB

Open AccessFeature PaperArticle

Electron Affinity and Bandgap Optimization of Zinc Oxide for Improved Performance of ZnO/Si Heterojunction Solar Cell Using PC1D Simulations

by Babar Hussain, Aasma Aslam, Taj M Khan, Michael Creighton and Bahman Zohuri

Electronics 2019, 8(2), 238; https://doi.org/10.3390/electronics8020238 - 20 Feb 2019

Cited by 92 | Viewed by 12313

Abstract

For further uptake in the solar cell industry, n-ZnO/p-Si single heterojunction solar cell has attracted much attention of the research community in recent years. This paper reports the influence of bandgap and/or electron affinity tuning of zinc oxide on the performance of n-ZnO/p-Si [...] Read more.

For further uptake in the solar cell industry, n-ZnO/p-Si single heterojunction solar cell has attracted much attention of the research community in recent years. This paper reports the influence of bandgap and/or electron affinity tuning of zinc oxide on the performance of n-ZnO/p-Si single heterojunction photovoltaic cell using PC1D simulations. The simulation results reveal that the open circuit voltage and fill factor can be improved significantly by optimizing valence-band and conduction-band off-sets by engineering the bandgap and electron affinity of zinc oxide. An overall conversion efficiency of more than 20.3% can be achieved without additional cost or any change in device structure. It has been found that the improvement in efficiency is mainly due to reduction in conduction band offset that has a significant influence on minority carrier current. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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8 pages, 3075 KiB

Open AccessFeature PaperArticle

Nano-Particle VO₂ Insulator-Metal Transition Field-Effect Switch with 42 mV/decade Sub-Threshold Slope

by Massood Tabib-Azar and Rugved Likhite

Electronics 2019, 8(2), 151; https://doi.org/10.3390/electronics8020151 - 1 Feb 2019

Cited by 4 | Viewed by 3859

Abstract

The possibility of controlling the insulator-to-metal transition (IMT) in nano-particle VO₂ (NP-VO₂) using the electric field effect in a metal-oxide-VO₂ field-effect transistor (MOVFET) at room temperature was investigated for the first time. The IMT induced by current in NP-VO [...] Read more.

The possibility of controlling the insulator-to-metal transition (IMT) in nano-particle VO₂ (NP-VO₂) using the electric field effect in a metal-oxide-VO₂ field-effect transistor (MOVFET) at room temperature was investigated for the first time. The IMT induced by current in NP-VO₂ is a function of nano-particle size and was studied first using the conducting atomic force microscope (cAFM) current-voltage (I-V) measurements. NP-VO₂ switching threshold voltage (V_T), leakage current (I_leakage), and the sub-threshold slope of their conductivity (S_c) were all determined. The cAFM data had a large scatter. However, V_T increased as a function of particle height (h) approximately as V_T(V) = 0.034 h, while I_leakage decreased as a function of h approximately as I_leakage (A) = 3.4 × 10⁻⁸e^−h/9.1. Thus, an asymptotic leakage current of 34 nA at zero particle size and a tunneling (carrier) decay constant of ~9.1 nm were determined. S_c increased as a function of h approximately as S_c (mV/decade) = 2.1 × 10⁻³e^h/6 and was around 0.6 mV/decade at h~34 nm. MOVFETs composed of Pt drain, source and gate electrodes, HfO₂ gate oxide, and NP-VO₂ channels were then fabricated and showed gate voltage dependent drain-source switching voltage and current (I_DS). The subthreshold slope (S_t) of drain-source current (I_DS) varied from 42 mV/decade at V_G = −5 V to 54 mV/decade at V_G = +5 V. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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15 pages, 4816 KiB

Open AccessArticle

A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

by Taufiq Alif Kurniawan and Toshihiko Yoshimasu

Electronics 2019, 8(1), 69; https://doi.org/10.3390/electronics8010069 - 8 Jan 2019

Cited by 5 | Viewed by 5284

Abstract

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when [...] Read more.

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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14 pages, 771 KiB

Open AccessFeature PaperArticle

Determination of Complex Conductivity of Thin Strips with a Transmission Method

by Morteza Shahpari

Electronics 2019, 8(1), 21; https://doi.org/10.3390/electronics8010021 - 24 Dec 2018

Cited by 6 | Viewed by 3528

Abstract

Induced modes due to discontinuities inside the waveguide are dependent on the shape and material properties of the discontinuity. Reflection and transmission coefficients provide useful information about material properties of discontinuities inside the waveguide. A novel non-resonant procedure to measure the complex conductivity [...] Read more.

Induced modes due to discontinuities inside the waveguide are dependent on the shape and material properties of the discontinuity. Reflection and transmission coefficients provide useful information about material properties of discontinuities inside the waveguide. A novel non-resonant procedure to measure the complex conductivity of narrow strips is proposed in this paper. The sample is placed inside a rectangular waveguide which is excited by its fundamental mode. Reflection and transmission coefficients are calculated by the assistance of the Green’s functions and enforcing the boundary conditions. We show that resistivity only impacts one of the terms in the reflection coefficient. The competency of the method is demonstrated with a comparison of theoretic results and full wave modelling of method of moments and finite element methods. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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6 pages, 3441 KiB

Open AccessArticle

Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors

by Young Kwon Kim, Jin Sung Lee, Geon Kim, Taesik Park, Hui Jung Kim, Young Pyo Cho, Young June Park and Myoung Jin Lee

Electronics 2019, 8(1), 8; https://doi.org/10.3390/electronics8010008 - 21 Dec 2018

Cited by 10 | Viewed by 6842

Abstract

In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect [...] Read more.

In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slope (SS), and gate-induced drain leakage (GIDL). The proposed FinFET exhibited four times lower I_off than modified S-FinFET, called RFinFET, with more improved drain-induced barrier lowering (DIBL) characteristics, while minimizing I_on reduction compared to RFinFET. Our results also confirmed that the proposed device showed improved drain-induced barrier lowering (DIBL) and I_off characteristics as gate channel length decreased. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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11 pages, 2965 KiB

Open AccessArticle

AlGaN/GaN MIS-HEMT with PECVD SiN_x, SiON, SiO₂ as Gate Dielectric and Passivation Layer

by Kuiwei Geng, Ditao Chen, Quanbin Zhou and Hong Wang

Electronics 2018, 7(12), 416; https://doi.org/10.3390/electronics7120416 - 10 Dec 2018

Cited by 58 | Viewed by 10993

Abstract

Three different insulator layers SiN_x, SiON, and SiO₂ were used as a gate dielectric and passivation layer in AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMT). The SiN_x, SiON, and SiO₂ were deposited by a plasma-enhanced chemical vapor deposition (PECVD) [...] Read more.

Three different insulator layers SiN_x, SiON, and SiO₂ were used as a gate dielectric and passivation layer in AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMT). The SiN_x, SiON, and SiO₂ were deposited by a plasma-enhanced chemical vapor deposition (PECVD) system. Great differences in the gate leakage current, breakdown voltage, interface traps, and current collapse were observed. The SiON MIS-HEMT exhibited the highest breakdown voltage and I_on/I_off ratio. The SiN_x MIS-HEMT performed well in current collapse but exhibited the highest gate leakage current density. The SiO₂ MIS-HEMT possessed the lowest gate leakage current density but suffered from the early breakdown of the metal–insulator–semiconductor (MIS) diode. As for interface traps, the SiN_x MIS-HEMT has the largest shallow trap density and the lowest deep trap density. The SiO₂ MIS-HEMT has the largest deep trap density. The factors causing current collapse were confirmed by Photoluminescence (PL) spectra. Based on the direct current (DC) characteristics, SiN_x and SiON both have advantages and disadvantages. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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12 pages, 2342 KiB

Open AccessArticle

Modeling of 2DEG characteristics of In_xAl_1−xN/AlN/GaN-Based HEMT Considering Polarization and Quantum Mechanical Effect

by Jian Qin, Quanbin Zhou, Biyan Liao and Hong Wang

Electronics 2018, 7(12), 410; https://doi.org/10.3390/electronics7120410 - 8 Dec 2018

Cited by 15 | Viewed by 5756

Abstract

A comprehensive model for 2DEG characteristics of In_xAl_1−xN/AlN/GaN heterostructure has been presented, taking both polarization and bulk ionized charge into account. Investigations on the 2DEG density and electron distribution across the heterostructure have been carried out using solutions of [...] Read more.

A comprehensive model for 2DEG characteristics of In_xAl_1−xN/AlN/GaN heterostructure has been presented, taking both polarization and bulk ionized charge into account. Investigations on the 2DEG density and electron distribution across the heterostructure have been carried out using solutions of coupled 1-D Schrödinger-Poisson equations solved by an improved iterative scheme. The proposed model extends a previous approach allowing for estimating the quantum mechanical effect for a generic InAlN/GaN-based HEMT within the range of the Hartree approximation. A critical AlN thickness (~2.28 nm) is predicted when considering the 2DEG density in dependence on a lattice matched In_0.17Al_0.83N thickness. The obtained results present in this work provide a guideline for the experimental observation of the subband structure of InAlN/GaN heterostructure and may be used as a design tool for the optimization of that epilayer structure. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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11 pages, 2983 KiB

Open AccessArticle

Optimization of Line-Tunneling Type L-Shaped Tunnel Field-Effect-Transistor for Steep Subthreshold Slope

by Faraz Najam and Yun Seop Yu

Electronics 2018, 7(11), 275; https://doi.org/10.3390/electronics7110275 - 24 Oct 2018

Cited by 8 | Viewed by 3926

Abstract

The L-shaped tunneling field-effect-transistor (LTFET) has been recently introduced to overcome the thermal subthreshold limit of conventional metal-oxide-semiconductor field-effect-transistors (MOSFET). In this work, the shortcomings of the LTFET was investigated. It was found that the corner effect present in the LTFET effectively degrades [...] Read more.

The L-shaped tunneling field-effect-transistor (LTFET) has been recently introduced to overcome the thermal subthreshold limit of conventional metal-oxide-semiconductor field-effect-transistors (MOSFET). In this work, the shortcomings of the LTFET was investigated. It was found that the corner effect present in the LTFET effectively degrades its subthreshold slope. To avoid the corner effect, a new type of device with dual material gates is presented. The new device, termed the dual-gate (DG) LTEFT (DG-LTFET), avoids the corner effect and results in a significantly improved subthreshold slope of less than 10 mV/dec, and an improved ON/OFF current ratio over the LTFET. The DG-LTFET was evaluated for different device parameters and bench-marked against the LTFET. This work presents the optimum configuration of the DG-LTFET in terms of device dimensions and doping levels to determine the best subthreshold, ON current, and ambipolar performance. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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17 pages, 3761 KiB

Open AccessArticle

A New Method of the Pattern Storage and Recognition in Oscillatory Neural Networks Based on Resistive Switches

by Andrei Velichko, Maksim Belyaev, Vadim Putrolaynen and Petr Boriskov

Electronics 2018, 7(10), 266; https://doi.org/10.3390/electronics7100266 - 22 Oct 2018

Cited by 10 | Viewed by 4587

Abstract

Development of neuromorphic systems based on new nanoelectronics materials and devices is of immediate interest for solving the problems of cognitive technology and cybernetics. Computational modeling of two- and three-oscillator schemes with thermally coupled VO₂-switches is used to demonstrate a novel [...] Read more.

Development of neuromorphic systems based on new nanoelectronics materials and devices is of immediate interest for solving the problems of cognitive technology and cybernetics. Computational modeling of two- and three-oscillator schemes with thermally coupled VO₂-switches is used to demonstrate a novel method of pattern storage and recognition in an impulse oscillator neural network (ONN), based on the high-order synchronization effect. The method allows storage of many patterns, and their number depends on the number of synchronous states N_s. The modeling demonstrates attainment of N_s of several orders both for a three-oscillator scheme N_s ~ 650 and for a two-oscillator scheme N_s ~ 260. A number of regularities are obtained, in particular, an optimal strength of oscillator coupling is revealed when N_s has a maximum. Algorithms of vector storage, network training, and test vector recognition are suggested, where the parameter of synchronization effectiveness is used as a degree of match. It is shown that, to reduce the ambiguity of recognition, the number coordinated in each vector should be at least one unit less than the number of oscillators. The demonstrated results are of a general character, and they may be applied in ONNs with various mechanisms and oscillator coupling topology. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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8 pages, 1547 KiB

Open AccessArticle

Ultraviolet Irradiation Effects on luminescent Centres in Bismuth-Doped and Bismuth-Erbium Co-Doped Optical Fibers via Atomic Layer Deposition

by Rahim Uddin, Jianxiang Wen, Tao He, Fufei Pang, Zhenyi Chen and Tingyun Wang

Electronics 2018, 7(10), 259; https://doi.org/10.3390/electronics7100259 - 18 Oct 2018

Cited by 1 | Viewed by 3881

Abstract

The effects of ultraviolet irradiation on luminescent centres in bismuth-doped (BDF) and bismuth/erbium co-doped (BEDF) optical fibers were examined in this study. The fibers were fabricated by modified chemical vapor deposition combining with atomic layer deposition method. The fibers were exposed to irradiation [...] Read more.

The effects of ultraviolet irradiation on luminescent centres in bismuth-doped (BDF) and bismuth/erbium co-doped (BEDF) optical fibers were examined in this study. The fibers were fabricated by modified chemical vapor deposition combining with atomic layer deposition method. The fibers were exposed to irradiation from a 193 nm pulsed wave argon fluoride laser, and an 830 nm wavelength laser diode pump source was employed for excitation. The experimental results showed that, for the BDF, the transmission loss was slightly reduced and the luminescence intensity was increased at the bismuth-related active aluminum centre (BAC-Al). Then, for the BEDF, the transmission loss was increased a little and the luminescence intensity was also increased at the BAC-Al centre. However, the luminescence intensity was decreased at approximately 1420 nm of the bismuth-related active silica centre (BAC-Si) for all fiber samples. One possible formation mechanism for luminescence intensity changes was probably associated with the valence state transfer of bismuth ions. The other possible mechanism was that the ArF-driven two-photon process caused luminescence changes in BAC-Al and BAC-Si. It was very important to reveal nature of luminescence properties of Bi-doped and Bi/Er co-doped optical fiber. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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11 pages, 3066 KiB

Open AccessFeature PaperArticle

High Performance Graphene-Based Electrochemical Double Layer Capacitors Using 1-Butyl-1-methylpyrrolidinium tris (pentafluoroethyl) trifluorophosphate Ionic Liquid as an Electrolyte

by Jacob D. Huffstutler, Milinda Wasala, Julianna Richie, John Barron, Andrew Winchester, Sujoy Ghosh, Chao Yang, Weiyu Xu, Li Song, Swastik Kar and Saikat Talapatra

Electronics 2018, 7(10), 229; https://doi.org/10.3390/electronics7100229 - 2 Oct 2018

Cited by 16 | Viewed by 4105

Abstract

There are several advantages to developing electrochemical double-layer capacitors (EDLC) or supercapacitors with high specific energy densities, for example, these can be used in applications related to quality power generation, voltage stabilization, and frequency regulation. In this regard, ionic liquids capable of providing [...] Read more.

There are several advantages to developing electrochemical double-layer capacitors (EDLC) or supercapacitors with high specific energy densities, for example, these can be used in applications related to quality power generation, voltage stabilization, and frequency regulation. In this regard, ionic liquids capable of providing a higher voltage window of operations compared to an aqueous and/or polymer electrolyte can significantly enhance the specific energy densities of EDLCs. Here we demonstrate that EDLCs fabricated using ionic liquid 1-butyl-1-methylpyrrolidinium tris (pentafluoroethyl) trifluorophosphate (BMP-FAP) as an electrolyte and few layer liquid-phase exfoliated graphene as electrodes show remarkable performance compared to EDLC devices fabricated with aqueous potassium hydroxide (6M) as well as widely used ionic liquid 1-butyl-3-methylimidazolium hexafluorophosphate (BMIM-PF6). We found that graphene EDLC’s with BMP-FAP as an electrolyte possess a high specific energy density of ≈25 Wh/kg along with specific capacitance values as high as 200 F/g and having an operating voltage windows of >5 volts with a rapid charge transfer response. These findings strongly indicate the suitability of BMP-FAP as a good choice of electrolyte for high energy density EDLC devices. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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9 pages, 11341 KiB

Open AccessArticle

Simulation Analysis in Sub-0.1 μm for Partial Isolation Field-Effect Transistors

by Young Kwon Kim, Jin Sung Lee, Geon Kim, Taesik Park, HuiJung Kim, Young Pyo Cho, Young June Park and Myoung Jin Lee

Electronics 2018, 7(10), 227; https://doi.org/10.3390/electronics7100227 - 2 Oct 2018

Cited by 4 | Viewed by 4275

Abstract

In this paper, we extensively analyzed the drain-induced barrier lowering (DIBL) and leakage current characteristics of the proposed partial isolation field-effect transistor (PiFET) structure. We then compared the PiFET with the conventional planar metal-oxide semiconductor field-effect transistor (MOSFET) and silicon on insulator (SOI) [...] Read more.

In this paper, we extensively analyzed the drain-induced barrier lowering (DIBL) and leakage current characteristics of the proposed partial isolation field-effect transistor (PiFET) structure. We then compared the PiFET with the conventional planar metal-oxide semiconductor field-effect transistor (MOSFET) and silicon on insulator (SOI) structures, even though they have the same doping profile. Two major features of the PiFET are potential condensation and potential modulation by a buried insulator. The potential modulation near the drain region can control the electric field in the overlapped region of the drain and gate, because it causes a high gate-fringing field. Therefore, we suggest guidelines with respect to the optimal PiFET structure. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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10 pages, 1579 KiB

Open AccessArticle

Multichannel and Multistate All-Optical Switch Using Quantum-Dot and Sample-Grating Semiconductor Optical Amplifier

by Omar Qasaimeh

Electronics 2018, 7(9), 166; https://doi.org/10.3390/electronics7090166 - 29 Aug 2018

Cited by 3 | Viewed by 3547

Abstract

A novel type of multichannel and multistate all-optical switch using a single sample-grating quantum-dot-distributed feedback semiconductor optical amplifier has been proposed and theoretically demonstrated. The multichannel device, which operates below threshold, utilizes cross-gain modulation and the sample-grating technique. The multichannel outputs are strongly [...] Read more.

A novel type of multichannel and multistate all-optical switch using a single sample-grating quantum-dot-distributed feedback semiconductor optical amplifier has been proposed and theoretically demonstrated. The multichannel device, which operates below threshold, utilizes cross-gain modulation and the sample-grating technique. The multichannel outputs are strongly coupled and are utilized to get multistability at several wavelength channels. Three logic states can be obtained when the inputs are properly detuned to the sample-grating comb modes. The three logic states, which exhibit reasonable gain, are separated by wide hysteresis width and can be tuned to a different wavelength channels. The device characteristics are very useful for building all-optical logic gates, flip-flops, and decision circuits. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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9 pages, 1783 KiB

Open AccessArticle

Analog Memristive Characteristics and Conditioned Reflex Study Based on Au/ZnO/ITO Devices

by Tiedong Cheng, Jingjing Rao, Xingui Tang, Lirong Yang and Nan Liu

Electronics 2018, 7(8), 141; https://doi.org/10.3390/electronics7080141 - 8 Aug 2018

Cited by 6 | Viewed by 4296

Abstract

As the fourth basic electronic component, the application fields of the memristive devices are diverse. The digital resistive switching with sudden resistance change is suitable for the applications of information storage, while the analog memristive devices with gradual resistance change are required in [...] Read more.

As the fourth basic electronic component, the application fields of the memristive devices are diverse. The digital resistive switching with sudden resistance change is suitable for the applications of information storage, while the analog memristive devices with gradual resistance change are required in the neural system simulation. In this paper, a transparent device of ZnO films deposited by the magnetron sputtering on indium tin oxides (ITO) glass was firstly prepared and found to show typical analog memristive switching behaviors, including an I–V curve that exhibits a ‘pinched hysteresis loops’ fingerprint. The conductive mechanism of the device was discussed, and the LTspice model was built to emulate the pinched hysteresis loops of the I–V curve. Based on the LTspice model and the Pavlov training circuit, a conditioned reflex experiment has been successfully completed both in the computer simulation and the physical analog circuits. The prepared device also displayed synapses-like characteristics, in which resistance decreased and gradually stabilized with time under the excitation of a series of voltage pulse signals. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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9 pages, 2380 KiB

Open AccessArticle

CMOS Compatible Bio-Realistic Implementation with Ag/HfO₂-Based Synaptic Nanoelectronics for Artificial Neuromorphic System

by Lin Chen, Zhen-Yu He, Tian-Yu Wang, Ya-Wei Dai, Hao Zhu, Qing-Qing Sun and David Wei Zhang

Electronics 2018, 7(6), 80; https://doi.org/10.3390/electronics7060080 - 25 May 2018

Cited by 17 | Viewed by 6793

Abstract

The emerging resistive switching devices have attracted broad interest as promising candidates for future memory and computing applications. Particularly, it is believed that memristor-based neuromorphic engineering promises to enable efficient artificial neuromorphic systems. In this work, the synaptic abilities are demonstrated in HfO [...] Read more.

The emerging resistive switching devices have attracted broad interest as promising candidates for future memory and computing applications. Particularly, it is believed that memristor-based neuromorphic engineering promises to enable efficient artificial neuromorphic systems. In this work, the synaptic abilities are demonstrated in HfO₂-based resistive memories for their multi-level storage capability as well as being compatible with advanced CMOS technology. Both inert metal (TaN) and active metal (Ag) are selected as top electrodes (TE) to mimic the abilities of a biological synapse. HfO₂-based resistive memories with active TE exhibit great advantages in bio-realistic implementation such as suitable switching speed, low power and multilevel switching. Moreover, key features of a biological synapse such as short-term/long-term memory, “learning and forgetting”, long-term potentiation/depression, and the spike-timing-dependent plasticity (STDP) rule are implemented in a single Ag/HfO₂/Pt synaptic device without the poorly scalable software and tedious process in transistors-based artificial neuromorphic systems. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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14 pages, 4386 KiB

Open AccessArticle

A Hierarchical Vision-Based UAV Localization for an Open Landing

by Haiwen Yuan, Changshi Xiao, Supu Xiu, Wenqiang Zhan, Zhenyi Ye, Fan Zhang, Chunhui Zhou, Yuanqiao Wen and Qiliang Li

Electronics 2018, 7(5), 68; https://doi.org/10.3390/electronics7050068 - 11 May 2018

Cited by 23 | Viewed by 5516

Abstract

The localization of unmanned aerial vehicles (UAVs) for autonomous landing is challenging because the relative positions of the landing objects are almost inaccessible and the objects have nearly no transmission with UAVs. In this paper, a hierarchical vision-based localization framework for rotor UAVs [...] Read more.

The localization of unmanned aerial vehicles (UAVs) for autonomous landing is challenging because the relative positions of the landing objects are almost inaccessible and the objects have nearly no transmission with UAVs. In this paper, a hierarchical vision-based localization framework for rotor UAVs is proposed for an open landing. In such a hierarchical framework, the landing is defined into three phases: “Approaching”, “Adjustment”, and “Touchdown”. Object features at different scales can be extracted from a designed Robust and Quick Response Landing Pattern (RQRLP) and the corresponding detection and localization methods are introduced for the three phases. Then a federated Extended Kalman Filter (EKF) structure is costumed and utilizes the solutions of the three phases as independent measurements to estimate the pose of the vehicle. The framework can be used to integrate the vision solutions and enables the estimation to be smooth and robust. In the end, several typical field experiments have been carried out to verify the proposed hierarchical vision framework. It can be seen that a wider localization range can be extended by the proposed framework while the precision is ensured. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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Review

Jump to: Editorial, Research

20 pages, 3130 KiB

Open AccessReview

A Comprehensive Review of Recent Progress on GaN High Electron Mobility Transistors: Devices, Fabrication and Reliability

by Fanming Zeng, Judy Xilin An, Guangnan Zhou, Wenmao Li, Hui Wang, Tianli Duan, Lingli Jiang and Hongyu Yu

Electronics 2018, 7(12), 377; https://doi.org/10.3390/electronics7120377 - 3 Dec 2018

Cited by 140 | Viewed by 22411

Abstract

GaN based high electron mobility transistors (HEMTs) have demonstrated extraordinary features in the applications of high power and high frequency devices. In this paper, we review recent progress in AlGaN/GaN HEMTs, including the following sections. First, challenges in device fabrication and optimizations will [...] Read more.

GaN based high electron mobility transistors (HEMTs) have demonstrated extraordinary features in the applications of high power and high frequency devices. In this paper, we review recent progress in AlGaN/GaN HEMTs, including the following sections. First, challenges in device fabrication and optimizations will be discussed. Then, the latest progress in device fabrication technologies will be presented. Finally, some promising device structures from simulation studies will be discussed. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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24 pages, 5718 KiB

Open AccessFeature PaperReview

Device Applications of Synthetic Topological Insulator Nanostructures

by Chenxi Yue, Shuye Jiang, Hao Zhu, Lin Chen, Qingqing Sun and David Wei Zhang

Electronics 2018, 7(10), 225; https://doi.org/10.3390/electronics7100225 - 1 Oct 2018

Cited by 25 | Viewed by 9543

Abstract

This review briefly describes the development of synthetic topological insulator materials in the application of advanced electronic devices. As a new class of quantum matter, topological insulators with insulating bulk and conducting surface states have attracted attention in more and more research fields [...] Read more.

This review briefly describes the development of synthetic topological insulator materials in the application of advanced electronic devices. As a new class of quantum matter, topological insulators with insulating bulk and conducting surface states have attracted attention in more and more research fields other than condensed matter physics due to their intrinsic physical properties, which provides an excellent basis for novel nanoelectronic, optoelectronic, and spintronic device applications. In comparison to the mechanically exfoliated samples, the newly emerging topological insulator nanostructures prepared with various synthetical approaches are more intriguing because the conduction contribution of the surface states can be significantly enhanced due to the larger surface-to-volume ratio, better manifesting the unique properties of the gapless surface states. So far, these synthetic topological insulator nanostructures have been implemented in different electrically accessible device platforms via electrical, magnetic and optical characterizations for material investigations and device applications, which will be introduced in this review. Full article

(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)

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