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Electronics

Electronics is an international, peer-reviewed, open access journal on the science of electronics and its applications published semimonthly online by MDPI. The Polish Society of Applied Electromagnetics (PTZE) and Association of Remotely Piloted Aircraft Systems UK (ARPAS-UK) are affiliated with Electronics and their members receive a discount on article processing charges.

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All Articles (31,580)

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  • Open Access

With the rapid development of large-scale offshore wind power and long-distance flexible DC transmission, the frequency interaction among offshore wind farms, modular-multilevel-converter-based high-voltage direct-current systems, and onshore AC grids has become increasingly important. Offshore wind turbines are normally decoupled from onshore frequency by converter control. This paper proposes a frequency feature transfer and coordinated control method that uses bounded DC voltage variation as an information carrier. The onshore converter maps the filtered frequency deviation and RoCoF into a constrained DC voltage reference, while a proper band-limited decoder at the offshore terminal extracts the transmitted feature without differentiating the received voltage again. Wind farm support is coordinated with DC voltage margin, rotor speed reserve, and converter current limits. Numerical studies cover an onshore load increase, generation loss, wind power reduction, and restricted support capability; controller-hardware-in-the-loop (CHIL) tests examine the DC voltage transfer path and electrical constraints. The numerical comparisons show an improved frequency nadir and a bounded RoCoF response relative to the two reference methods, while the CHIL waveforms confirm controlled DC voltage transfer and acceptable converter voltage and current behavior. The two validation levels are reported separately to avoid attributing model-based frequency indices to the laboratory platform.

Electronics

1 October 2026

Topology and positive power flow directions of offshore wind farm connected through MMC-HVDC system (Converter 2: offshore MMC; Converter 1: onshore MMC).
  • Article
  • Open Access

This paper presents transistor-level building blocks for fractional-N frequency synthesis in 45 nm CMOS. The main contribution is a five-stage differential current-starved ring VCO using gate-to-body-connected dynamic-threshold MOS devices and sleep-stack transistors placed only in alternate stages to limit the added delay and capacitive loading. The digital section includes an eight-stage multi-modulus frequency divider based on push-pull cascode logic divide-by-2/3 cells and a MASH 1-1-1 sigma-delta controller. All circuits are implemented in Cadence Virtuoso with a nominal 1.0 V supply. Post-layout simulation of the VCO gives an oscillation frequency of 9.24 GHz, phase noise of −124.38 dBc/Hz at a 1 MHz offset, and power consumption of 59.4 µW, corresponding to an FoM of −215.96 dBc/Hz. At Vctrl=0.5 V, the extracted VCO remains oscillatory over 60 combined process, supply voltage, and temperature conditions, with the oscillation frequency ranging from 6.43 to 10.96 GHz. The MMFD, MASH controller, and their integrated fractional-division path are evaluated under the reported nominal operating conditions; PVT robustness of the combined digital path is not established in this work. The digital-path validation includes analysis of fractional-divider command convergence, edge-count consistency, output line spectra, and characterization of the third-order noise-transfer response. The work focuses on the design and validation of individual frequency-synthesis building blocks rather than a complete closed-loop fractional-N PLL.

Electronics

1 October 2026

System-level fractional-N PLL architecture showing the proposed VCO, MASH 1-1-1 sigma-delta modulator, division control logic, and multi-modulus frequency divider.
  • Article
  • Open Access

As programmable photonic integrated circuits scale toward higher port counts and system-level reconfigurability, high-density electrical fan-out is becoming a major packaging bottleneck. Reliable Au-wire bonding to AlCu redistribution structures depends strongly on upstream wafer fabrication, although optimization often focuses on final bonding parameters. This study presents a failure-guided process-integration strategy for Ti/AlCu silicon fan-out submounts. A root-cause analysis of non-stick-on-pad (NSOP) failures was used to establish two reworkable in-line acceptance gates before irreversible assembly, covering the AlCu pattern-transfer fidelity, residual metal clearance, passivation-window integrity, and bond-pad exposure. With thermosonic bonding parameters held constant, the implementation of these gates and associated corrective actions increased the mean wire-pull force from 3.18 gf (31.2 mN) to 10.46 gf (102.6 mN), a 3.29-fold increase. All 30 measurements from the monitored-process batch exceeded the project-specific acceptance criterion of 4.3 gf (42.2 mN), and the dominant failure mode shifted from bond-pad interfacial separation to wire-neck or wire-body fracture. The optimized route enabled the high-pad-count assembly and functional verification of a programmable photonic device. Because the comparison comprised one fabrication batch per route with 30 bond-level pull tests per batch, the observed improvement is interpreted as a batch-specific process–response association rather than evidence of wafer-to-wafer or lot-to-lot reproducibility.

Electronics

1 October 2026

Submount architecture and initial Au-wire bonding response. (a) Schematic of the chip-submount-printed circuit board (PCB) assembly. (b) Enlarged top view of the silicon fan-out submount, with an overall length L = 2 cm and width W = 1 cm. (c) Schematic cross-section of the passivated Ti/AlCu submount, where H, h1, h2, and h3 denote the thicknesses of the Si substrate, Ti/AlCu metallization stack, Ti adhesion layer, and SiO2 isolation layer, respectively. (d) Enlarged view of the patterned-metal region indicated by the dashed box in (b), defining representative widths W1–W4, spacings d1–d2, and local gaps g1–g2. (e) Optical micrograph of the initial-batch bonding result, with a representative pad-interface failure highlighted. (f) Individual pull force measurements for the initial batch (n = 30); horizontal lines indicate the mean force of 3.18 gf and the project-specific acceptance criterion of 4.3 gf. Scale bar in (e): 1 mm. Schematics in (a–d) are not drawn to scale.
  • Article
  • Open Access

The practical value of quantum machine learning for network anomaly detection remains unclear under controlled and comparable benchmarking conditions. This study evaluates a trash-qubit-based Quantum Autoencoder (QAE) against seven classical anomaly-detection methods on UNSW-NB15 using shared data partitions, preprocessing steps, model selection procedures, and threshold calibration protocols. The experimental design included five independent seeds, three training set sizes, two feature budgets, and 12 QAE architectures, together with low-FPR analysis, finite-shot and synthetic-noise evaluation, less-constrained classical reference settings, and a cross-dataset assessment on TON_IoT. The Angle-RY encoding with a Real-Amplitudes Ring ansatz at depth L = 2 achieved the highest mean validation-selection AUPRC. On UNSW-NB15, the QAE was competitive in AUPRC and AUROC but remained behind the strongest classical baselines in F1-score, and its attack recall declined sharply under low-FPR constraints. The TON_IoT results further showed that relative model performance depended on the dataset. Under finite-shot and synthetic-noise conditions, anomaly-score rankings were largely preserved, whereas threshold-based decisions were more sensitive. Overall, the QAE showed competitive continuous-score discrimination on UNSW-NB15, but achieving reliable detection at low false-alarm rates remains a key operational challenge.

Electronics

1 October 2026

Performance comparison of classical anomaly detection methods under the matched benchmark and the less-constrained full-feature/larger-training setting. The figure reports (a) AUPRC, (b) AUROC, (c) F1-score, (d) False Positive Rate (FPR), (e) Precision and (f) Recall.

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Electronics - ISSN 2079-9292