Coarse-Grained Reconfigurable Architectures (CGRAs) execute compute-intensive kernels on a reconfigurable processing mesh. Transparent CGRAs extend this model by generating configurations at runtime and storing them in a dedicated cache, removing com...
Designers can reduce design space exploration time and efforts using the design space subsetting method that removes energy-redundant configurations. However, the subsetting method requires a priori knowledge of all applications. We analyze the impac...
Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules. Despite the recent advent of open-source hardware, the available open-sour...
Embedded systems have stringent design constraints, which has necessitated much prior research focus on optimizing energy consumption and/or performance. Since embedded systems typically have fewer cooling options, rising temperature, and thus temper...
This paper presents a cache-aware configurable hybrid flash translation layer (FTL), named CACH-FTL. It was designed based on the observation that most state-of-the-art flash-specific cache systems above FTLs flush groups of pages belonging to the...
With the deep integration of communication technology and Internet of Things technology, the edge network structure is becoming increasingly dense and heterogeneous. At the same time, in the edge network environment, characteristics such as wide-area...
Heterogeneous and configurable multicore systems provide hardware specialization to meet disparate application hardware requirements. However, effective multicore system specialization can require a priori knowledge of the applications, application p...
Cache attacks exploit the hardware vulnerabilities inherent to modern processors and pose a new threat to Internet of Things (IoT) devices. Intuitively, different cache parameter configurations directly impact the attack effectiveness, but the curren...
Secondary caching is increasingly important for RocksDB deployments on remote or disaggregated storage, where misses in the DRAM block cache incur costly backend reads. Although RocksDB introduced the experimental SecondaryCache interface to extend b...
This work proposes a behavior-aware caching architecture that improves cache hit rates by up to 10.8% over LRU and 36% over LFU in large-scale web applications, reducing redundant traffic and alleviating backend server load. The architecture partitio...
Unlike conventional CPU caches, non-datapath caches, such as host-side flash caches which are extensively used as storage caches, have distinct requirements. While every cache miss results in a cache update in a conventional cache, non-datapath cache...
Large language models (LLMs) commonly employ key–value (KV) caching to avoid recomputing previous attention states during autoregressive inference. However, its measured performance benefit depends on workload characteristics and the memory env...
This paper presents a register-transfer-level (RTL) fault injection study of the LEON3 processor’s internal memory subsystem under single-event upsets (SEUs). The analysis targets four key components: the instruction cache (I-cache), data cache...
In this work, we study an end-to-end implementation of a Prime + Probe covert channel on the CVA6 RISC-V processor implemented on a FPGA target and running a Linux OS. We develop the building blocks of the covert channel and provide a detailed view o...
As RISC-V processors are increasingly considered for embedded real-time and control-oriented systems, evaluating how timing behavior changes under increasing task concurrency becomes essential. Adding runnable tasks can amplify preemptions, context-s...
To improve the reliability of static random access memory (SRAM), error-correcting codes (ECC) are typically used to protect SRAM in the cache. While improving the reliability, we also need additional circuits to support ECC, including encoding and d...
The Internet of Things (IoT) brings internet connectivity to everyday devices. These devices generate a large volume of information that needs to be transmitted to the nodes running the IoT applications, where they are processed and used to make some...
Large Language Model (LLM) agents depend heavily on multiple external tools such as APIs, databases and computational services to perform complex tasks. However, these tool executions create latency and introduce costs, particularly when agents handl...
Robot Operating System 2 (ROS 2) is a robotic software that uses a set of Quality of Service (QoS) policies to manage the quality of robot data transmissions in a network, such as the RELIABLE and KEEP_LAST options. In ROS 2 node communication, the R...
Apache Spark has gained widespread adoption for large-scale data processing. However, conventional caching methods inadequately address the dual challenges of performance bottlenecks and escalating energy consumption in data-intensive workloads. This...
Side-channel attacks leveraging microarchitectural components such as caches and translation lookaside buffers (TLBs) pose increasing risks to cryptographic and machine-learning workloads. This paper presents a comparative study of performance and si...
In this paper, we present several optimization strategies that can improve the overall performance of the distributed in-memory computing system, “Apache Spark”. Despite its distributed memory management capability for iterative jobs and intermediate...
To generate each token, the Whisper decoder re-reads the encoder’s 1500-position cross-attention key–value (KV) cache on the CPU. In the Whisper-medium model, this cache occupies 281 MiB; for short recordings, 74–82% of it consists...
Modern x86 processors incorporate performance-enhancing features such as prefetching mechanisms, cache coherence protocols, and support for large memory pages (e.g., 2 MB huge pages). While these architectural innovations aim to reduce memory access...
One of the research directions in Internet of Things (IoT) is the field of Context Management Platforms (CMPs) which is a specific type of IoT middleware. CMPs provide horizontal connectivity between vertically oriented IoT silos resulting in a notic...
Rendering is the process of generating high-resolution images by software, which is widely used in animation, video games and visual effects in movies. Although rendering is a computation-intensive job, we observe that storage accesses may become ano...
Deploying intrusion detection models on resource-constrained IoT edge gateways is challenged by model complexity, class-imbalanced traffic, and redundant inference across gateways. CDA-Cache integrates a compact convolutional student, EQLv2-inspired...
Vertical Federated Learning (VFL) is a promising category of Federated Learning that enables collaborative model training among distributed parties with data privacy protection. Due to its unique training architecture, a key challenge of VFL is high...
The performance of modern high-performance computing systems is increasingly constrained not by computational power, but by the efficiency of memory subsystem interaction. Cache behavior optimization thus becomes a critical requirement for developers...
Molecular modeling is widely utilized in subjects including but not limited to physics, chemistry, biology, materials science and engineering. Impressive progress has been made in development of theories, algorithms and software packages. To divide a...
Convolutional neural network (CNN) hardware acceleration is critical to improve the performance and facilitate the deployment of CNNs in edge applications. Due to its efficiency and simplicity, channel group parallelism has become a popular method fo...
Dynamic adaptive streaming over HTTP (DASH) technique, the most popular streaming method, requires a large number of hard disk drives (HDDs) to store multiple bitrate versions of many videos, consuming significant energy. A solid-state drive (SSD) ca...
Edge caching improves latency and energy efficiency in IoT deployments, but it also enlarges the attack surface: cache poisoning, content pollution, and Interest flooding can silently corrupt time-critical services. Existing defences sit at two inade...
The internet’s future architecture, known as Named Data Networking (NDN), is a creative way to offer content-based services. NDN is more appropriate for content distribution because of its special characteristics, such as naming conventions for...
Web Feature Service (WFS) is a protocol for accessing geospatial data stores such as databases and Shapefiles over the Web. However, WFS does not provide direct access to data distributed in multiple servers. In addition, WFS features extracted from...
Achieving periodic, low-latency data transfer with deterministic timing guarantees between I/O devices (e.g., Field-Programmable Gate Arrays (FPGAs)) and hosts remains a fundamental challenge in real-time domains, including automated driving, high-fr...
In post-training compression of Transformer models, the compression ratio or pruning rate is often predetermined and does not directly take into account the memory capabilities of the target hardware. This work introduces a cache-aware post-training...
Microarchitectural side-channels leak data through caches, branch predictors, store buffers, and speculative execution. Evaluating defenses at cycle-model fidelity has forced a choice between functional tools (Spike, QEMU) and gem5’s hours-long...
Image processing systems are widely used in space applications, so different radiation-induced malfunctions may occur in the system depending on the device that is implementing the algorithm. SRAM-based FPGAs are commonly used to speed up the image p...
Spin-orbit torque memory is a suitable candidate for next generation nonvolatile magnetoresistive random access memory. It combines high-speed operation with excellent endurance, being particularly promising for application in caches. In this work, a...
Main memory carries data outside the processor’s trust boundary, so commodity systems-on-chip (SoCs) increasingly encrypt it; yet, in-line memory encryption engine itself becomes a differential power analysis (DPA) target whose key, if recovere...
Reported Speculative decoding (SD) speedups are difficult to compare because methods are commonly evaluated with different serving runtimes and configurations. We present SpecLLM, a pluggable evaluation framework that applies common scheduling, batch...
For small robots, annotation can outlast computation as a bottleneck: hardware is bought once, labels at every deployment. We study label efficiency for landmark detection on a humanoid soccer robot. Against soft-argmax and pooled coordinate-regressi...
Recently, non-volatile memory (NVM) has advanced as a fast storage medium, and legacy memory subsystems optimized for DRAM (dynamic random access memory) and HDD (hard disk drive) hierarchies need to be revisited. In this article, we explore the memo...
Modern computing systems are primarily designed for maximum performance, which inadvertently introduces vulnerabilities at the micro-architecture level. While cache side-channel analysis has received significant attention, other Central Processing Un...
This paper presents an enhanced Ant Colony Optimization (ACO) algorithm tailored for optimizing CMOS physical design in VLSI circuits. As device complexity escalates, traditional placement techniques struggle with multiobjective goals such as minimiz...
Connected vehicles generate video, sensor, and bulk data that must be uploaded, cached, and forwarded across edge and cloud resources under short contact durations and congested backhaul. This paper studies selected data-management functions of a Sma...
Implicit neural representations (INRs) encode video frames as network weights, offering a new compression paradigm. A persistent limitation is that existing INR codecs train one model per target bitrate, so multi-rate deployment needs separate runs,...
Historical digital personas are a promising means of interactive and personalized access to cultural heritage; however, their practical deployment requires simultaneous control over factual accuracy, source provenance, persona consistency, and multim...
Illegal broadcasting is one of the primary challenges for Over the Top (OTT) service providers. Watermarking is a method used to trace illegal redistribution of video content. However, watermarking introduces processing overhead due to the embedding...
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