- Article
GateRL: Automated Circuit Design Framework of CMOS Logic Gates Using Reinforcement Learning
- Hyoungsik Nam,
- Young-In Kim,
- Jina Bae and
- Junhee Lee
This paper proposes a GateRL that is an automated circuit design framework of CMOS logic gates based on reinforcement learning. Because there are constraints in the connection of circuit elements, the action masking scheme is employed. It also reduce...