Microelectronics 2025, 1(1), 2; https://doi.org/10.3390/microelectronics1010002 - 1 Aug 2025
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Automatic techniques for analog integrated circuit layout design have been proposed in the literature for over four decades. However, as analog design moves into deep nanometer integration nodes, the increasing number of design rules, the influence of layout-dependent effects, congestion, and the impact
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Automatic techniques for analog integrated circuit layout design have been proposed in the literature for over four decades. However, as analog design moves into deep nanometer integration nodes, the increasing number of design rules, the influence of layout-dependent effects, congestion, and the impact of parasitic structures constantly challenges existing automatic layout generation techniques and keeps the pressure on for further improvement. At the time of writing, no automatic tool or flow has been established in the industrial environment, resulting in a time-consuming and difficult-to-reuse design process. However, very recently, machine and deep learning techniques started to offer solutions for problems not dealt with in the previous generation of automatic layout tools and are reshaping analog design automation. Therefore, this paper conducts a review of the most recent analog integrated circuit automatic layout techniques powered by machine and deep learning methods, covering placement, routing, and trends on post-layout performance estimation, as well as providing an actual, complete, and comprehensive guide for circuit designers and design automation developers.
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