93 Results Found

For high-volume production of 3D-stacked chips with through-silicon-vias (TSVs), wafer-scale bonding offers lower production cost compared with bump bond technology and is promising for interconnect pitches smaller than 5 µ using available tooling. P...

A high-aspect-ratio three-dimensionally (3D) stacked comb structure for micromirror application is demonstrated by wafer bonding technology in CMOS-compatible processes in this work. A vertically stacked comb structure is designed to circumvent any m...

Ultra-thin sapphire wafer processing is receiving increasing attention in the LED substrate industry. In the cascade clamping method, the motion state of the wafer determines the uniformity of material removal, while the motion state of the wafer is...

Two stacked integration methods have been developed to enable advanced microsystems of microelectromechanical systems (MEMS) on large scale integration (LSI). One is a wafer level transfer of MEMS fabricated on a carrier wafer to a LSI wafer. The oth...

A novel piezoceramic stack-based smart aggregate (PiSSA) with piezoceramic wafers in series or parallel connection is developed to increase the efficiency and output performance over the conventional smart aggregate with only one piezoelectric patch....

The microbump (μ-bump) reliability of 3D integrated circuit (3D-IC) packaging must be enhanced, in consideration of the multi-chip assembly, during temperature cycling tests (TCT). This research proposes vehicle fabrications, experimental implements,...

Micro-electronic devices are increasingly incorporating miniature multi-layered integrated architectures. However, the localization of faults in three-dimensional structure remains challenging. This study involved the experimental and numerical estim...

Double-sides polishing technology has the advantages of high flatness and parallelism, and high polishing efficiency. It is the preferred polishing method for the preparation of ultra-thin sapphire wafer. However, the clamping method is a fundamental...

A multi-layer stacked Dynamic Random Access Memory (DRAM) platform is introduced to address the memory wall issue. This platform features high-density vertical interconnects established between DRAM units for high-capacity memory and logic units for...

In this work, we compare the performance of convolutional neural networks and support vector machines for classifying image stacks of specular silicon wafer back surfaces. In these image stacks, we can identify structures typically originating from r...

Piezoelectric MEMS devices were fabricated on 200 mm Si wafers using both deposited and layer-transferred PZT films. In both cases, the PZT-based devices showed ferroelectric and piezoelectric properties at the level of current state-of-the-art devic...

With the development of the electronics industry, the requirements for chips are getting higher and higher, and thinner and thinner wafers are needed to meet the processing of chips. In this study, a model of the adhesion state of semiconductor wafer...

High-precision aligned wafer bonding is essential to heterogeneous integration, with the device dimension reduced continuously. To get the alignment more accurately and conveniently, we propose a moiré-based alignment method using centrosymmet...

Titanium oxide (TiO2) films and TiO2/SiNx stacks have potential in surface passivation, anti-reflection coatings and carrier-selective contact layers for crystalline Si solar cells. A Si wafer, deposited with 8-nm-thick TiO2 film by atomic layer depo...

Heterogeneous integration of micro-electro mechanical systems (MEMS) and complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) by 3D stacking or wafer bonding is an emerging approach to advance the functionality of microdevices. Al...

In 3D-system packaging technologies, eutectic bonding is the key technology of multilayer chip stacking and vertical interconnection. Optimized from the aspects of the thickness of the electroplated metal layer, the pretreatment of the wafer surface...

In this study, needle-like and pyramidal hybrid black silicon structures were prepared by performing metal-assisted chemical etching (MACE) on alkaline-etched silicon wafers. Effects of the MACE time on properties of the black silicon wafers were inv...

For ultra-scaled technology nodes at channel lengths below 12 nm, two-dimensional (2D) materials are a potential replacement for silicon since even atomically thin 2D semiconductors can maintain sizable mobilities and provide enhanced gate control in...

For the integration of a reactive multilayer system (iRMS) with a high exothermic reaction enthalpy as a heat source on silicon wafers for low-temperature bonding in the 3D integration and packaging of microsystems, two main conflicting issues should...

As stacking technologies, such as 2.5D and 3D packages, continue to accelerate in advanced semiconductor components, the singulation and thinning of Si wafers are becoming increasingly critical. Despite their importance in producing thinner and more...

We present a concept for a wafer-level manufactured photoacoustic transducer, suitable to be used in consumer-grade gas sensors. The transducer consists of an anodically bonded two-layer stack of a blank silicon wafer and an 11 µm membrane, whi...

Wafer chips are manufactured in the semiconductor industry through various process technologies. Photolithography is one of these processes, aligning the wafer and scanning the circuit pattern on the wafer on which the photoresist film is formed by i...

This paper introduces a novel nondestructive wafer scale thin film thickness measurement method by detecting the reflected picosecond ultrasonic wave transmitting between different interfacial layers. Unlike other traditional approaches used for thic...

Most existing carbon fiber composite materials are formed by high-temperature molding of multiple layers of fiber cloth. During the manufacturing and usage processes, materials are prone to defects such as voids, delamination, and inclusions, which s...

In this study, equiatomic Ru–Zr coatings were deposited on Si wafers at 400 °C by using direct current magnetron cosputtering. The plasma focused on the circular track of the substrate holder and the substrate holder rotated at speeds within 1–30 rpm...

In this work, we demonstrate for the first time a 300-mm indium–gallium–arsenic (InGaAs) wafer on insulator (InGaAs-OI) substrates by splitting in an InP sacrificial layer. A 30-nm-thick InGaAs layer was successfully transferred using low temperature...

Thin films are a type of coating that have a very wide spectrum of applications. They may be used as single layers or composed in multilayer stacks, which significantly extend their applications. One of the most commonly used material for thin films...

In this paper, we demonstrate a fabrication process for large area (2 mm × 2 mm) fishnet metamaterial structures for near IR wavelengths. This process involves: (a) defining a sacrificial Si template structure onto a quartz wafer using deep-UV lithog...

The wafer backside grinding process has been a crucial technology to realize multi-layer stacking and chip performance improvement in the three dimension integrated circuits (3D IC) manufacturing. The total thickness variation (TTV) control is the bo...

Covering a whole surface of a robot with tiny sensors which can measure local pressure and transmit the data through a network is an ideal solution to give an artificial skin to robots to improve a capability of action and safety. The crucial technol...

In this paper, a three-dimensional heterogenous-integrated (3DHI) wafer-level packaging (WLP) process is proposed, and a radio frequency (RF) front-end module with two independent ultra-high frequency (UHF) receiving channels are designed and impleme...

This paper reports on design, fabrication and characterization of high-Q MEMS resonators to be used in optical applications like laser displays and LIDAR range sensors. Stacked vertical comb drives for electrostatic actuation of single-axis scanners...

The monolithic integration of gallium phosphide (GaP), with its green band gap, high refractive index, large optical non-linearity, and broad transmission range on silicon (Si) substrates, is crucial for Si-based optoelectronics and integrated photon...

This paper reports a multi-valve module with high chemical inertness and embedded flow heating for microscale gas chromatography (µGC) systems. The multi-valve module incorporates a monolithically microfabricated die stack, polyimide valve memb...

In this study, a mechanical stacking technique has been used to bond together the GaInP/GaAs and poly-silicon (Si) solar wafers. A GaInP/GaAs/poly-Si triple-junction solar cell has mechanically stacked using a low-temperature bonding process which in...

Mechanical anisotropy and point defects would greatly affect the product quality while producing silicon wafers via diamond-wire cutting. For three major orientations concerned in wafer production, their mechanical performances under the nanoscale ef...

With the growing adoption of 3D stacked memory structures, precise alignment and overlay control have become critical for multi-layer overlay accuracy. The metrology accuracy and stability of alignment marks are crucial to ensuring optimal alignment...

A series of technological steps concentrating around photolithography and UV polymer on glass replication in a mask-aligner that allow for the cost-effective generation of rather complex micro-optical systems on the wafer level are discussed. In this...

Plasma processes are known to be prone to inducing damage by charging effects. For CMOS image sensors, this can lead to dark current degradation both in value and uniformity. An in-depth analysis, motivated by the different degrading behavior of two...

Recent research aims to improve the performance of flexible pressure sensors by microengineering their active layer. However, current fabrication approaches often require a trade-off between scalability, miniaturization, and performance. To overcome...

This paper proposes a simplified fabrication processing for nanosheet Field-Effect Transistors (FETs) part of beyond-3-nm node technology. Formation of the ground plane (GP) region can be replaced by an epitaxial grown doped ultra-thin (DUT) layer on...

We report recent advances in photonic–electronic integration developed in the European research project L3MATRIX. The aim of the project was to demonstrate the basic building blocks of a co-packaged optical system. Two-dimensional silicon photonics a...

In response to the increasing manufacturing complexity/cost in maintaining DRAM advancements through traditional scaling, three-dimensional integrated circuits (3D ICs) and 2.5-dimensional ICs with Si interposers are known as promising candidates to...

We describe an original integration technological platform for the miniaturization of micromachined on-chip optical microscopes, such as the laser scanning confocal microscope. The platform employs the multi-wafer vertical integration approach, combi...

The body diode degradation in SiC power MOSFETs has been demonstrated to be caused by basal plane dislocation (BPD)-induced stacking faults (SFs) in the drift region. To enhance the reliability of the body diode, many process and structural improveme...

With the emergence of 5G and satellite communication applications, where millimeter-wave (mm-wave) active phased arrays play an important role, the demand for a highly integrated and cost-effective method to achieve mm-wave antennas is an inevitable...

Die-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip co...

In this work, we demonstrated the epitaxial growth of a gallium nitride (GaN) buffer structure on 200 mm SOI (silicon-on-insulator) substrates. This epitaxial layer is grown using a reversed stepped superlattice buffer (RSSL), which is composed of tw...

Micro-electromechanical systems (MEMS) safety-and-arming (S&A) device shows great potential in munition miniaturization, and it can be seen as the symbol of the fourth generation of weapons systems. In this paper, the design, fabrication, and act...

Crack generation and propagation are critical aspects of grinding processes for hard and brittle materials. Despite extensive research, the impact of residual cracks from coarse grinding on the cracks generated during fine grinding remains unexplored...