Three-dimensional (3D) integration based on through-silicon-via (TSV) technology provides a solution to the miniaturization of electronic systems. In this paper, novel integrated passive devices (IPDs) including capacitor, inductor, and bandpass filt...
In this study, the filling process of high aspect ratio through-silicon-vias (TSVs) under dense conditions using the electroplating method was efficiently achieved and optimized. Pulsed power was used as the experimental power source and the electrop...
For high-volume production of 3D-stacked chips with through-silicon-vias (TSVs), wafer-scale bonding offers lower production cost compared with bump bond technology and is promising for interconnect pitches smaller than 5 µ using available tooling. P...
Along with deep scaling transistors and complex electronics information exchange networks, very-large-scale-integrated (VLSI) circuits require high performance and ultra-low power consumption. In order to meet the demand of data-abundant workloads an...
For performance-driven systems such as space-based applications, it is important to maximize the gain of radio-frequency amplifiers (RFAs) with a certain tolerance against radiation, temperature effects, and small form factor. In this work, we presen...
In this study, a 3D coil embedded in a silicon substrate including densely distributed through-silicon vias (TSVs) was fabricated via a rapid metal powder sintering process. The filling and sintering methods for microdevices were evaluated, and the e...
In reconfigurable radio frequency (RF) microsystems, the interconnect structure critically affects high-frequency signal integrity, and the accuracy of electromagnetic (EM) modeling directly determines the overall system performance. Conventional neu...
Reliability risks for two different types of through-silicon-vias (TSVs) are discussed in this paper. The first is a partially-filled copper TSV, if which the copper layer covers the side walls and bottom. A polymer is used to fill the rest of the ca...
Through-silicon-via (TSV)-based coaxial line techniques can reduce the high-frequency loss due to the low resistivity in the silicon substrate and thus can improve the efficiency of vertical signal transmission. Moreover, a TSV-based coaxial structur...
As thermal management in 3DIC integration becomes increasingly important in advanced semiconductor node processes, novel experimental and modeling approaches are in great demand to reveal the critical material issues involving multiscale microstructu...
The through-silicon-vias (TSVs) process is a vital technology in microelectromechanical systems (MEMS) packaging. The current via filling technique based on copper electroplating has many shortcomings, such as involving multi-step processes, requirin...
Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI) is discussed. Bumpless interconnects between wafers and between chips and wafers are a second-generation alternative to...
A 6-bit Ku band digital step attenuator with low phase variation is presented in this paper. The attenuator is designed with 0.13-μm SiGe BiCMOS process technology using triple well isolation N-Metal-Oxide-Semiconductor (TWNMOS) and through-silico...
This review investigates the measurement methods employed to assess the geometry and electrical properties of through-silicon vias (TSVs) and examines the reliability issues associated with TSVs in 3D integrated circuits (ICs). Presently, measurement...
For the analysis of thin films, with high aspect ratio (HAR) structures, time-of-flight secondary ion mass spectrometry (ToF-SIMS) overcomes several challenges in comparison to other frequently used techniques such as electron microscopy. The researc...
Advanced packaging represents a crucial technological evolution aimed at overcoming limitations posed by Moore’s Law, driving the semiconductor industry from two-dimensional toward three-dimensional integrated structures. The increasing complex...
Through-Silicon-Via (TSV) technology is of crucial importance in the process of defect-free copper filling in vias. In this study, the small molecule 2-mercapto-1-methylimidazole (SN2) is proposed as a new leveler. It enables bottom-up super-filling...
Micro-electro-mechanical system (MEMS) pressure sensors play a significant role in pulse wave acquisition. However, existing MEMS pulse pressure sensors bound with a flexible substrate by gold wire are vulnerable to crush fractures, leading to sensor...
By using through-silicon-vias (TSV), three dimension integration technology can stack large memory on the top of cores as a last-level on-chip cache (LLC) to reduce off-chip memory access and enhance system performance. However, the integration of mo...
Typical 3D integrated circuit structures based on through-silicon vias (TSVs) are complicated to study and analyze. Therefore, it seems important to find some methods to investigate them. In this paper, a method is proposed to model and compute the t...
Die-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip co...
Tuning fork gyroscopes (TFGs) are promising for potential high-precision applications. This work proposes and experimentally demonstrates a novel high-Q dual-mass tuning fork microelectromechanical system (MEMS) gyroscope utilizing three-dimensional...