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Open AccessArticle

A 6-Bit Ku Band Digital Step Attenuator with Low Phase Variation in 0.13-μm SiGe BiCMOS

1
Institute of RF-& OE-ICs, Southeast University, Nanjing 210096, China
2
Engineering Research Center of RF-ICs and RF-Systems, Ministry of Education, Southeast University, Nanjing 210096, China
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(10), 1149; https://doi.org/10.3390/electronics8101149
Received: 19 September 2019 / Revised: 7 October 2019 / Accepted: 9 October 2019 / Published: 11 October 2019
(This article belongs to the Special Issue Microwave Integrated Circuits Design and Application)
A 6-bit Ku band digital step attenuator with low phase variation is presented in this paper. The attenuator is designed with 0.13-μm SiGe BiCMOS process technology using triple well isolation N-Metal-Oxide-Semiconductor (TWNMOS) and through-silicon-via (TSV). TWNMOS is mainly used to improve the performance of switches and reduce the insertion loss (IL). TSV is utilized to provide approximately ideal global current ground plane with low impedance for the attenuator. In addition, substrate floating technique and new capacitance compensation technique are adopted in the attenuator to improve the linearity and decrease the phase variation. The measured results show that the attenuator IL is 6.99–9.33 dB; the maximum relative attenuation is 31.87–30.31 dB with 0.5-dB step (64 states), the root mean square (RMS) for the amplitude error is 0.58–0.36 dB and the phase error RMS is 2.06–3.46° in the 12–17 GHz frequency range. The total chip area is 1 × 0.9 mm2. View Full-Text
Keywords: digital step attenuator; low phase variation; triple well isolation NMOS; wideband; CMOS integrated circuits digital step attenuator; low phase variation; triple well isolation NMOS; wideband; CMOS integrated circuits
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MDPI and ACS Style

Luo, L.; Li, Z.; Yao, Y.; Cheng, G. A 6-Bit Ku Band Digital Step Attenuator with Low Phase Variation in 0.13-μm SiGe BiCMOS. Electronics 2019, 8, 1149.

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