Advanced 3D Integration Technologies: TSVs, Interconnects and Packaging
This special issue belongs to the section "D1: Semiconductor Devices".
Special Issue Information
Dear Colleagues,
3D integration is a transformative paradigm for realizing “More than Moore” beyond the limitations of conventional transistor miniaturization. By vertically stacking multiple heterogeneous chiplets, 3D integration offers advantages such as reduced interconnect latency, enhanced bandwidth density, improved power efficiency, and diverse system functionalities within a compact footprint. Recently, the rapid advancement of emerging research fields like artificial intelligence (AI) poses urgent demands on high-performance and high-reliability integration and packaging schemes, making it even more significant to develop novel 3D integration technologies with advanced structures, materials, and processes. Therefore, in this Special Issue, we invite authors to report new developments on advanced 3D integration technologies in terms of design, simulation, fabrication, characterization, and application. The potential topics include, but are not limited to advancements on heterogeneous integration and advanced packaging schemes, through-silicon vias (TSVs) and through-glass vias (TGVs), microbumps, hybrid bonding, redistribution layers (RDLs), heat management of integrated systems, thermo-mechanical reliability analyses, etc.
Dr. Ziyue Zhang
Prof. Dr. Yingtao Ding
Prof. Dr. Zhiming Chen
Guest Editors
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Keywords
- heterogeneous integration
- advanced packaging
- through-silicon vias (TSVs)
- through-glass vias (TGVs)
- microbumps
- hybrid bonding
- redistribution layers (RDLs)
- heat management
- thermo-mechanical reliability
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