Design Explorations and Novel Architectures on FPGA

Dear Colleagues,

The remarkable evolution of FPGA technology—from simple logic devices to heterogeneous, billion-transistor systems-on-chip—has established FPGAs as a cornerstone of modern computing. The combination of fine-grained reconfigurability, massive spatial parallelism, hard IP blocks, and energy efficiency enables application-specific acceleration that often surpasses conventional solutions. Today’s FPGAs not only support high-performance and ultra-low-power implementations but also provide unique opportunities to realize secure and real-time critical systems across domains ranging from edge AI to 5G infrastructure.

However, realizing state-of-the-art FPGA-based designs demands deep co-design between algorithms, architectures, and implementation techniques. While modern high-level synthesis tools have significantly lowered the barrier to FPGA implementation, there still remains substantial potential in architecture-aware design at the register-transfer level. Moreover, leveraging the unique features of FPGA fabrics, such as fine-grained pipelining, custom memory hierarchies, and heterogeneous hard blocks, typically requires deep hardware insight that lies beyond the scope of current automation flows.

This Special Issue, entitled “Design Explorations and Novel Architectures on FPGA”, seeks to present new benchmarks for various applications in performance, power efficiency, security, or reliability, which thoughtfully exploit FPGA-specific capabilities such as dynamic reconfiguration, DSP/memory blocks, or fine-grain parallelism. Topics of interest include, but are not limited to, the following:

• Cryptographic primitives and optimized implementations;
• Cryptographic processors and coprocessors;
• Reconfigurable hardware for cryptography;
• Engineering of zero-knowledge proof systems;
• Post-quantum security;
• Telecommunication algorithms, protocols, and implementations;
• Image/Signal processing algorithms and implementations;
• Biomedical applications;
• Embedded systems;
• IoT applications;
• Artificial intelligence and machine learning acceleration;
• FPGA/ASIC methodologies;
• Microarchitectures;
• Hardware–Algorithm co-design;
• Synthesis, physical design, timing closure, and PPA optimization;
• System-level design for reconfigurable and adaptive computing;
• Low-power or energy-efficient designs;
• High-performance FPGA implementations of compute-intensive algorithms;
• Design studies that inform FPGA device architectures, or heterogeneous integration strategies;
• Novel application domains enabled or significantly enhanced by FPGA.

We look forward to receiving your contributions.

Dr. Gangqiang Yang
Dr. Lei Chen
Dr. Fudong Li
Guest Editors

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