FPGA-Based Accelerators for Deep Neural Networks
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Artificial Intelligence".
Deadline for manuscript submissions: 30 June 2026 | Viewed by 1141
Special Issue Editor
Interests: AI/ML acceleration chip; in/near-memory computing
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
In recent years, deep learning has achieved remarkable breakthroughs across various artificial intelligence (AI) domains, including computer vision, natural language processing, and generative AI. The advent of large-scale models, such as Transformer-based Large Language Models (LLMs) and Diffusion models, has further pushed the boundaries of AI capabilities. However, these models come with ever-increasing computational complexity and memory demands, posing significant challenges to conventional computing platforms in terms of performance, energy efficiency, and scalability. Neuromorphic computing, inspired by the brain's neural architecture, offers a promising pathway toward ultra-low-power intelligent systems. In this context, Field-Programmable Gate Arrays (FPGAs) have emerged as a highly attractive platform for accelerating both deep learning and neuromorphic algorithms, from edge devices to cloud servers. Key advantages of FPGAs include their high reconfigurability, rapid deployment cycles, capability for customized architecture design, and support for software–hardware co-design in System-on-Chip (SoC) configurations.
This Special Issue aims to showcase cutting-edge research on hardware acceleration of deep neural networks using FPGAs, with particular interest in optimizations for modern architectures like Transformers, LLMs, and Diffusion models. Topics of interest include, but are not limited to, the following:
- Algorithm–hardware co-design for efficient FPGA-based DNN acceleration;
- System-level design and software tools for compiling and deploying models on FPGAs;
- Reconfigurable and adaptive computing architectures for AI/ML workloads;
- FPGA-based rapid prototyping of ML systems, including large-scale models;
- Programmable neuromorphic and spiking neural network implementations on FPGAs;
- Deployment and evaluation of Transformer, LLM, and Diffusion models on reconfigurable hardware;
- Design of FPGA accelerators with optimized attention mechanisms and generative model blocks;
- AI systems based on coarse-grained reconfigurable architectures (CGRAs);
- Novel applications and case studies demonstrating FPGA-based intelligence.
We invite original contributions that address the optimization, implementation, and application of FPGA-based accelerators for current and next-generation deep learning models.
Dr. Yufei Ma
Guest Editor
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Keywords
- FPGA
- hardware acceleration
- deep neural networks
- reconfigurable computing
- algorithm–hardware co-design
- transformer
- diffusion
- large language models
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