15 Results Found

In this work, the degradation of the random telegraph noise (RTN) and the threshold voltage (Vt) shift of an 8.3Mpixel stacked CMOS image sensor (CIS) under hot carrier injection (HCI) stress are investigated. We report for the first time the signifi...

Hot carrier injection (HCI) can generate interface traps or oxide traps mainly by dissociating the Si-H or Si-O bond, thus affecting device performances such as threshold voltage and saturation current. It is one of the most significant reliability i...

Device guidelines for reducing power with punch-through current annealing in gate-all-around (GAA) FETs were investigated based on three-dimensional (3D) simulations. We studied and compared how different geometric dimensions and materials of GAA FET...

Many silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistors (MOSFETs) are used in deep space detection systems because they have higher radiation resistance than bulk silicon devices. However, SOI devices have to fa...

A gate all around with back-gate (GAAB) structure was proposed for 3D NAND Flash memory technology. We demonstrated the excellent characteristics of the GAAB NAND structure, especially in the self-boosting operation. Channel potential of GAAB shows a...

This study systematically investigates the mechanism by which total ionizing dose (TID) affects the lifetime degradation of NMOS devices induced by hot-carrier injection (HCI). Experiments involved Cobalt-60 (Co-60) gamma-ray irradiation to a cumulat...

As the device feature size shrinks, the dissipation of power increases and further raises the carrier and lattice temperature, which finally affects device performance. In this paper, we analyze the comprehensive influence of the self-heating effect...

The working environment of electronic devices in the aerospace field is harsh. In order to ensure the reliable application of the SOI FinFET, the total ionizing dose (TID) and hot carrier injecting (HCI) reliability of an SOI FinFET were investigated...

Despite the advantages of fin field-effect transistors (FinFETs), there are hidden issues such as electric field enhancement and exacerbated self-heating effects, which will intensify device aging effects. Due to the escalating costs associated with...

The gate-all-around (GAA) nanosheet (NS) field-effect-transistor (FET) is poised to replace FinFET in the 3 nm CMOS technology node and beyond, marking the second seminal shift in device architecture across the extensive 60-plus-year history of MOSFE...

As semiconductor processes enter the nanoscale, system-on-chip (SoC) interconnects suffer from link aging owing to negative bias temperature instability (NBTI), hot carrier injection (HCI), and electromigration. In network-on-chip (NoC) for heterogen...

The rapid progress of artificial neural networks (ANN) is largely attributed to the development of the rectified linear unit (ReLU) activation function. However, the implementation of software-based ANNs, such as convolutional neural networks (CNN),...

In this work, we propose a SiC-NSFET structure that uses a PTS scheme only under the gate, with SiC layers under the source and drain, to improve the leakage current and thermal reliability. Punch-through stopper (PTS) doping is widely used to suppre...

Silicon-Based Physical Unclonable Functions (PUFs) exploit inherent manufacturing variations to produce a unique, random, and ideally unclonable secret key. As electronic devices are decommissioned and sent for End of Life (EOL) recycling, the encryp...

With CMOS technology aggressively scaling towards the 22-nm node, modern FPGA devices face tremendous aging-induced reliability challenges due to bias temperature instability (BTI) and hot carrier injection (HCI). This paper presents a novel anti-agi...