Special Issue "CMOS-MEMS Fabrication Technologies and Devices"

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E:Engineering and Technology".

Deadline for manuscript submissions: closed (20 January 2023) | Viewed by 9291

Special Issue Editors

School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore
Interests: micromachining; nanofabrication; 3D integration; CMOS-MEMS stacking; advanced packaging
Special Issues, Collections and Topics in MDPI journals
Faculty of Engineering and Natural Sciences, Sabanci University, Tuzla 34956, Istanbul, Turkey
Interests: edge-AI; IoT; millimeter-wave; sub-terahertz; CMOS
School of Electronic and Information Engineering/School of Integrated Circuits, Guangxi Normal University, Guilin 541004, China
Interests: MEMS technique; magnetism and magnetic nanomaterials; micro magnetic sensor and microsystem; BioMEMS and microfluidics; biosensors; biochips

Special Issue Information

Dear Colleagues,

Electronics are extremely popular in our daily life. Semiconductors such as complementary metal oxide semiconductor (CMOS) and micro-electro-mechanical system (MEMS) are key devices in the electronic field. CMOS can be integrated with MEMS components within a single chip (3D integration) to produce compact and low-cost CMOS-MEMS devices for multiple applications (chemical sensing, energy harvesting, signal transmission, and others). Therefore, these devices’ fabrication and integration are essential for the development of the society. This Special Issue aims to gather high quality research contributions dealing with MEMS devices integrated with CMOS, independently of fabrication technologies and final applications.

Dr. Liangxing Hu
Dr. Korkut Kaan Tokgoz
Dr. Zhen Yang
Guest Editors

Manuscript Submission Information

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Keywords

  • CMOS-MEMS fabrication technologies
  • CMOS
  • MEMS
  • CMOS-MEMS integration
  • 3D integration

Published Papers (9 papers)

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Research

Article
A CMOS-MEMS Pixel Sensor for Thermal Neutron Imaging
Micromachines 2023, 14(5), 952; https://doi.org/10.3390/mi14050952 - 27 Apr 2023
Viewed by 360
Abstract
A monolithic pixel sensor with high spatial granularity (35 × 40 μm2) is presented, aiming at thermal neutron detection and imaging. The device is made using the CMOS SOIPIX technology, with Deep Reactive-Ion Etching post-processing on the backside to obtain high [...] Read more.
A monolithic pixel sensor with high spatial granularity (35 × 40 μm2) is presented, aiming at thermal neutron detection and imaging. The device is made using the CMOS SOIPIX technology, with Deep Reactive-Ion Etching post-processing on the backside to obtain high aspect-ratio cavities that will be filled with neutron converters. This is the first monolithic 3D sensor ever reported. Owing to the microstructured backside, a neutron detection efficiency up to 30% can be achieved with a 10B converter, as estimated by the Geant4 simulations. Each pixel includes circuitry that allows a large dynamic range and energy discrimination and charge-sharing information between neighboring pixels, with a power dissipation of 10 µW per pixel at 1.8 V power supply. The initial results from the experimental characterization of a first test-chip prototype (array of 25 × 25 pixels) in the laboratory are also reported, dealing with functional tests using alpha particles with energy compatible with the reaction products of neutrons with the converter materials, which validate the device design. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
Selective Sensing of Mixtures of Gases with CMOS-SOI-MEMS Sensor Dubbed GMOS
Micromachines 2023, 14(2), 390; https://doi.org/10.3390/mi14020390 - 04 Feb 2023
Cited by 1 | Viewed by 667
Abstract
The need to achieve digital gas sensing technology, namely, a technology to sense and transmit gas-enabled digital media, has been recognized as highly challenging. This challenge has motivated the authors to focus on complementary metal oxide semiconductor silicon on insulator micro electro-mechanical system [...] Read more.
The need to achieve digital gas sensing technology, namely, a technology to sense and transmit gas-enabled digital media, has been recognized as highly challenging. This challenge has motivated the authors to focus on complementary metal oxide semiconductor silicon on insulator micro electro-mechanical system (CMOS-SOI-MEMS) technologies, and the result is a new pellistor-like sensor, dubbed GMOS, with integrated signal processing. In this study, we describe the performance of such sensors for the selective detection of mixtures of gases. The novel key ideas of this study are: (i) the use of the GMOS for gas sensing; (ii) applying the Kalman filter to improve the signal-to-noise ratio; (iii) adding artificial intelligence (AI) with tiny edge approach. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
Impact of Various Thermistors on the Properties of Resistive Microbolometers Fabricated by CMOS Process
Micromachines 2022, 13(11), 1869; https://doi.org/10.3390/mi13111869 - 30 Oct 2022
Cited by 2 | Viewed by 693
Abstract
Microbolometers based on the CMOS process has the important advantage of being automatically merged with circuits in the fabrication of larger arrays, but they typically suffer from low detectivity due to the difficulty in realizing high-sensitivity thermistors in the CMOS process. In this [...] Read more.
Microbolometers based on the CMOS process has the important advantage of being automatically merged with circuits in the fabrication of larger arrays, but they typically suffer from low detectivity due to the difficulty in realizing high-sensitivity thermistors in the CMOS process. In this paper, two resistive microbolometers based on polysilicon and metal Al thermistors, respectively, are designed and fabricated by the standard CMOS process. Experimental results show that the detectivity of the two resistive microbolometers can reach a maximum of 1.78 × 109 cmHz1/2/W at 25 μA and a maximum of 6.2 × 108 cmHz1/2/W at 267 μA. The polysilicon microbolometer exhibits better detectivity at lower bias current due to its lower effective thermal conductivity and larger resistance. Even though the thermal time constant of the polysilicon thermistor is three times slower than that of the metal Al thermistor, the former is more suitable for designing a thermal imaging system with sensitive and low power consumption. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
An Ultra-Compact MEMS Pirani Sensor for In-Situ Pressure Distribution Monitoring
Micromachines 2022, 13(10), 1686; https://doi.org/10.3390/mi13101686 - 07 Oct 2022
Viewed by 910
Abstract
In this study, we designed a microelectromechanical system (MEMS) Pirani vacuum sensor with a compact size. Specifically, the sensor was successfully fabricated based on the Pirani principle and using a commercial eight-inch MEMS foundry process. The sensor fabrication process was carried out using [...] Read more.
In this study, we designed a microelectromechanical system (MEMS) Pirani vacuum sensor with a compact size. Specifically, the sensor was successfully fabricated based on the Pirani principle and using a commercial eight-inch MEMS foundry process. The sensor fabrication process was carried out using only four photomasks and the proposed sensor had an ultra-compact fabricated size (<2.2 × 2.2 mm2). A vacuum measurement system was set up to comprehensively evaluate the fabricated sensors. The results demonstrated that the MEMS Pirani vacuum sensor has a high responsivity in the low-pressure domain from 100 Pa. The proposed sensor with a 953.0-Ω heater exhibited an average responsivity of 11.9 mV/Pa in the preferred range of 100 to 7 Pa and 96.0 mV/Pa in the range of 7 to 1 Pa. The sensor may be potentially suitable in many applications, such as vacuum indicators for processing equipment, health monitoring systems for social infrastructure, and medical and health applications. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Communication
An Experimental Investigation of the Degradation of CMOS Low-Noise Amplifier Specifications at Different Temperatures
Micromachines 2022, 13(8), 1268; https://doi.org/10.3390/mi13081268 - 06 Aug 2022
Viewed by 945
Abstract
To investigate the relationship between the specifications degradation of a low-noise amplifier (LNA) and temperature, we experimentally investigated the degradation characteristics of the specifications of the LNA at different temperatures. The small-signal gain (S21) of the LNA decreases with increasing temperature. This paper [...] Read more.
To investigate the relationship between the specifications degradation of a low-noise amplifier (LNA) and temperature, we experimentally investigated the degradation characteristics of the specifications of the LNA at different temperatures. The small-signal gain (S21) of the LNA decreases with increasing temperature. This paper discusses and analyzes the experimental results in detail, and the reasons for the degradation of LNA specifications with temperature changes are known. Finally, we have tried to use the structure already available in the literature for the PA temperature compensation circuit for the temperature compensation of the LNA. The results show that the existing circuit structure for PA temperature compensation in the literature can also effectively compensate for the S21 and NF degradation of the LNA due to the temperature increase. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
Thermoelectric Energy Micro Harvesters with Temperature Sensors Manufactured Utilizing the CMOS-MEMS Technique
Micromachines 2022, 13(8), 1258; https://doi.org/10.3390/mi13081258 - 05 Aug 2022
Cited by 1 | Viewed by 842
Abstract
This study develops a TEMH (thermoelectric energy micro harvester) chip utilizing a commercial 0.18 μm CMOS (complementary metal oxide semiconductor) process. The chip contains a TEMH and temperature sensors. The TEMH is established using a series of 54 thermocouples. The use of the [...] Read more.
This study develops a TEMH (thermoelectric energy micro harvester) chip utilizing a commercial 0.18 μm CMOS (complementary metal oxide semiconductor) process. The chip contains a TEMH and temperature sensors. The TEMH is established using a series of 54 thermocouples. The use of the temperature sensors monitors the temperature of the thermocouples. One temperature sensor is set near the cold part of the thermocouples, and the other is set near the hot part of the thermocouples. The performance of the TEMH relies on the TD (temperature difference) at the CHP (cold and hot parts) of the thermocouples. The more the TD at the CHP of the thermocouples increases, the higher the output voltage and output power of the TEMH become. To obtain a higher TD, the cold part of the thermocouples is designed as a suspended structure and is combined with cooling sheets to increase heat dissipation. The cooling sheet is constructed of a stack of aluminum layers and is mounted above the cold part of the thermocouple. A finite element method software, ANSYS, is utilized to compute the temperature distribution of the TEMH. The TEMH requires a post-process to obtain the suspended thermocouple structure. The post-process utilizes an RIE (reactive ion etch) to etch the two sacrificial materials, which are silicon dioxide and silicon substrate. The results reveal that the structure of the thermocouples is completely suspended and does not show any injury. The measured results reveal that the output voltage of the TEMH is 32.5 mV when the TD between the CHP of the thermocouples is 4 K. The TEMH has a voltage factor of 8.93 mV/mm2K. When the TD between the CHP of the thermocouples is 4 K, the maximum output power of the TEMH is 4.67 nW. The TEMH has a power factor of 0.31 nW/mm2K2. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
Fabrication and Electrical Characterization of High Aspect Ratio Through-Silicon Vias with Polyimide Liner for 3D Integration
Micromachines 2022, 13(7), 1147; https://doi.org/10.3390/mi13071147 - 20 Jul 2022
Cited by 1 | Viewed by 1098
Abstract
High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and other devices. In this study, HAR [...] Read more.
High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and other devices. In this study, HAR TSVs with a diameter of 11 μm and an aspect ratio of 10:1 are successfully fabricated in a low-cost process flow. Conformal polyimide (PI) liners are deposited using a vacuum-assisted spin coating technique, and the effects of spin coating time and speed on the deposition results are discussed. Then, continuous Cu seed layers are fabricated by sequential sputtering and ultrasound-assisted electroless plating. Additionally, void-free and seamless Cu conductors are formed by electroplating. Moreover, a semi-additive method is used to fabricate the redistribution layers (RDLs) on the insulating layers of photosensitive PI (PSPI). Notably, a plasma bombardment process is introduced to remove residual PSPI in the contact windows between RDLs and central pillars. Results show that the resistance of a single TSV from a daisy chain of 144 TSVs with density of 2000/mm2 is about 28 mΩ. Additionally, the S-parameters of a single TSV are obtained using L-2L de-embedding technology, and the experimental and simulated results agree well. The proposed low-cost fabrication technologies and the related electrical characterization of PI-TSVs are significant for the application of HAR TSVs in modern heterogeneous integration systems. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
On-Chip Temperature Compensation for Small-Signal Gain Variation Reduction
Micromachines 2022, 13(7), 1101; https://doi.org/10.3390/mi13071101 - 13 Jul 2022
Cited by 1 | Viewed by 821
Abstract
Power amplifier (PA) specifications are closely related to changes in temperature; thus, the small-signal gain (S21) of PA decreases with the temperature increase. To compensate for the degradation caused by the decrease in S21, we present a compensation circuit that consists of two [...] Read more.
Power amplifier (PA) specifications are closely related to changes in temperature; thus, the small-signal gain (S21) of PA decreases with the temperature increase. To compensate for the degradation caused by the decrease in S21, we present a compensation circuit that consists of two diodes and four resistors. At the same time, a differential stacked millimeter-wave wideband PA was designed and implemented based on this compensation circuit and 55 nm CMOS process. The post-layout simulation results showed that the fluctuation of S21 reduced from 2.4 dB to 0.1 dB in the frequency range of 25−40 GHz over the temperature range of −40 °C to 125 °C. Furthermore, the proposed on-chip temperature compensation circuit also applies to multi-stage cascaded microwave/mm-wave power amplifiers. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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Article
Investigation of the Specification Degradation Mechanism of CMOS Power Amplifier under Thermal Shock Test
Micromachines 2022, 13(6), 815; https://doi.org/10.3390/mi13060815 - 24 May 2022
Cited by 1 | Viewed by 976
Abstract
To investigate the critical specifications of a power amplifier (PA) under rapidly changing temperature conditions, we fabricated and tested a 0.3–1.1 GHz complementary metal–oxide–semiconductor (CMOS) PA under thermal shock tests. The results show that high- and low-temperature shocks can accelerate the degradation of [...] Read more.
To investigate the critical specifications of a power amplifier (PA) under rapidly changing temperature conditions, we fabricated and tested a 0.3–1.1 GHz complementary metal–oxide–semiconductor (CMOS) PA under thermal shock tests. The results show that high- and low-temperature shocks can accelerate the degradation of critical specifications of PAs and that the critical specifications of PAs degrade with the increasing number of shocks. The main reason for the degradation of critical specifications of PAs with increasing thermal shock tests is the mismatch of thermal expansion coefficients of printed circuit boards (PCB) with FR-4 as a substrate. The results of this paper can provide a reference for the development of temperature-robust PAs design guidelines for the implementation of temperature-robust PAs using low-cost silicon technology. Full article
(This article belongs to the Special Issue CMOS-MEMS Fabrication Technologies and Devices)
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