Design of Low-Power Circuits and Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 June 2026 | Viewed by 1717

Special Issue Editors


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Guest Editor
Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA
Interests: adaptive computer architectures; resilient and energy-aware logic design; evolvable hardware and FPGAs; autonomous; reconfigurable; self-aware systems
Special Issues, Collections and Topics in MDPI journals

E-Mail Website
Guest Editor
Electrical and Computer Engineering, Southern Illinois University-Edwardsville, Edwardsville, IL 62026, USA
Interests: asynchronous logic design and optimization; design automation; low-power and resilient digital designs; testing and verification

Special Issue Information

Dear Colleagues,

In today’s technology-oriented world, the demand for low-power, high-speed, miniaturized, and reliable integrated circuits (ICs) is ever increasing. From consumer electronics to industrial applications, the demand for energy-efficient solutions is ubiquitous across multiple domains. Low-power electronics comprise a cornerstone of sustainable computing, creating a venue to implement energy-efficient embedded computing for numerous IoT applications, enabling the widespread deployment of connected devices capable of operating autonomously with low/no maintenance. Additionally, at the systems level, fast and low-power memory systems and innovative system-on-chip (SoC) power management schemes are vital for optimizing the efficiency of modern computing systems. Furthermore, the rise of artificial intelligence (AI) and machine learning (ML) has driven the need for high-performance and power-efficient AI/ML hardware and accelerators, where balancing performance, computational intensity, and energy consumption become extremely crucial. In the context of green computing, energy harvesting provides an emerging paradigm for power sources. Transformative research in the pertinent field of reliable, low-voltage, and near-threshold computing, as well as efficient power transfer schemes, can significantly advance the development of self-powered systems, enabling them to function properly with limited and/or variable energy supplies. Advancements in low-power sensor interfaces will be crucial in the future, particularly for the next generation of healthcare, monitoring, and unsupervised surveillance technologies. This Special Issue on the design of low-power circuits and systems aims to emphasize the most recent cutting-edge research and innovations in these areas, advancing the future of low-power, high-efficiency, and reliable electronics.

We aim to collect contributions pertaining to low-power circuits and systems design, and the topics to be covered include, but are not limited to, the following:

  1. Power-aware digital, analog, or hybridized circuit design;
  2. Low-voltage and near-threshold computing;
  3. Energy-efficient computing approaches for IoT applications;
  4. Power-efficient AI/ML hardware and accelerator approaches;
  5. Energy harvesting circuits for self-powered systems;
  6. Low-power memory system designs;
  7. Beyond CMOS devices for low-power and/or non-volatile applications;
  8. System-on-chip (SoC) power management techniques;
  9. Low-power sensor interfaces for wearable and implantable devices.

Dr. Ronald F. DeMara
Dr. Ashiq A. Sakib
Guest Editors

Manuscript Submission Information

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Keywords

  • energy-efficient computing
  • beyond CMOS emerging technologies
  • near-threshold computing
  • power management techniques
  • low-power sensor interfaces
  • self-powered systems
  • AI/ML hardware and accelerators

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Published Papers (1 paper)

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Research

14 pages, 15601 KB  
Article
Hardware-Efficient Stochastic Computing-Based Neural Networks with SNN-Isomorphic LIF Activation
by Jiho Kim, Kaeun Lim and Youngmin Kim
Electronics 2026, 15(4), 768; https://doi.org/10.3390/electronics15040768 - 11 Feb 2026
Cited by 1 | Viewed by 799
Abstract
Recent advances in artificial intelligence have made power efficiency a primary objective in system design. In this context, stochastic computing (SC), which processes probabilistic bitstreams using simple logic, and spiking neural networks (SNNs), a neuromorphic paradigm, have gained prominence as alternative approaches. This [...] Read more.
Recent advances in artificial intelligence have made power efficiency a primary objective in system design. In this context, stochastic computing (SC), which processes probabilistic bitstreams using simple logic, and spiking neural networks (SNNs), a neuromorphic paradigm, have gained prominence as alternative approaches. This study proposes a Stochastic Computing Neural Network (SC-NN) framework that minimizes the intrinsic errors of stochastic computing and leverages the isomorphism between one-count operations on bitstreams and spike-rate computations in spiking neural networks, yielding improvements in accuracy and hardware efficiency. In contrast to earlier studies that utilized independent random number sequences of 10 bits or higher, our study employed a practically implementable 8-bit linear feedback shift Register (LFSR)-based pseudo-random bitstream. Using 4 taps and 255 seeds improves the realism of the hardware. Despite the inherent accuracy ceiling of pseudo-random sequences, the proposed method achieves higher accuracy. Applied to an 8-bit SC-based neural network accelerator, the proposed design improves accuracy by 35% over a conventional FSM baseline, while reducing power and area by 43.8% and 17.2%, respectively, and decreasing delay by 5.5%. These improvements translate to a 2.3× enhancement in the Figure of Merit (FoM), which was further verified through physical layout and FPGA results. Overall, this work introduces a new paradigm that enables simultaneous gains in accuracy and efficiency for low-power AI by suppressing the error sources and embedding the structural similarity between SNNs and SC into the design. Full article
(This article belongs to the Special Issue Design of Low-Power Circuits and Systems)
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