In this paper, we propose rate-splitting (RS) multiple access to mitigate the effects of quantization noise (QN) inherent in low-resolution analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). We consider the downlink (DL) of...
This paper presents an analog delay-locked loop (DLL) with a digital coarse lock and error compensation, designed to enhance locking speed in duty-cycled operation while ensuring reliability. To accelerate coarse locking speed and prevent coarse lock...
This paper concentrates on the rate analysis and optimization for a downlink cell-free massive multi-input multi-output (MIMO) system with mixed digital-to-analog converters (DACs), where some of the access points (APs) use perfect-resolution DACs, w...
With the explosive growth of micro-video applications, the transmission burden of fronthaul and backhaul links is increasing, and meanwhile, a lot of energy consumption is also generated. For reducing energy consumption and transmission delay burden,...
This paper presents a design methodology for a low-power, low-chip-area, and high-resolution successive approximations register (SAR) analog-to-digital converter (ADC). The proposed method includes a segmented capacitive DAC (C-DAC) to reduce the pow...
This paper presents a successive approximation register (SAR) analog-to-digital converter (ADC) designed for a wireless power transfer system. This is a four–channel SAR ADC structure with 10-bit resolution for each channel, which can also be a...
In this paper, a ΔΣ analog-to-digital converter (ADC) was designed and measured for broadband and high-resolution applications by applying the simple circuit technique to alleviate the feedback timing of input feed-forward architecture. W...
This study investigated wideband waveform generation using a field programmable gate array (FPGA) for X-band high-resolution synthetic aperture radar (SAR). Due to the range resolution determined by the bandwidth, we focused on wide bandwidth generat...
Battery-powered Internet-of-Things applications require high-resolution, energy-efficient analog-to-digital converters (ADCs). There are still limited works on sub-MHz-bandwidth ADC designs. This paper presents a sturdy multi-stage shaping (SMASH) di...