New Advances of FPGAs in Signal Processing

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 May 2025 | Viewed by 2468

Special Issue Editors


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Guest Editor
1. Conseil Européen pour la Recherche Nucléaire (CERN), Esplanade des Particules 1, Meyrin, Geneva 1211, Switzerland
2. Instituto de Física Corpuscular (CSIC-UV), Parc Científic de la Universitat de València, C/ Catedrático José Beltrán 2, Paterna E-46980, Spain
Interests: FPGA; system-on-chip: data acquisition systems; real-time systems; artificial neural networks; quantized neural networks; high-speed pcb design; signal and power integrity

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Guest Editor Assistant
Kirchhoff-Institute for Physics, Heidelberg University, Heidelberg 69120, Germany
Interests: electronic design; digital electronics; control systems; integrated systems; embedded designs; detectors; triggers; FPGA; SoC; communication systems

Special Issue Information

Dear Colleagues,

We are pleased to announce a Special Issue of Electronics focusing on the latest advancements in field-programmable gate arrays (FPGAs) applied to signal processing. FPGA-based systems have been established as key technologies in a wide range of application fields, including radio frequency communications, audio and image processing, high-energy physics, and radar systems. This widespread use is mainly driven by their extreme flexibility for being reconfigured, capability of parallelizing tasks, low latency, and a remarkably high performance over other well-established technologies.

This Special Issue aims to explore innovative and novel signal processing advancements of FPGA systems. We welcome contributions with the following research topics:

  • Novel architectures for signal processing;
  • Audio and video applications;
  • Real-time processing;
  • Radar and sonar systems;
  • Wireless communication systems;
  • Medical imaging applications;
  • Artificial intelligence applied to signal processing;
  • Quantization of complex algorithms;
  • High-level synthesis and optimization tools and strategies.

We welcome original research articles and reviews that contribute significant insights into advancing the field of signal processing in FPGA-based systems. Submissions should address key challenges and propose innovative solutions to overcome the complexities of implementing signal processing algorithms in FPGAs.

Dr. Fernando Carrio
Guest Editor

Dr. Tigran Mkrtchyan
Guest Editor Assistant

Manuscript Submission Information

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Keywords

  • FPGAs
  • signal processing
  • digital filters
  • medical imaging
  • wireless communications
  • security applications
  • data acquisition
  • audio and video processing
  • neural networks

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Published Papers (3 papers)

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21 pages, 1643 KiB  
Article
Readout System for Multipurpose Real-Time and Portable Spectrometer
by Diego Real, Jose Ballester, David Calvo, Mario Manzaneda, Alberto Moreno, Francisco Albiol and Luis Alonso
Electronics 2025, 14(3), 506; https://doi.org/10.3390/electronics14030506 - 26 Jan 2025
Viewed by 642
Abstract
A ready-to-use spectrometer-based product, which focuses on data acquisition using a BeagleBone board and a Hamamatsu C12666MA spectrometer module, is presented. The device meets stringent requirements, including the ability to measure the visible light spectrum over a wide range of intensities, being compact [...] Read more.
A ready-to-use spectrometer-based product, which focuses on data acquisition using a BeagleBone board and a Hamamatsu C12666MA spectrometer module, is presented. The device meets stringent requirements, including the ability to measure the visible light spectrum over a wide range of intensities, being compact and lightweight, and having customizable electronics to suit different application needs. The system’s primary component is a Hamamatsu C12666MA spectrometer module with a measurement range of 341 nm to 780 nm, which is supplemented by supporting electronics such as a microcontroller and an analog-to-digital converter. The development encompasses hardware design, the fabrication of a control board, and software development for spectral acquisition and visualization. The software controls the spectral measurement process and facilitates data processing and analysis. The results demonstrate that the designed system can accurately capture spectra and fulfill the specified requirements. Additionally, this work investigates and evaluates the potential migration of the data acquisition system to Field-Programmable Gate Array technology. Such a migration offers several advantages, including real-time processing, parallel data handling capabilities, reduced latency, and greater flexibility in adapting to various spectrometer configurations, as well as the possibility to work in a synchronized way with other devices. These improvements would significantly expand the system’s potential applications in real-time spectroscopy and other demanding optical measurement tasks. The proposed system thus provides a foundation for future enhancements, which could exploit Field-Programmable Gate Array technology, potentially revolutionizing the efficiency and application scope of portable spectrometry devices. Full article
(This article belongs to the Special Issue New Advances of FPGAs in Signal Processing)
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22 pages, 2021 KiB  
Article
Online Pulse Compensation for Energy Spectrum Determination: A Pole-Zero Cancellation and Unfolding Approach
by Tiago Motta Quirino, Thiago Campos Acácio Paschoalin, Guilherme Inácio Gonçalves, Pedro Henrique Braga Lisboa, Luciano Manhães de Andrade Filho and Bernardo Sotto-Maior Peralva
Electronics 2025, 14(3), 493; https://doi.org/10.3390/electronics14030493 - 25 Jan 2025
Viewed by 714
Abstract
Signal conditioning circuits, in particle energy spectrum determination systems, introduce shaping characteristics that affect pulse integrity. This study explores algorithms to compensate for these effects, focusing on digital signal processing for pole-zero cancellation (PZC) and unfolding techniques. The PZC algorithm successfully corrects baseline [...] Read more.
Signal conditioning circuits, in particle energy spectrum determination systems, introduce shaping characteristics that affect pulse integrity. This study explores algorithms to compensate for these effects, focusing on digital signal processing for pole-zero cancellation (PZC) and unfolding techniques. The PZC algorithm successfully corrects baseline shift and pulse amplitude loss, providing significant improvements in signal fidelity. Although a digital PZC applied in streaming for high event rates was previously not feasible, this work proposes its implementation on FPGA, combining it with the unfolding method to enable online compensation and enhanced performance under various experimental conditions. Full article
(This article belongs to the Special Issue New Advances of FPGAs in Signal Processing)
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17 pages, 4918 KiB  
Article
A Recursive Trigonometric Technique for Direct Digital Frequency Synthesizer Implementation
by Xing Xing, William Melek and Wilson Wang
Electronics 2024, 13(23), 4762; https://doi.org/10.3390/electronics13234762 - 2 Dec 2024
Cited by 1 | Viewed by 742
Abstract
This paper presents a novel recursive trigonometry (RT) technique for direct digital frequency synthesizer (DDFS) implementations. Traditional DDFS systems on field programmable gate arrays (FPGAs) either require a substantial amount of read-only memory (ROM) space to store reference values or depend on intricate [...] Read more.
This paper presents a novel recursive trigonometry (RT) technique for direct digital frequency synthesizer (DDFS) implementations. Traditional DDFS systems on field programmable gate arrays (FPGAs) either require a substantial amount of read-only memory (ROM) space to store reference values or depend on intricate angle rotation functions to approximate trigonometric values. The proposed RT technique offers a DDFS architecture without using the lookup table (LUT) method, and it can enhance signal accuracy and minimize power consumption. The effectiveness of the proposed RT technique has been implemented in a 13.5 kHz 16-bit DDFS with a minimum of 18.91 mW and was tested on a Lattice FPGA. The effectiveness of the proposed RT technology is assessed by using different FPGA platforms in terms of accuracy, hardware resource efficiency, and power consumption, especially in generating cosine waveforms. Full article
(This article belongs to the Special Issue New Advances of FPGAs in Signal Processing)
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