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Electronics
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Advances in Low Power Circuit and System Design and Applications
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Advances in Low Power Circuit and System Design and Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 30 September 2025 | Viewed by 2708

Special Issue Editor

Dr. Padmanabhan Balasubramanian

E-Mail Website
Guest Editor
College of Computing and Data Science, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore
Interests: approximate computing; asynchronous circuits; computer arithmetic; digital integrated circuits; fault-tolerant design; reliability; logic synthesis
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

We are delighted to announce an upcoming Special Issue of Electronics, titled “Advances in Low Power Circuit and System Design and Applications”. As the electronics industry pushes the boundaries of performance while striving for energy efficiency, this Special Issue seeks to highlight the latest research and developments in low-power design techniques and their diverse applications.

Scope and Topics of Interest

This Special Issue invites submissions of high-quality manuscripts presenting original research, comprehensive reviews, and detailed case studies on various aspects of low-power circuits and system design. Topics of interest include, but are not limited to, the following:

  • Low-Power Digital Circuit Design
    • Techniques for reducing power consumption in digital circuits, including logic synthesis, clock gating, and pipelining.
    • Design methodologies for low-power arithmetic and logic units (ALUs), memory elements, and interconnects.
  • Energy-Efficient Microarchitecture
    • Design strategies for energy-efficient processors, system-on-chips (SoCs), and multi-core systems.
    • Low-power memory hierarchy design, including cache architectures and memory management techniques.
  • Low-Power Analog and Mixed-Signal Design
    • Approaches to minimize power consumption in analog and mixed-signal circuits, such as low-power ADCs, DACs, and operational amplifiers.
    • Power-efficient design of RF and communication circuits.
  • Power Management Techniques
    • Dynamic voltage and frequency scaling (DVFS), power gating, and adaptive power management strategies.
    • Techniques for minimizing standby power and leakage current in integrated circuits.
  • Emerging Low-Power Technologies
    • Novel materials, devices, and circuit architectures that enable low-power consumption.
    • Innovations in nanotechnology, spintronics, and quantum devices for low-power applications.
  • Software and Algorithmic Techniques for Low Power
    • Compiler and software-level techniques for reducing power consumption in hardware.
    • Algorithmic strategies for energy-efficient computing and communication.
  • Modeling, Simulation, and Tools
    • Advanced tools and methodologies for modeling and simulating power consumption in circuits and systems.
    • Techniques for accurate power estimation and analysis during different stages of the design process, and techniques for verifying low-power designs.
  • Applications of Low-Power Circuits and Systems
    • Case studies and practical implementations in various domains, including the Internet of Things (IoT), mobile devices, biomedical electronics, and wearable technology.
    • Low power design approaches in automotive, aerospace, and industrial applications.

We look forward to receiving your valuable contributions and advancing the field of low-power circuits and system design. This Special Issue provides a unique platform for researchers, industry professionals, and practitioners to share their latest findings, foster collaboration, and drive innovation in energy-efficient electronics.

Dr. Padmanabhan Balasubramanian
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • low-power electronics
  • low-power design methodologies
  • energy-efficient circuit design
  • voltage and frequency scaling
  • power gating
  • low-power microarchitecture
  • energy harvesting
  • low-power analog design
  • power modeling and simulation
  • power-efficient data conversion
  • wearable electronics
  • power management ICs

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Further information on MDPI's Special Issue policies can be found here.

Published Papers (3 papers)

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Research

19 pages, 2044 KiB  
Article
A New Low-Power Circuit Design Optimization for Image Processing
by Mingkai Liu, Shuo Feng, Weihao Shan, Haohua Que, Jianchao Wang and Xinghua Yang
Electronics 2025, 14(2), 277; https://doi.org/10.3390/electronics14020277 - 11 Jan 2025
Viewed by 677
Abstract
A simple-to-implement and easy-to-integrate strategy for image processing is proposed in this paper, which effectively and efficiently optimizes the power consumption of both DRAM and SRAM. Since the power consumption of DRAM is proportional to the number of bit-‘1’s and the power consumption [...] Read more.
A simple-to-implement and easy-to-integrate strategy for image processing is proposed in this paper, which effectively and efficiently optimizes the power consumption of both DRAM and SRAM. Since the power consumption of DRAM is proportional to the number of bit-‘1’s and the power consumption of SRAM is linear relative to the flip probability, the proposed strategy first drops and encodes the image to minimize the number of bit-‘1’s per pixel. The processed data are then decoded, with the flag bit set to “1” to reduce the flip probability. In the experimental simulations, the power consumption of DRAM was reduced by up to 64.88%, while that of SRAM was reduced by up to 62.01%, with negligible circuit costs. In image display applications, the proposed strategy effectively compensates for certain errors in the JPEG system. In image classification tasks, there was only a 1–2% reduction in test set accuracy, demonstrating the superiority of truncation compensation. Additionally, the performance of the robot was negligibly affected by the approximate strategy, which shows the significant potential of the proposed strategy in the field of artificial intelligence and robotics. Full article
(This article belongs to the Special Issue Advances in Low Power Circuit and System Design and Applications)
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19 pages, 6604 KiB  
Article
Digitizing Low-Frequency Analog Control Circuit Using Bilinear Function Algorithm
by Hsiung-Cheng Lin and Zong-You Chen
Electronics 2025, 14(2), 273; https://doi.org/10.3390/electronics14020273 - 10 Jan 2025
Viewed by 613
Abstract
In the past, low-frequency analog control circuits were largely used in analog control systems. With the rapid development of modern digital electronic technology, the digitization of traditional low-frequency analog control circuits while retaining the same functions as the original analog control systems has [...] Read more.
In the past, low-frequency analog control circuits were largely used in analog control systems. With the rapid development of modern digital electronic technology, the digitization of traditional low-frequency analog control circuits while retaining the same functions as the original analog control systems has become an important trend in the field of electronic design. For this reason, this study aimed to develop an analog signal digitization model for control signals at a low frequency below 10 Hz. In terms of signal receiving and transmission requirements, the proposed model is configured with analog-to-digital converter (ADC), digital-to-analog converter (DAC), and pulse width modulation (PWM) functions. In the development environment, the input and output signals are first normalized and processed with PWM, enabling the digital signal processor to deal with analog signal receiving, processing, and external transmission. To replace the existing compensator in analog circuits, a digital compensator is used in the digital signal processor. Based on the bilinear function in MATLAB software, the parameter values demanded for the digital compensator can thus be obtained, achieving the automatic calculation of bilinear transformation in the system. Multisim simulation is then used to simulate analog circuit systems for comparison with the digitized outcomes. The experimental results reveal that the performance of the designed digital control circuit matches the simulation outcomes in both Bode gain (dB) and phase responses when the signal frequency is below 10 Hz. The effectiveness of the digitized analog control circuit for low-frequency control signals is therefore confirmed. Full article
(This article belongs to the Special Issue Advances in Low Power Circuit and System Design and Applications)
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12 pages, 1323 KiB  
Article
Analytical Analysis of Power-Constrained Repeaters’ Insertion in Large-Scale CMOS Chips
by Luigi Gaioni
Electronics 2024, 13(22), 4368; https://doi.org/10.3390/electronics13224368 - 7 Nov 2024
Cited by 1 | Viewed by 793
Abstract
As the die area of CMOS integrated circuits continues to increase, interconnects will become dominant in determining the performance of the circuits from the standpoint of speed and power consumption. Uniform repeater insertion is an effective method used to reduce the propagation delay [...] Read more.
As the die area of CMOS integrated circuits continues to increase, interconnects will become dominant in determining the performance of the circuits from the standpoint of speed and power consumption. Uniform repeater insertion is an effective method used to reduce the propagation delay of a signal in long resistive-capacitive lines. However, non-optimal repeaters’ insertion yields non-optimal circuit performance. In this work, we provide a mathematical treatment for optimal repeater insertion with power consumption constraints. In particular, a closed-form expression for the optimum number and size of repeaters is given for a two-stage buffer used as a repeater. The validation of the analytical solution is assessed by means of circuit simulations, by comparing the theoretical optimal number and size of the repeaters to be placed in the long resistive-capacitive line with the simulated values. Full article
(This article belongs to the Special Issue Advances in Low Power Circuit and System Design and Applications)
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