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Electronics
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Advanced High-Performance Analog Integrated Circuits
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Advanced High-Performance Analog Integrated Circuits

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 September 2025 | Viewed by 2287

Special Issue Editor

Dr. Kai Xu

E-Mail Website
Guest Editor
1. College of Integrated Circuits, Zhejiang University, Hangzhou 311200, China
2. ZJU-Hangzhou Global Scientific and Technological Innovation Center, Zhejiang University, Hangzhou 311215, China
Interests: integrated circuit device; power device; integrated circuit intelligent manufacturing

Special Issue Information

Dear Colleagues,

Integrated circuits (ICs) are the core of modern electronics, essential for the development of science and technology. They integrate a large number of electronic components on a small chip, allowing for the miniaturization and high efficiency of the circuit. ICs are mainly divided into digital and analog ICs. Analog ICs are used to process continuous signals, such as sound and video. Their common applications include amplifiers, sensor interfaces, and power management. The benefits of analog ICs lie in their ability to accurately process and regulate analog signals, which is essential to ensure the performance and reliability of devices. Whether in consumer electronics, communication systems, or industrial controls, analog ICs play an indispensable role.

This Special Issue aims to collect original research articles on recent advances in high-performance analog ICs. Submissions focused on novel analog circuit design strategies, electronic devices, manufacturing techniques, and analog applications are particularly welcome.

The topics of interest for this Special Issue include the following:

  • Analog integrated circuit design;
  • Algorithms, methods, and tools for the modelling and simulation of analog integrated circuits and systems;
  • Analog integrated circuit manufacturing;
  • Process and device technologies;
  • Fabrication of electronic device and system;
  • Reliability of device, processes, integrated circuits;
  • Integrated circuit intelligent manufacturing;
  • Analog integrated circuit applications.

Dr. Kai Xu
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • analog integrated circuit
  • design
  • process
  • device
  • application

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Further information on MDPI's Special Issue policies can be found here.

Published Papers (3 papers)

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Research

15 pages, 32541 KiB  
Article
A High-Speed 8-Bit Single-Channel SAR ADC with Tailored Bit Intervals and Split Capacitors
by Xinyu Li, Ruida Wang, Liulu He and Kentaro Yoshioka
Electronics 2025, 14(10), 2032; https://doi.org/10.3390/electronics14102032 - 16 May 2025
Viewed by 25
Abstract
As wireless communication systems continue to demand higher data transmission rates, the need for analog-to-digital converters (ADCs) with a higher sampling rate becomes increasingly critical. However, traditional successive approximation register (SAR) ADCs operating at 1 bit/cycle often face speed limitations due to the [...] Read more.
As wireless communication systems continue to demand higher data transmission rates, the need for analog-to-digital converters (ADCs) with a higher sampling rate becomes increasingly critical. However, traditional successive approximation register (SAR) ADCs operating at 1 bit/cycle often face speed limitations due to the fixed bit intervals and comparator regeneration delays, which constrain their scalability in advanced technology nodes. To address these challenges, this paper presents a high-speed 8-bit single-channel SAR ADC featuring a novel delay generation circuit that enables tailored bit intervals (TBIs) to reduce conversion latency. A split capacitive digital-to-analog converter (CDAC) is employed to suppress input common-mode voltage shifts, while inverted dynamic latch pairs and early capacitor reset techniques are introduced to improve conversion speed. The proposed ADC is implemented in a 16 nm CMOS process, occupying only 0.0012 mm2. Post-layout simulations across extreme process and temperature corners validate the robustness of the design. The TBI-ADC achieves an effective number of bits (ENOB) of 7.20 bits at Typical–Typical (TT) 25 °C with a power consumption of 6.94 mW. Furthermore, it reaches a sampling rate of 1.6 GS/s at Fast–Fast (FF) −40 °C, representing a 33% improvement over the fastest previously reported single-channel, 1 bit/cycle, 8-bit SAR ADC. Full article
(This article belongs to the Special Issue Advanced High-Performance Analog Integrated Circuits)
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12 pages, 2525 KiB  
Article
Impact of Electromagnetic Pulses on N-Type MOSFET Reliability: Experimental Insights
by Yaxing Zhu, Dongyan Zhao, Fei Dai, Yanning Chen, Fang Liu, Bo Wu, Yang Zhao, Bocong Ren, Yanhong Wang, Yingzong Liang and Junpeng Wang
Electronics 2025, 14(10), 1937; https://doi.org/10.3390/electronics14101937 - 9 May 2025
Viewed by 193
Abstract
In power systems, MOSFET devices used in industrial chips exhibit more pronounced degradation when subjected to intense electromagnetic pulses than in conventional environments. Conventional reliability testing methods, which fail to simulate dynamic electromagnetic environments, are unable to accurately assess the changes in device [...] Read more.
In power systems, MOSFET devices used in industrial chips exhibit more pronounced degradation when subjected to intense electromagnetic pulses than in conventional environments. Conventional reliability testing methods, which fail to simulate dynamic electromagnetic environments, are unable to accurately assess the changes in device performance under electromagnetic interference. In this study, we employed a transmission line pulse generator to apply pulse stress to N-type MOSFET devices, systematically investigating the degradation mechanisms by varying pulse features such as pulse cycle, amplitude, rise/fall times, and intervals. The results indicate that changes in the electrical properties of the devices are primarily influenced by two types of charged traps. Under the conditions of low pulse cycles, the current response of the devices may even exceed that prior to stress application. The study further analyzed the competitive mechanisms of these different traps during the device degradation process. Additionally, by varying the test temperature to mimic industrial application scenarios, we analyzed the degradation behavior of the devices under multi-physics conditions. Full article
(This article belongs to the Special Issue Advanced High-Performance Analog Integrated Circuits)
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12 pages, 1291 KiB  
Article
Optimization of Impact Ionization in Metal–Oxide–Semiconductor Field-Effect Transistors for Improvement of Breakdown Voltage and Specific On-Resistance
by Yanning Chen, Yixian Song, Bo Wu, Fang Liu, Yongfeng Deng, Pingrui Kang, Xiaoyun Huang, Yongyu Wu, Dawei Gao and Kai Xu
Electronics 2024, 13(20), 4101; https://doi.org/10.3390/electronics13204101 - 17 Oct 2024
Viewed by 1558
Abstract
For the past few decades, metal–oxide–semiconductor field-effect transistors (MOSFETs) have been the most important application in IC circuits. In certain circuit applications, the breakdown voltage and specific on-resistance serve as key electrical parameters. This article introduces a readily accessible approach to enhance the [...] Read more.
For the past few decades, metal–oxide–semiconductor field-effect transistors (MOSFETs) have been the most important application in IC circuits. In certain circuit applications, the breakdown voltage and specific on-resistance serve as key electrical parameters. This article introduces a readily accessible approach to enhance the source–drain breakdown voltage (BVDS) of MOSFETs based on the Bipolar-CMOS-DMOS (BCD) platform without extra costs. By attentively refining the process steps and intricacies of the doping procedures, the breakdown voltages of NMOS and PMOS experienced increments of 3.4 V and 4.6 V, translating to enhancements of 31.5% and 50.3%. Parallel simulations offer insightful mechanistic explanations through simulation tools, facilitating superior outcomes. This initiative lays significant groundwork for the advancement of a comprehensive BCD process development framework. Full article
(This article belongs to the Special Issue Advanced High-Performance Analog Integrated Circuits)
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