Implementation of Neural Network Models on Resource-Constrained Devices
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Artificial Intelligence".
Deadline for manuscript submissions: 15 June 2026 | Viewed by 1208
Special Issue Editors
Interests: applied machine learning; real-time data reduction; pattern recognition; neural networks; deep learning
Interests: applied machine learning; computer vision; estimation algorithms; robotics
Special Issues, Collections and Topics in MDPI journals
Interests: applied machine learning; digital design; instrumentation; photovoltaics
Special Issue Information
Dear Colleagues,
Deep learning, and especially neural networks (NNs), have gained a lot of attention over the past decade. Research on this interesting and constantly developing field has dominated various application areas, from biomedical signal processing to robot-related applications, natural language processing, real-time data reduction, image processing, and pattern recognition. Many different NN models have been developed, outperforming traditional algorithms and avoiding manual feature extraction, making feature extraction from raw data completely automatic. Although there have been remarkable improvements in model accuracy, the application of these models to resource-constrained devices, such as mobile phones, microcontrollers, and edge devices, is limited by available memory and processing power.
Therefore, the implementation of NNs on such devices requires making the models as “lighweight” as possible, following the acceptable trade-off between accuracy and complexity. In this Special Issue, we aim to present the latest research on this topic. Classical approaches to network compression and feature reduction using quantization techniques like post-training or quantization-aware training are welcome, but studies exploring other relevant techniques, such as pruning, knowledge distillation, and low-rank factorization are of great interest. Novel approaches for NN compression and hardware implementation of models on edge devices are particularly welcome. Research on deployment techniques for critical hardware components such as Field-Programmable Gate Arrays (FPGAs) is also acceptable.
Topics of interest for original contributions include, but are not limited to, the following:
- Novel techniques for lightweight NN architecture design;
- Novel NN compression techniques;
- Efficient hardware deployment of NNs;
- Implementation and testing of NNs on FPGA devices;
- Novel feature reduction schemes (including quantization on lower numbers of bits).
Dr. Marina Prvan
Dr. Josip Musić
Dr. Duje Čoko
Guest Editors
Manuscript Submission Information
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Keywords
- deep learning
- edge devices
- neural networks
- FPGA
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