- Article
A Novel SRAM In-Memory Computing Accelerator Design Approach with R2R-Ladder for AI Sensors and Eddy Current Testing
- Kevin Becker,
- Martin Zimmerling,
- Matthias Landwehr,
- Dirk Koster,
- Hans-Georg Herrmann and
- Wolf-Joachim Fischer
This work presents a 6T-SRAM-based in-memory computing (IMC) system fabricated in a 180 nm CMOS technology. A total of 128 integrated polysilicon R2R-DACs for fully analog wordline control and performance analysis are integrated into the system. The...

