Search Results (18)

This paper presents an improved structure of an asymmetrical single-phase multilevel inverter topology with reduced device count. The proposed topology achieves 19 voltage levels at the output using only 12 power switches and 3 DC sources. The topology can be easily extended, resulting in a modular topology with more voltage levels at higher voltages. Moreover, the reliability analysis of the proposed converter results in a higher mean time to fault. The simulation is performed in MATLAB/Simulink, and a hardware prototype is developed to validate the circuit’s performance. A low-frequency Nearest Level Control PWM technique is implemented to generate switching signals and achieves 4.30% THD in output voltage. The PLECS software is used for power loss and efficiency analysis, resulting in a maximum efficiency of 99.08%. The proposed converter has been compared with other MLI topologies to demonstrate its superiority. The results indicate that the proposed topology has proven superior and outperformed other topologies in various parameters, making it suitable for renewable energy applications. Full article

This work presents an improved structure of a single-phase muti-input multilevel inverter (MIMLI) for distributed energy resources, which is capable of producing a nine-level output in symmetric mode and 21 levels in asymmetrical mode. The topology uses four DC sources and ten switches, with four switches being bidirectional and the remaining unidirectional. The operation of the circuit is analyzed in an asymmetrical mode, and switching signals are accomplished using the Nearest Level Control (NLC) PWM technique. Depending on the value of the DC sources used, the number of levels can vary. In this work, different DC source algorithms were also proposed, and the analysis of the inverter has been carried out considering the algorithms producing the maximum number of levels. The inverter was simulated in MATLAB/Simulink under steady state and dynamic conditions, achieving a 3.89% THD in output. The thermal analysis was conducted using PLECS software 4.1.2 to assess losses and efficiency. A laboratory prototype of the proposed topology was developed and tested, confirming its performance through simulation results and proving it economically viable for medium- and high-power applications. Full article

This paper proposes a new and simplified Nearest Vector Control (NVC) modulation technique for a grid-connected photovoltaic (PV) system using a Modular Multilevel Converter (MMC). Compared to the Nearest Level Control (NLC) technique, which defines three independent states for the three phases of medium to large four-wire multilevel converters, NVC offers a more coordinated behavior for three-wire converters. The proposed scheme is easy to implement, and it simplifies the understanding of using vectors when detecting the vector of the converter nearest to a given reference. Because it uses natural coordinates, namely, ab, bc and ca, the proposed method is easier to understand and more useful for further developments. Compared with earlier NVC methods, this approach offers full independence of the number of levels at the converter and it can readily accommodate changes in the number of levels, with no need for lookup tables or artificial coordinate transformations. The proposed NVC method was implemented on a 16-cell MMC used for PV generation and then it was compared to NLC, leading to a smaller and more consistent low-order harmonic distortion, requiring about the same complexity of implementation. Furthermore, in comparison to NLC, when applying the proposed NVC modulation, a behavior more insensitive to changes in the grid voltage was found, the most hazardous odd harmonics from the 5th to the 19th were reduced, and a consistent reduction of about 25 dB was achieved on the 5th and 7th harmonics. The newly proposed method is supported by simulations and experimental results with constant and sharply changing solar irradiance, leaving or removing the 100 Hz component of the MMC circulating currents. Full article

This article offers a novel boost inverter construction with a Nine-level quadruple voltage boosting waveform. The primary drawback of conventional MLI is the need for a high voltage DC-DC converter to increase the voltage when using renewable energy sources. Consequently, the developed method, complete with a quadruple voltage boost ability, can alleviate that shortcoming by automatically increased the incoming voltage. A single DC source, two switching capacitors, and eleven switches are all that are used in the newly presented architecture. The voltage of the capacitor automatically balances. The switched capacitor MLI is distinguished by the fewer parts that are required and the substitution of a capacitor for a DC source. The switching capacitor has to be charged and discharged properly in order to produce the nine-level output voltage waveform. The SPSC unit makes these levels attainable. To achieve voltage boosting, switched capacitors are coupled in parallel and series in the conduction channel. The quality of this proposed topology has been analyzed through different parameters based on the components count, THD, and cost; the resulting efficiency reaches 97.85%. The switching order of the proposed method has been controlled by the Nearest Level Modulation Method (NLC). MATLAB and PLECS software were used to evaluate the constructed Nine-level converter. Full article

The modular multilevel matrix converter (M3C) is the core component in low-frequency AC (LFAC) transmission, which is a competitive scheme for offshore wind power integration. In this paper, the M3C control strategy with the reduced switching frequency SM voltage balancing method is proposed. First, based on the conventional αβ0 and dq transformations, the M3C mathematical model is derived. Then, the dual-loop control structure with outer loop and inner loop controllers commonly used in voltage source converters is applied to the M3C. The inner loop controller consists of the current tracking controller in the dq reference frame and the circulating current suppressing controller in the αβ0 reference frame; the outer loop controller is proposed for the offshore wind farm LFAC integration scenario. Additionally, according to the operating characteristics of full-bridge sub-modules (FBSMs), three characteristic variables are defined and a reduced switching frequency SM voltage balancing method based on the nearest level control (NLC) is proposed. Finally, time-domain simulations in PSCAD/EMTDC demonstrate the feasibility of the proposed control strategy. Full article

Reliability of the multilevel inverters (MLIs) is one of the most important concerns in industrial applications, mainly due to the semiconductor devices. Whenever a fault occurs in one of the switches of the inverter, it leads to abnormal conditions and can also cause serious damage to the equipment connected to the multilevel inverter. In this paper, a recently proposed nine-level Packed-E-Cell (PEC) multilevel inverter topology is investigated for its fault-tolerant capability and improved reliability. The analysis is carried out for a reduced device multilevel inverter topology that, due to a lack of redundant states, cannot tolerate switch failures. The fault-tolerant (FT) topology provides additional redundant states in the switching sequence of the existing topology. The work in this paper presents Packed-E-Cell MLI modified for fault tolerance against single-switch open-circuit faults. The modified FT topology inherently achieves self-voltage balance in the DC-link capacitors. Nearest Level Control(NLC) is used as the modulation strategy for generating the desired switching pulses. Simulation results are obtained in MATLAB/Simulink for the conditions prior to the fault, during the fault and post fault, and results are discussed. Experimental verification of the modified FT topology is also performed, in order to validate its effectiveness. Full article

In renewable energy source applications, multilevel inverters with lower power components have become more popular in recent decades. This work exhibits a novel topology for high-quality output in PV applications, along with low-power switches and isolated dc sources. The core module of the suggested design may create a 13-level output waveform with two unequal voltage source values. The cascaded structure is intended to boost the voltage levels, and the related parameters are obtained analytically. The even and odd levels of voltage can be created natively without the usage of an additional H bridge circuit. Furthermore, the switches, gate driver circuits, dc sources, and standing voltage are fewer in number when compared to other recent topologies. Power losses and cost comparisons are calculated and given in monetary terms. This new research supports the idea that nearest level control (NLC) is used as a modulation scheme in the simulation modeling and experimental validation of the proposed topology. Full article

A reduced switching components step-up multilevel inverter (RSCS-MLI) is presented in the paper. The basic circuit of the proposed MLI can produce 11 levels in the output voltage with a reduced number of switching components. The other features of the proposed circuit include a low value of voltage stresses and the inherent generation of the voltage levels pertaining to the negative half without the requirement of an H-bridge. Fundamental frequency switching technique, also known as Nearest Level Control (NLC) technique, is implemented in the proposed topology for generating the switching signals. The experimental total harmonic distortion (THD) in the output voltage comes out to be 9.4% for modulation index equal to 1. Based on different parameters, a comparative study has been shown in the paper, which makes the claim of the proposed MLI stronger. An experimental setup is prepared to carry out the hardware implementation of the proposed structure and monitor its performance under dynamic load conditions, which is also used to verify the simulation results. Power loss analysis, carried out by using PLECS software, helps us to gain insight into different losses occurring while operating the inverter. The different results are explained and analyzed in the paper. Full article

A new triple voltage boosting switched-capacitor multilevel inverter (SCMLI) is presented in this paper. It can produce 13-level output voltage waveform by utilizing 12 switches, three diodes, three capacitors, and one DC source. The capacitor voltages are self-balanced as all the three capacitors present in the circuit are connected across the DC source to charge it to the desired voltage level for several instants in one fundamental cycle. A detailed comparative analysis is carried to show the advantages of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), and boosting of the converter with the recently published 13-level topologies. The nearest level control (NLC)-based algorithm is used for generating switching signals for the IGBTs present in the circuit. The TSV of the proposed converter is 22. Experimental results are obtained for different loading conditions by using a laboratory hardware prototype to validate the simulation results. The efficiency of the proposed inverter is 97.2% for a 200 watt load. Full article

An 11-level switched-capacitor multilevel inverter (SCMLI) with 2.5 times boosting feature is presented in this paper. It can produce an 11-level output voltage waveform by utilizing 14 switches, 3 capacitors, 2 diodes, and 1 DC source. Only nine driver circuits are needed as the topology has three pairs of complementary switches and two bidirectional switches. It has inherent capacitor self-balancing property as the capacitors are connected across the DC voltage source during several states within a fundamental cycle to charge the capacitors to the input voltage. A detailed comparison shows the effectiveness of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), efficiency, and boosting ability with the state-of-art recently proposed circuits. Subsequently, the performance of the proposed SCMLI is validated experimentally utilizing the nearest level control (NLC), a fundamental frequency-based switching technique. Full article

As the applications of power electronic converters increase across multiple domains, so do the associated challenges. With multilevel inverters (MLIs) being one of the key technologies used in renewable systems and electrification, their reliability and fault ride-through capabilities are highly desirable. While using a large number of semiconductor components that are the leading cause of failures in power electronics systems, fault tolerance against switch open-circuit faults is necessary, especially in remote applications with substantial maintenance penalties or safety-critical operation. In this paper, a fault-tolerant asymmetric reduced device count multilevel inverter topology producing an 11-level output under healthy conditions and capable of operating after open-circuit fault in any switch is presented. Nearest-level control (NLC) based Pulse width modulation is implemented and is updated post-fault to continue operation at an acceptable power quality. Reliability analysis of the structure is carried out to assess the benefits of fault tolerance. The topology is compared with various fault-tolerant topologies discussed in the recent literature. Moreover, an artificial intelligence (AI)-based fault detection method is proposed as a machine learning classification problem using decision trees. The fault detection method is successful in detecting fault location with low computational requirements and desirable accuracy. Full article

In the developing context of distributed generation and flexible smart grids, in order to realize electrochemical storage systems, Modular Multilevel Converters (MMCs) represent an interesting alternative to the more traditional Voltage Source Inverters (VSIs). This paper presents a novel analytical investigation of electrochemical cell power losses in MMCs and their dependence on the injected common mode voltage. Steady-state cell losses are calculated under Nearest Level Control (NLC) modulation for MMCs equipped with a large number of half-bridge modules, each directly connected to an elementary electrochemical cell. The total cell losses of both a Single Star MMC (SS-MMC) and a Double Star MMC (DS MMC) are derived and compared to the loss of a VSI working under the same conditions. An optimum common mode voltage injection law is developed, leading to the minimum cell losses possible. In the worst case, it achieves a 17.5% reduction in cell losses compared to conventional injection laws. The analysis is experimentally validated using a laboratory prototype set-up based on a two-arm SS-MMC with 12 modules per arm. The experimental results are within 2.5% of the analytical models for all cases considered. Full article

This paper aims to present a novel switched-capacitor multi-level inverter. The presented structure generates a staircase near sinusoidal AC voltage by using a single DC source and a few capacitors to step-up the input voltage. The nearest level control (NLC) strategy is used to control the operation of the converter. These switching states are designed in a way that they always ensure the self-voltage balancing of the capacitors. Low switching frequency, simple control, and inherent bipolar output are some of the advantages of the presented inverter. Compared to other existing topologies, the structure requires fewer circuit elements. Bi-directional power flow ability of the proposed topology, facilitates the operation of the circuit under wide range of load behaviors which makes it applicable in most industries. Besides, a 13-level laboratory prototype is implemented to realize and affirm the efficacy of the MATLAB Simulink model under different load conditions. The simulation and experimental results accredit the appropriate performance of the converter. Finally, a theoretical efficiency of 92.73% is reached. Full article

In the power industry, hardware in-the-loop simulation (HILS) based on a real-time digital simulator (RTDS) is important technology for modular multilevel converter (MMC)-based high-voltage direct current (HVDC) power transmission. It is possible in real time to verify various fault situations that cannot be predicted by the software-in-the-loop simulation (SILS). This paper introduces the implementation methodology of sub-module (SM) capacitor voltage balancing for a MMC-HVDC physical control system based on field-programmable gate array (FPGA), which has the advantages of high-speed parallel operation and validates the reliability and accuracy of MMC-HVDC control when this control system is operated with RTDS. The characteristics of conventional capacitor voltage balancing methods, such as the nearest level control (NLC) with full sorting method, the NLC with reduced switching frequency method, and the tolerance band (TB) method, implemented on a physical control system based on this implementation methodology, are compared and analyzed. This paper proposes the improved capacitor voltage balancing method for MMC-HVDC transmission. Finally, the proposed capacitor voltage balancing method is compared with conventional methods to analyze performance in real-time to demonstrate that the proposed method is better than the conventional methods. Full article

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology. Full article