Search Results (365)

AlGaN-based high-electron-mobility transistors are critical for next-generation power electronics and radio-frequency applications, yet achieving stable enhancement-mode operation with a high threshold voltage remains a key challenge. In this work, we designed p-AlGaN superlattices with different structures and performed energy band structure simulations using the device simulation software Silvaco. The results demonstrate that thin barrier structures lead to reduced acceptor incorporation, thereby decreasing the number of ionized acceptors, while facilitating vertical hole transport. Superlattice samples with varying periodic thicknesses were grown via metal-organic chemical vapor deposition, and their crystalline quality and electrical properties were characterized. The findings reveal that although gradient-thickness barriers contribute to enhancing hole concentration, the presence of thick barrier layers restricts hole tunneling and induces stronger scattering, ultimately increasing resistivity. In addition, we simulated the structure of the enhancement-mode HEMT with p-AlGaN as the under-gate material. Analysis of its energy band structure and channel carrier concentration indicates that adopting p-AlGaN superlattices as the under-gate material facilitates achieving a higher threshold voltage in enhancement-mode HEMT devices, which is crucial for improving device reliability and reducing power loss in practical applications such as electric vehicles. Full article

With their superior switching speed, GaN high-electron-mobility transistors (HEMTs) enable high power density, reduce energy losses, and increase power efficiency in a wide range of applications, such as power electronics, due to their high breakdown voltage. GaN-HEMT devices are subject to long-term reliability due to the self-heating effect and lattice mismatch between the SiC substrate and the GaN. Depletion-mode GaN HEMTs are utilized for radio frequency applications, and this work investigates three wide-bandgap (WBG) GaN HEMT fixed-frequency oscillators with output buffers. The first GaN-on-SiC HEMT oscillator consists of an HEMT amplifier with an LC feedback network. With the supply voltage of 0.8 V, the single-ended GaN oscillator can generate a signal at 8.85 GHz, and it also supplies output power of 2.4 dBm with a buffer supply of 3.0 V. At 1 MHz frequency offset from the carrier, the phase noise is −124.8 dBc/Hz, and the figure of merit (FOM) of the oscillator is −199.8 dBc/Hz. After the previous study, the hot-carrier stressed RF performance of the GaN oscillator is studied, and the oscillator was subject to a drain supply of 8 V for a stressing step time equal to 30 min and measured at the supply voltage of 0.8 V after the step operation for performance benchmark. Stress study indicates the power oscillator with buffer is a good structure for a reliable structure by operating the oscillator core at low supply and the buffer at high supply. The second balanced oscillator can generate a differential signal. The feedback filter consists of a left-handed transmission-line LC network by cascading three unit cells. At a 1 MHz frequency offset from the carrier of 3.818 GHz, the phase noise is −131.73 dBc/Hz, and the FOM of the 2nd oscillator is −188.4 dBc/Hz. High supply voltage operation shows phase noise degradation. The third GaN cross-coupled VCO uses 8-shaped inductors. The VCO uses a pair of drain inductors to improve the Q-factor of the LC tank, and it uses 8-shaped inductors for magnetic coupling noise suppression. At the VCO-core supply of 1.3 V and high buffer supply, the FOM at 6.397 GHz is −190.09 dBc/Hz. This work enhances the design techniques for reliable GaN HEMT oscillators and knowledge to design high-performance circuits. Full article

Aiming at the problems of low withstand voltage and poor RF performance of traditional HEMT devices, a new AlGaN/GaN high electron mobility transistor device with a π-gate (NπGS HEMT) is designed in this paper. The new structure incorporates a π-gate design along with a PN-junction field plate and an AlGaN back-barrier layer. The device is modeled and simulated in Silvaco TCAD 2015 software and compared with traditional t-gate HEMT devices. The results show that the NπGS HEMT has a significant improvement in various characteristics. The new structure has a higher peak transconductance of 336 mS·mm⁻¹, which is 13% higher than that of the traditional HEMT structure. In terms of output characteristics, the new structure has a higher saturation drain current of 0.188 A/mm. The new structure improves the RF performance of the device with a higher maximum cutoff frequency of about 839 GHz. The device also has a better performance in terms of voltage withstand, exhibiting a higher breakdown voltage of 1817 V. These results show that the proposed new structure could be useful for future research on high voltage withstand and high RF HEMT devices. Full article

Gallium nitride (GaN) enhancement-mode high-electron-mobility transistors ( E-HEMTs) deliver superior performance compared to traditional silicon (Si) and silicon carbide (SiC) counterparts. Their faster switching speeds, lower on-state resistances, and higher operating frequencies enable more efficient and compact power converters. However, their integration into high-power applications is limited by critical reliability concerns, particularly regarding their short-circuit (SC) withstand capability and overvoltage (OV) resilience. GaN devices typically exhibit SC withstand times of only a few hundred nanoseconds, needing ultrafast protection circuits, which conventional desaturation (DESAT) methods cannot adequately provide. Furthermore, their high switching transients increase the risk of false activation events. The lack of avalanche capability and the dynamic nature of GaN breakdown voltage exacerbate issues related to OV stress during fault conditions. Although SC-related behaviour in GaN devices has been previously studied, a focused and comprehensive review of protection strategies tailored to GaN technology remains lacking. This paper fills that gap by providing an in-depth analysis of SC and OV failure phenomena, coupled with a critical evaluation of current and next-generation protection schemes suitable for GaN-based high-power converters. Full article

Diamond is an attractive substrate candidate for GaN high-electron-mobility transistors (HEMT) to enhance heat dissipation due to its exceptional thermal conductivity. However, the thermal boundary resistance (TBR) at the GaN–diamond interface poses a significant bottleneck to heat transport, exacerbating self-heating and limiting device performance. In this work, TCAD simulations were employed to systematically investigate the effects of thermal boundary layer (TBL) thickness (d_TBL) and thermal conductivity (κ_TBL) on the electrothermal behavior of GaN-on-diamond HEMTs. Results show that increasing the TBL thickness (5–20 nm) or decreasing its thermal conductivity (0.1–1.0 W/(m·K)) leads to elevated hotspot temperatures and degraded electron mobility, resulting in a notable deterioration of I–V characteristics. The nonlinear dependence of device performance on κ_TBL is attributed to Fourier’s law, where heat flux is inversely proportional to thermal resistance. Furthermore, the co-analysis of substrate thermal conductivity and interfacial quality reveals that interface TBR has a more dominant impact on device behavior than substrate conductivity. Remarkably, devices with low thermal conductivity substrates and optimized interfaces can outperform those with high-conductivity substrates but poor interfacial conditions. These findings underscore the critical importance of interface engineering in thermal management of GaN–diamond HEMTs and provide a theoretical foundation for future work on phonon transport and defect-controlled thermal interfaces. Full article

Gallium nitride high-electron-mobility transistors (GaN HEMTs) are critical for high-power applications like AI power supplies and robotics but face reliability challenges due to increased dynamic ON-resistance (R_{DS_ON}) from electrical and thermomechanical stresses. This paper presents a novel self-calibrating temperature-sensitive electrical parameter (TSEP) model that uses gate leakage current (I_G) to estimate junction temperature with high accuracy, uniquely addressing aging effects overlooked in prior studies. By integrating I_G, aging-induced degradation, and failure-in-time (FIT) models, the approach achieves a junction temperature estimation error of less than 1%. Long-term hard-switching tests confirm its effectiveness, with calibrated R_{DS_ON} measurements enabling precise remaining useful life (RUL) predictions. This methodology significantly improves GaN HEMT reliability assessment, enhancing their performance in resilient power electronics systems. Full article

Dynamic on-resistance (R_ON) of commercial GaN on Si normally off high-electron-mobility transistor (HEMT) devices is a very important parameter because it is responsible for conduction losses that limit the power conversion efficiency of high-power switching converters. Due to charge trapping effects, dynamic R_ON is always higher than in DC, a behavior known as current collapse. To study how short-time dynamics of charge trapping and release affects R_ON we use rectangular 0–5 V gate voltage pulses with durations in the 1 μs to 100 μs range. Measurements are first carried out for single pulses of increasing duration, and it is found that R_ON depends on both pulse duration and drain current I_D, being higher at shorter pulse durations and lower I_D. For a train of five pulses, R_ON decreases with pulse number, reaching a steady state after a time interval of 100 μs. The response to a five pulses train is compared to that of a square-wave signal to study the time evolution of R_ON toward a dynamic steady state. The DC R_ON is also measured, and it is a factor of ten smaller than dynamic R_ON at the same I_D. This confirms that a reduction in trapped charges takes place in DC as compared to the square-wave switching operation. Additional off-state stress tests at V_DS = 55 V reveal the presence of residual surface traps in the drain access region, leading to four times increase in R_ON in comparison to pristine devices. Finally, the dynamic R_ON is also measured by the double-pulse test (DPT) technique with inductive load, giving a good agreement with results from single-pulse measurements. Full article

This paper presents the first demonstration and comparison of two identical oscillator circuits employing piezoelectric zinc oxide (ZnO) microelectromechanical systems (MEMS) resonators, implemented on conventional printed-circuit-board (PCB) and three-dimensional (3D)-printed acrylonitrile butadiene styrene (ABS) substrates. Both oscillators operate simultaneously at dual frequencies (260 MHz and 437 MHz) without the need for additional circuitry. The MEMS resonators, fabricated on silicon-on-insulator (SOI) wafers, exhibit high-quality factors (Q), ensuring superior phase noise performance. Experimental results indicate that the oscillator packaged using 3D-printed chip-carrier assembly achieves a 2–3 dB improvement in phase noise compared to the PCB-based oscillator, attributed to the ABS substrate’s lower dielectric loss and reduced parasitic effects at radio frequency (RF). Specifically, phase noise values between −84 and −77 dBc/Hz at 1 kHz offset and a noise floor of −163 dBc/Hz at far-from-carrier offset were achieved. Additionally, the 3D-printed ABS-based oscillator delivers notably higher output power (4.575 dBm at 260 MHz and 0.147 dBm at 437 MHz). To facilitate modular characterization, advanced packaging techniques leveraging precise 3D-printed encapsulation with sub-100 μm lateral interconnects were employed. These ensured robust packaging integrity without compromising oscillator performance. Furthermore, a comparison between two transistor technologies—a silicon germanium (SiGe) heterojunction bipolar transistor (HBT) and an enhancement-mode pseudomorphic high-electron-mobility transistor (E-pHEMT)—demonstrated that SiGe HBT transistors provide superior phase noise characteristics at close-to-carrier offset frequencies, with a significant 11 dB improvement observed at 1 kHz offset. These results highlight the promising potential of 3D-printed chip-carrier packaging techniques in high-performance MEMS oscillator applications. Full article

Hydrogen gas sensing is critical for energy storage, industrial safety, and environmental monitoring. However, traditional sensors still face challenges in selectivity, sensitivity, and stability. This work introduces an innovative N-polar GaN/AlGaN high-electron-mobility transistor (HEMT) with a 10 nm Pd catalytic layer as a hydrogen sensor. The device achieves ppm-level H₂ detection with rapid recovery and reusability, which is comparable to or even exceeds the performance of conventional Ga-polar HEMTs. The N-polar structure enhances sensitivity through its unique polarization-induced 2DEG and intrinsic back barrier, while the Pd layer catalyzes H₂ dissociation, forming a dipole layer that can modulate the Schottky barrier height. Experimental results demonstrate superior performance at both room temperature and elevated temperatures. Specifically, at 200 °C, the sensor exhibits a response of 102% toward 200 ppm H₂, with response/recovery times of 150 s/17 s. This represents a 96% enhancement in sensitivity and a reduction of 180 s/14 s in response/recovery times compared to room-temperature conditions (23 °C). These findings highlight the potential of N-polar HEMTs for high-performance hydrogen sensing applications. Full article

A dual Al₂O₃ MIS gate structure is proposed to enhance the DC and RF performance of enhancement-mode GaN high-electron mobility transistors (HEMTs). As a result, the proposed MOS-HEMT with a dual recessed MIS gate structure offers 84% improvements in cutoff frequency (f_T) and 92% improvements in maximum oscillation frequency (f_max) compared to conventional HEMTs (from 7.1 GHz to 13.1 GHz and 17.5 GHz to 33.6 GHz, respectively). As for direct-current characteristics, a remarkable reduction in off-state gate leakage current and a 26% enhancement in the maximum saturation drain current (from 519 mA·mm⁻¹ to 658 A·mm⁻¹) are manifested in HEMTs with new structures. The maximum transconductance (g_m) is also raised from 209 mS·mm⁻¹ to 246 mS·mm⁻¹. Correspondingly, almost unchanged gate–source capacitance curves and gate–drain capacitance curves are also discussed to explain the electrical characteristic mechanism. These results indicate the superiority of using a dual Al₂O₃ MIS gate structure in GaN-based HEMTs to promote the RF and DC performance, providing a reference for further development in a miniwatt antenna amplifier and sub-6G frequencies of operation. Full article

We present THz direct detectors based on an AlGaN/GaN high electron mobility transistor (HEMT), featuring excellent optical sensitivity and low noise-equivalent power (NEP). These detectors are monolithically integrated with various antenna designs and exhibit state-of-the-art performance at room temperature. Their architecture enables straightforward scaling to two-dimensional formats, paving the way for terahertz focal plane arrays (FPAs). In particular, for one detector type, a fully realized THz FPA has been demonstrated in this paper. Theoretical and experimental characterizations are provided for both single-pixel detectors (0.1–1.5 THz) and the FPA (0.1–1.1 THz). The broadband single detectors achieve optical sensitivities exceeding 20 mA/W up to 1 THz and NEP values below 100 pW/$\sqrt{\mathrm{Hz}}$. The best optical NEP is below 10 pW/$\sqrt{\mathrm{Hz}}$ at 175 GHz. The reported sensitivity and NEP values were achieved including antenna and optical coupling losses, underlining the excellent overall performance of the detectors. Full article

We propose a novel ultraviolet (UV) phototransistor (PT) architecture based on an AlGaN/GaN high electron mobility transistor (HEMT) with a buried p-GaN layer. In the dark, the polarization-induced two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction interface is depleted by the buried p-GaN and the conduction channel is closed. Under UV illumination, the depletion region shrinks to just beneath the AlGaN/GaN interface and the 2DEG recovers. The retraction distance of the depletion region during device turn-on operation is comparable to the thickness of the AlGaN barrier layer, which is an order of magnitude smaller than that in the conventional p-GaN/AlGaN/GaN PT, whose retraction distance spans the entire GaN channel layer. Consequently, the proposed device demonstrates significantly enhanced weak-light detection capability and improved switching speed. Silvaco Atlas simulations reveal that under a weak UV intensity of 100 nW/cm², the proposed device achieves a photocurrent density of 1.68 × 10⁻³ mA/mm, responsivity of 8.41 × 10⁵ A/W, photo-to-dark-current ratio of 2.0 × 10⁸, UV-to-visible rejection ratio exceeding 10⁸, detectivity above 1 × 10¹⁹ cm·Hz^1/2/W, and response time of 0.41/0.41 ns. The electron concentration distributions, conduction band variations, and 2DEG recovery behaviors in both the conventional and novel structures under dark and weak UV illumination are investigated in depth via simulations. Full article

This study introduces an enhancement-mode AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a self-aligned p-GaN gate structure, fabricated using a gate-first process. The key innovation of this work lies in simplifying the fabrication process by utilizing gate metallization for both electrical contact and etching mask functions, enabling precise self-alignment. A highly selective Cl₂/N₂/O₂ inductively coupled plasma (ICP) etching process was optimized to etch the p-GaN layer in the access regions, with a selectivity ratio of 33:1 and minimal damage to the AlGaN barrier. Additionally, a novel, non-annealed ohmic contact formation technique was developed, leveraging ICP etching to create nitrogen vacancies that facilitate contact formation without requiring thermal annealing. This technique streamlines the process by combining ohmic contact formation and mesa isolation into a single lithographic step. Incorporating a SiNx gate dielectric layer led to a 4.5 V threshold voltage shift in the fabricated devices. The resulting devices exhibited improved electrical performance, including a wide gate voltage swing (>10 V), a high on/off current ratio (~10⁷), and clear pinch-off characteristics. These results demonstrate the effectiveness of the proposed fabrication approach, offering significant improvements in process efficiency and manufacturability. Full article

A three-stage low-noise amplifier (LNA) operating over the 6–18 GHz frequency range is designed and implemented, featuring a flat noise figure (NF) and enhanced output 1 dB compression point (OP_1dB). To improve linearity and minimize distortion, a power high-electron-mobility transistor (HEMT) is employed in the final stage. Additionally, resistive feedback and self-biasing techniques are integrated to extend the amplifier’s bandwidth. The proposed LNA exhibits a high and flat power gain of 25 ± 1 dB, with an input return loss of more than 10 dB. The measured NF remains stable at 2.6 ± 0.3 dB over the 6–18 GHz range. Furthermore, the OP_1dB exceeds 19.5 dBm across the entire 3 dB gain bandwidth (BW). The circuit is fabricated using a 0.15 μm GaAs pHEMT process, occupying a compact chip area of 1.2 × 1.8 mm². Full article

This paper presents two cryogenic low-noise amplifiers (LNAs) based on the WIN’s 0.18 $\mathrm{\mu }$m gate length gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) process designed for radio telescope receivers. Discrete transistors with gate peripheries spanning 50–600 $\mathrm{\mu }$m were DC-characterized at 290 K and 15 K, respectively. The LNAs underwent on-chip noise characterization under 15 K using a Y-factor measurement setup, which integrated a calibrated noise source and a noise figure analyzer. This approach directly quantified the noise temperature—critical metrics for radio telescope receiver front-ends. The top-performing LNA variant identified through on-chip characterization was packaged and evaluated in a cryogenic test-bed. This LNA, spanning a bandwidth of 0.3–15 GHz, demonstrated a gain of 26 dB and a minimum noise temperature of 6 K when operated at an ambient temperature of 15 K. In contrast, a second LNA architecture, tested solely on-chip, demonstrated a gain of 30 dB and a minimum noise temperature of 15 K across the 0.3–7 GHz range. Full article