GaN Technology’s Role in Next Generation Electronics Circuits and Power Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 January 2026 | Viewed by 2678

Special Issue Editors


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Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), Università di Catania, 95125 Catania, Italy
Interests: radio frequency (RF) and millimeter wave (mm-wave) integrated circuits/systems for wireless communication systems
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Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), Università di Catania, 95125 Catania, Italy
Interests: feedback circuits; operational amplifier design; voltage regulators; bandgap voltage references; low-voltage circuits; device modeling
Special Issues, Collections and Topics in MDPI journals

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Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), Università di Catania, 95125 Catania, Italy
Interests: electrical machines, drives and power converters for e-mobility (silicon, GaN and SiC technologies)
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

This Special Issue will address advances in GaN technology and its applications in different fields of power electronics. In particular, the aim is to present the latest achievements in developing advanced power electronic technology and materials and GaN solutions for power converters. 

This Special Issue will include (but is not limited to) the following topics:

  1. GaN-based materials and heterostructures growth and characterization;
  2. Device processing steps (contacts, dielectrics, etching, etc.);
  3. GaN-based devices (advanced lateral HEMTs for power and RF applications, vertical GaN-based devices and  packaging, etc.);
  4. Devices characterization, modeling and reliability;
  5. GaN systems: modeling, testing and reliability;
  6. Intelligent and integrated GaN solutions (systems in package and monolithic formats); 
  7. Advanced topologies and control strategies for GaN-based power converters (automotive, renewable energy, industrial and consumer electronics, etc.).

A selection of the best contributions will be invited to present the work at the "International Workshop of the EU Project GaN4AP" that the University of Catania is organizing in February 2025 in Catania. The workshop will be a unique opportunity for bringing together leading specialists working in different areas of gallium nitride (GaN) technology, both from universities, research centers and industries. 

Dr. Egidio Ragonese
Prof. Dr. Gianluca Giustolisi
Prof. Dr. Giacomo Scelba
Guest Editors

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Keywords

  • GaN Systems
  • GaN technology
  • power electronic technology and materials
  • GaN solutions for power converters

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Published Papers (4 papers)

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Research

15 pages, 3152 KiB  
Article
Advanced Modeling of GaN-on-Silicon Spiral Inductors
by Simone Spataro, Giuseppina Sapone, Marcello Giuffrida and Egidio Ragonese
Electronics 2025, 14(15), 3079; https://doi.org/10.3390/electronics14153079 - 31 Jul 2025
Viewed by 141
Abstract
In this paper, the accuracy of basic and advanced spiral inductor models for gallium nitride (GaN) integrated inductors is evaluated. Specifically, the experimental measurements of geometrically scaled circular spiral inductors, fabricated in a radio frequency (RF) GaN-on silicon technology, are exploited to estimate [...] Read more.
In this paper, the accuracy of basic and advanced spiral inductor models for gallium nitride (GaN) integrated inductors is evaluated. Specifically, the experimental measurements of geometrically scaled circular spiral inductors, fabricated in a radio frequency (RF) GaN-on silicon technology, are exploited to estimate the errors of two lumped geometrically scalable models, i.e., a simple π-model with seven components and an advanced model with thirteen components. The comparison is performed by using either the standard performance parameters, such as inductance (L), quality factor (Q-factor), and self-resonance frequency (SRF), or the two-port scattering parameters (S-parameters). The comparison reveals that despite a higher complexity, the developed advanced model achieves a significant reduction in SRF percentage errors in a wide range of geometrical parameters, while enabling an accurate estimation of two-port S-parameters. Indeed, the correct evaluation of both SRF and two-port S-parameters is crucial to exploit the model in an actual circuit design environment by properly setting the inductor geometrical parameters to optimize RF performance. Full article
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14 pages, 2673 KiB  
Article
Evaluation of GaN Transistors for Grid-Connected 3-Level T-Type Inverters
by Julian Endres, Tobias Haas, Alexander Pawellek, Vinicius Kremer and Roger Franchino
Electronics 2025, 14(15), 2935; https://doi.org/10.3390/electronics14152935 - 23 Jul 2025
Viewed by 253
Abstract
This paper presents a complete workflow for the evaluation of GaN transistors in voltage source inverters. With the associated high switching speed of transistors based on GaN, it is important to consider some critical points in the design phase as well as in [...] Read more.
This paper presents a complete workflow for the evaluation of GaN transistors in voltage source inverters. With the associated high switching speed of transistors based on GaN, it is important to consider some critical points in the design phase as well as in the measurement setup in order to be able to utilise and verify the advantages of GaN properly. For this reason, the presented circuit board’s design focuses on a minimised power loop inductance. Simulation models, an analytical approach and measurement results with the aim of determining this inductance are compared with each other. A good compliance results between the presented methods. Additionally, the description of a test bench is given, which enables the performance of the opposition method. This setup allows the measurement of the designed H-bridge’s arising losses and the GaN-transistor’s switching behaviour. In comparison to the conventional double pulse method, this approach enables results that are more accurate for determining losses. Full article
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13 pages, 2498 KiB  
Article
Evaluation of Dynamic On-Resistance and Trapping Effects in GaN on Si HEMTs Using Rectangular Gate Voltage Pulses
by Pasquale Cusumano, Alessandro Sirchia and Flavio Vella
Electronics 2025, 14(14), 2791; https://doi.org/10.3390/electronics14142791 - 11 Jul 2025
Cited by 1 | Viewed by 398
Abstract
Dynamic on-resistance (RON) of commercial GaN on Si normally off high-electron-mobility transistor (HEMT) devices is a very important parameter because it is responsible for conduction losses that limit the power conversion efficiency of high-power switching converters. Due to charge trapping effects, [...] Read more.
Dynamic on-resistance (RON) of commercial GaN on Si normally off high-electron-mobility transistor (HEMT) devices is a very important parameter because it is responsible for conduction losses that limit the power conversion efficiency of high-power switching converters. Due to charge trapping effects, dynamic RON is always higher than in DC, a behavior known as current collapse. To study how short-time dynamics of charge trapping and release affects RON we use rectangular 0–5 V gate voltage pulses with durations in the 1 μs to 100 μs range. Measurements are first carried out for single pulses of increasing duration, and it is found that RON depends on both pulse duration and drain current ID, being higher at shorter pulse durations and lower ID. For a train of five pulses, RON decreases with pulse number, reaching a steady state after a time interval of 100 μs. The response to a five pulses train is compared to that of a square-wave signal to study the time evolution of RON toward a dynamic steady state. The DC RON is also measured, and it is a factor of ten smaller than dynamic RON at the same ID. This confirms that a reduction in trapped charges takes place in DC as compared to the square-wave switching operation. Additional off-state stress tests at VDS = 55 V reveal the presence of residual surface traps in the drain access region, leading to four times increase in RON in comparison to pristine devices. Finally, the dynamic RON is also measured by the double-pulse test (DPT) technique with inductive load, giving a good agreement with results from single-pulse measurements. Full article
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14 pages, 3948 KiB  
Article
Using Triangular Gate Voltage Pulses to Evaluate Hysteresis and Charge Trapping Effects in GaN on Si HEMTs
by Pasquale Cusumano, Flavio Vella and Alessandro Sirchia
Electronics 2025, 14(10), 1991; https://doi.org/10.3390/electronics14101991 - 13 May 2025
Cited by 1 | Viewed by 562
Abstract
Charge carrier traps due to crystal defects in GaN on Si HEMT devices are responsible for dynamic performance degradation, long-term reliability limitations, and peculiar failure modes. The behavior of traps depends on many variables including heterostructure quality, the specific device structure, and operating [...] Read more.
Charge carrier traps due to crystal defects in GaN on Si HEMT devices are responsible for dynamic performance degradation, long-term reliability limitations, and peculiar failure modes. The behavior of traps depends on many variables including heterostructure quality, the specific device structure, and operating conditions. To study the short time dynamics of charge trapping and release on the threshold voltage shift and hysteresis of commercial normally off GaN HEMTs we use triangular 0–5 V gate voltage pulses in the μs to ms duration range. Measurements are performed for single pulses by varying pulse duration and for a train of a few pulses by varying their number. The results indicate that hysteresis and related threshold voltage shift occur after repeated pulses, suggesting an accumulation of trapped charges. However, for a triangular wave hysteresis vanishes, meaning that a dynamic balance between charge trapping and release is established in the device. This can be considered as a positive indicator of device robustness and reliability. The same method, used to measure the gate threshold voltage shift and dynamic RON after a 30 min off-state DC stress at VDS = 55 V with a floating gate, highlights an appreciable performance degradation of the device. Full article
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