Advances in Low Power and High Power Electronics

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Power Electronics".

Deadline for manuscript submissions: closed (31 December 2021) | Viewed by 19043

Special Issue Editors


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Guest Editor
School of Electrical and Electronic Engineering, Newcastle University International Singapore, Singapore 567739, Singapore
Interests: power electronic circuits and systems for aerospace; electric vehicles; smart grids; microgrids and sustainability
Special Issues, Collections and Topics in MDPI journals

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Guest Editor
School of Computer Science and Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore
Interests: approximate computing; asynchronous circuits; computer arithmetic; digital integrated circuits; fault-tolerant design; reliability; logic synthesis
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

We are pleased to announce a Special Issue on recent advances in low-power and high-power electronics and solicit your high-quality research and review articles for this collection.

Advances in Low-Power Electronics:

Rapid advances in semiconductor technologies over the past four decades have fostered the massive proliferation of personal, portable, and mobile electronic systems based on low-power electronics on a global scale. Transistor dimensions have reduced by more than 700 times within about 4 decades: the first commercial Intel 4004 microprocessor in 1971 used a 10 µm (10000 nm) process technology, while the 10th-generation Intel core-family microprocessor in 2020 uses a 14 nm process technology. Continuous reduction in transistor dimensions and constant advances in semiconductors, electronic devices, circuits, sub-systems, systems, and memories have paved the way for the relentless progress of low-power electronics, which fuels digitalization in the modern era. Research in low-power electronics is multi-faceted. This Special Issue invites fundamental and applied research works on all aspects of low-power electronics including, but not limited to, the following topics:

  • Digital circuits and systems
  • Digital signal processing
  • Analog and mixed-signal circuits and systems
  • Beyond CMOS technologies: nanoelectronics, molecular electronics, optical computing, spintronics and spin-based computing, biologically inspired computing, quantum devices, etc.
  • Neuromorphic circuits and systems
  • Biomedical circuits and systems
  • Circuits and system architectures for artificial intelligence and machine learning applications
  • Near- and sub-threshold circuits and systems
  • Non-linear circuits and systems
  • Communication circuits and systems
  • Sensors and sensory networks
  • Electronics for Internet of Things (IoT) and smart medical devices

Advances in High-Power Electronics:

Long-term environmental concerns, population growth, and increased energy demand urge the development of clean- and green-energy-based power generation. High-power electronics plays a vital role in integrating the various renewable energy resources into the grid to address the current energy crisis. Solar and wind are the fastest-developing sources of renewable energy. The grid should be able to accommodate such renewables without losing its reliability and robustness. The smart grid is an enhanced version of the conventional electricity grid which enables energy security and reliability and the integration of various renewable energy resources. Therefore, the future grid will pave the way for CO2 reduction and clean energy deployment.

This Special Issue will focus on recent trends and innovations in high-power electronic technologies such as integration of rooftop PV, floating PV, and onshore and offshore wind farms, energy storage systems, novel concepts in high-power electronics, fault ride through, state of the art of fault-tolerant converters, smart inverters, electric vehicle charging, microgrids, distributed energy resources control and integration, smart grids, high-performance and high-power density converters for energy-efficient systems for future power systems.

The Special Issue will investigate the following topics regarding high-power electronics, but contributions in related fields will also be considered:

  • Fault-tolerant converters for renewable energy systems
  • Electric vehicle charging technologies
  • Power electronics using emerging device technologies such as GaN, SiC, etc.
  • Power electronics for microgrids
  • Power electronic applications in smart grids
  • Power electronics for offshore windfarms integration
  • Advanced power electronic interface for PV
  • Energy storage systems
  • Smart inverters
  • High-power density converters
  • Distributed energy resources control and integration
  • Fault ride-through capability of advanced power converters

Dr. Thaiyal Naayagi Ramasamy
Dr. Padmanabhan Balasubramanian
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Digital circuits and systems
  • Digital signal processing
  • Analog and mixed-signal circuits and systems
  • Beyond CMOS technologies: nanoelectronics, molecular electronics, optical computing, spintronics and spin-based computing, biologically inspired computing, quantum devices, etc.
  • Neuromorphic circuits and systems
  • Biomedical circuits and systems
  • Circuits and system architectures for artificial intelligence and machine learning applications
  • Near- and sub-threshold circuits and systems
  • Non-linear circuits and systems
  • Communication circuits and systems
  • Sensors and sensory networks
  • Electronics for Internet of Things (IoT) and smart medical devices
  • Fault-tolerant converters for renewable energy systems
  • Electric vehicle charging technologies
  • Power electronics using emerging device technologies such as GaN, SiC, etc.
  • Power electronics for microgrids
  • Power electronic applications in smart grids
  • Power electronics for offshore windfarms integration
  • Advanced power electronic interface for PV
  • Energy storage systems
  • Smart inverters
  • High-power density converters
  • Distributed energy resources control and integration
  • Fault ride-through capability of advanced power converters

Published Papers (8 papers)

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Research

15 pages, 3911 KiB  
Article
SAPF Parameter Optimization with the Application of Taguchi SNR Method
by Jitendra Kumar Sao, Ramasamy Thaiyal Naayagi, Gayadhar Panda, Ram Dayal Patidar and Sushree Diptimayee Swain
Electronics 2022, 11(3), 348; https://doi.org/10.3390/electronics11030348 - 24 Jan 2022
Cited by 7 | Viewed by 2121
Abstract
Non-linear devices draw non-sinusoidal currents from the source; hence, they cause harmonic distortions in power systems. The shunt active power filter (SAPF) is a well-known method for alleviating current harmonics, compensating the reactive power and improving the power factor; however, the effective design [...] Read more.
Non-linear devices draw non-sinusoidal currents from the source; hence, they cause harmonic distortions in power systems. The shunt active power filter (SAPF) is a well-known method for alleviating current harmonics, compensating the reactive power and improving the power factor; however, the effective design of an SAPF is quite challenging and a thrust area of research. The current controlling technique, switching pulse generation technique and parameter selection are cumbersome tasks in SAPF design. SAPF performance depends on the proper selection of many parameters, such as filter interfacing impedance, DC-link capacitor and PI-controller gains. The effect of these parameters on the performance of SAPF has been studied and optimum values have been obtained by using the Taguchi method. This paper also indicates the benefits of using the Taguchi method compared with existing genetic algorithm (GA) for optimizing the parameters of the SAPF. An instantaneous reactive power theory (IRPT)-based SAPF has been modeled and simulated in MATLAB/Simulink. The SAPF’s parameters have been optimized by using the both proposed Taguchi SNR and the existing GA method. With optimized values of parameters results have been obtained, analyzed and the superiority of the proposed Taguchi method over the existing GA method is discussed. The simulation results were also validated with experimental results. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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15 pages, 3574 KiB  
Article
Design and Analysis of a Voltage-Mode Non-Linear Control of a Non-Minimum-Phase Positive Output Elementary Luo Converter
by Satyajit H. Chincholkar, Sangmesh V. Malge and Sanjaykumar L. Patil
Electronics 2022, 11(2), 207; https://doi.org/10.3390/electronics11020207 - 10 Jan 2022
Cited by 5 | Viewed by 1343
Abstract
The positive output elementary Luo (POEL) converter is a fourth-order DC–DC converter having highly non-linear dynamic characteristics. In this paper, a new dynamic output voltage feedback controller is proposed to achieve output voltage regulation of the POEL converter. In contrast to the state-of-the-art [...] Read more.
The positive output elementary Luo (POEL) converter is a fourth-order DC–DC converter having highly non-linear dynamic characteristics. In this paper, a new dynamic output voltage feedback controller is proposed to achieve output voltage regulation of the POEL converter. In contrast to the state-of-the-art current-mode controllers for the high-order boost converters, the proposed control strategy uses only the output voltage state variable for feedback purposes. This eliminates the need for the inductor current sensor to reduce the cost and complexity of implementation. The controller design is accompanied by a strong theoretical foundation and detailed stability analyses to obtain some insight into the controlled system. The performance of the proposed controller is then compared with a multi-loop hysteresis-based sliding-mode controller (SMC) to achieve the output voltage-regulation of the same POEL converter. The schemes are compared concerning ease of implementation, in particular, the number of state variables and current sensors required for implementation and the closed-loop dynamic performance. Experimental results illustrating the features of both controllers in the presence of input reference and load changes are presented. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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16 pages, 64008 KiB  
Article
A Novel Fundamental Frequency Switching Operation for Conventional VSI to Enable Single-Stage High-Gain Boost Inversion with ANN Tuned QWS Controller
by Prabhat R. Tripathi, V. Laxmi, Ritesh K. Keshri, Bhargav Appasani and Taha Selim Ustun
Electronics 2021, 10(20), 2499; https://doi.org/10.3390/electronics10202499 - 14 Oct 2021
Viewed by 1800
Abstract
Single-stage high-gain inverters have recently gained much research focus as interfaces for inherent low voltage DC sources such as fuel cells, storage batteries, and solar panels. Many impedance-assisted inverters with different input stage configurations have been presented. To decrease passive component sizes, these [...] Read more.
Single-stage high-gain inverters have recently gained much research focus as interfaces for inherent low voltage DC sources such as fuel cells, storage batteries, and solar panels. Many impedance-assisted inverters with different input stage configurations have been presented. To decrease passive component sizes, these inverters operate at high-frequency switching. The high-frequency switching optimizes the passive component sizes but introduces many challenges in the form of high-frequency inductor design, control complexity, high-frequency gate driver requirements, high semiconductor losses, and electromagnetic interferences. This article proposes a novel fundamental frequency switching operation for the conventional voltage source inverters (VSI) to operate as a single-stage high-gain inverter. As the novel operational strategy changes the behavior of conventional VSI from buck inverter to a boost inverter, it is hereafter termed as a novel inverter. By virtue of the operation strategy, switches withstand peak inverse voltage (PIV) equal to DC link voltage, unlike other impedance assisted boost inverters where PIV across switches is the amplified DC voltage. The proposed inverter can invert low-level DC voltage to high voltage AC with low total harmonic distortion (THD) in a single stage without the help of any external filter. A novel quarter-wave symmetric phase-shift controller is proposed for variable voltage and frequency control of proposed inverters tuned by a back-propagation thin-plate-spline neural network (BPTPSNN). Mathematical analysis with experimental validation is presented. Experimentation is carried out on a prototype of 2 kW for single-phase resistive load, induction motor, and non-linear loads. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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30 pages, 35041 KiB  
Article
Conceptualization and Analysis of a Next-Generation Ultra-Compact 1.5-kW PCB-Integrated Wide-Input-Voltage-Range 12V-Output Industrial DC/DC Converter Module
by Gustavo C. Knabben, Grayson Zulauf, Jannik Schäfer, Johann W. Kolar, Matthias J. Kasper, Jon Azurza Anderson and Gerald Deboy
Electronics 2021, 10(17), 2158; https://doi.org/10.3390/electronics10172158 - 4 Sep 2021
Cited by 4 | Viewed by 3292
Abstract
The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production costs, in particular, drive the need for [...] Read more.
The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production costs, in particular, drive the need for power converters with (i) a wide input voltage range, to reduce the size of the hold-up capacitor, (ii) soft-switching over the full input voltage and load ranges, to achieve low losses that facilitate a compact realization, and (iii) complete PCB-integration for low-cost manufacturing. In this work, we conceptualize, design, model, fabricate, and characterize a 1.5 kW, 12 V-output DC/DC converter for industrial power supplies that is required to operate across a wide 300 V–430 V input voltage range. This module utilizes an LLC-based control scheme for complete soft-switching and a snake-core transformer to divide the output current with a balanced flux among multiple secondary windings. Detailed loss models are derived for every component in the converter. The converter achieves close to 96% peak efficiency with a power density of 337 W in3 (20.6 kW/dm3), excellent matching to the derived loss models, and zero-voltage switching even down to zero load. The loss models are used to identify improvements to further boost efficiency, the most important of which is the minimization of delay times in synchronous rectification, and a subsequent improved 1.5 kW hardware module eliminates nearly 25% of converter losses for a peak efficiency of nearly 97% with a power density of 308 W in3 (18.8 kW dm3). Two 1.5 kW modules are then paralleled to achieve 3 kW output power at 12 V and 345 W in3 (21.1 kW dm3) with ideal current sharing between the secondary outputs and no drop in efficiency from a single module, an important characteristic enabled by the novel snake-core transformer. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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18 pages, 5615 KiB  
Article
Electronically Tunable Full Wave Precision Rectifier Using DVCCTAs
by Niranjan Raj, Sagar, Rajeev Kumar Ranjan, Bindu Priyadarshini and Nicu Bizon
Electronics 2021, 10(11), 1262; https://doi.org/10.3390/electronics10111262 - 25 May 2021
Cited by 9 | Viewed by 3054
Abstract
This work presents a voltage mode scheme of a full-wave precision rectifier circuit using an analog building block differential voltage current conveyor transconductance amplifier (DVCCTA) including five NMOS transistors. The proposed design is essentially suited for low voltage and high-frequency input signals. The [...] Read more.
This work presents a voltage mode scheme of a full-wave precision rectifier circuit using an analog building block differential voltage current conveyor transconductance amplifier (DVCCTA) including five NMOS transistors. The proposed design is essentially suited for low voltage and high-frequency input signals. The operation of the proposed rectifier design depends upon the region of operation of NMOS transistors. The output waveform of the presented rectifier design can be made electronically tunable by controlling the bias voltage. The functional correctness and verification of the presented design are performed using 0.25-µm TSMC technology under the supply voltage of ±1.5 V. The absence of a resistor leads to a minimal parasitic effect. To obtain further insight on the robustness of the circuit, a Monte Carlo simulation and corner analysis are also presented. The circuit is verified experimentally by incorporating a breadboard model with the help of commercially available ICs CA3080 (operational transconductance amplifier) and AD844AN (current feedback operational amplifier) and offers remarkable compliance with both theoretical and simulation outcomes. The presented design has been laid out on Cadence virtuoso, which consumes a chip area of 9044 µm2. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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16 pages, 18533 KiB  
Article
Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology
by Pedro André Martins Bezerra, Florian Krismer, Johann Walter Kolar, Riduan Khaddam-Aljameh, Stephan Paredes, Ralph Heller, Thomas Brunschwiler, Pier Andrea Francese, Thomas Morf, Marcel André Kossel and Matthias Braendli
Electronics 2021, 10(10), 1150; https://doi.org/10.3390/electronics10101150 - 12 May 2021
Cited by 1 | Viewed by 1826
Abstract
Different Half-Bridge (HB) converter topologies for an Integrated Voltage Regulator (IVR), which serves as a microprocessor application, were evaluated. The HB circuits were implemented with Stacked Transistors (HBSTs) in a cutting-edge 14 nm CMOS technology node in order to enable the integration on [...] Read more.
Different Half-Bridge (HB) converter topologies for an Integrated Voltage Regulator (IVR), which serves as a microprocessor application, were evaluated. The HB circuits were implemented with Stacked Transistors (HBSTs) in a cutting-edge 14 nm CMOS technology node in order to enable the integration on the microprocessor die. Compared to a conventional realization of the HBST, it was found that the Active Neutral-Point Clamped (ANPC) HBST topology with Independent Clamp Switches (ICSs) not only ensured balanced blocking voltages across the series-connected transistors, but also featured a more robust operation and achieved higher efficiencies at high output currents. The IVR achieved a maximum efficiency of 85.3% at an output current of 300 mA and a switching frequency of 50 MHz. At the maximum measured output current of 780 mA, the efficiency was 83.1%. The active part of the IVR (power switches, gate-drivers, and level shifters) realized a high maximum current density of 24.7 A/mm2. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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12 pages, 3843 KiB  
Article
A New Active Control Driver Circuit for Satellite’s Torquer System Using Second Generation Current Conveyor
by Vijay Kumar Verma, Rajeev Kumar Ranjan, Pallav Prince, Bhargav Appasani, Nicu Bizon and Phatiphat Thounthong
Electronics 2021, 10(8), 911; https://doi.org/10.3390/electronics10080911 - 11 Apr 2021
Cited by 1 | Viewed by 1916
Abstract
In this article a new active control driver circuit is designed using the second-generation current conveyor for the satellite’s torquer system. The torquer plays an important role in the attitude control of the satellite. Based on the magneto-meter data, the satellite’s microprocessor calculates [...] Read more.
In this article a new active control driver circuit is designed using the second-generation current conveyor for the satellite’s torquer system. The torquer plays an important role in the attitude control of the satellite. Based on the magneto-meter data, the satellite’s microprocessor calculates the required current for the torque and sends a reference command. A close loop control system is designed, which generates the desired output current. The parameters of the controller are optimized using a variant of the well-known evolutionary algorithm, the genetic algorithm (GA). This variant is known as the segmented GA. The controller is experimentally implemented using the commercially available integrated circuit, the AD844. The error between the experimental and simulation results has RMS values in range of 0.01–0.16 A for the output current and 0.41–0.6 V for the output voltage. It has mean value of 0.01 A for the output current and has mean values in the range of 0.33–0.48 V for the output voltage. It has standard deviation of 0.01 A for the output current and standard deviations in the range of 0.24–0.35 V for the output voltage. Thus, there is a close match between the simulation and experimental results, validating the design approach. These designs have many practical applications, particularly for nanosatellites powered by photovoltaic panels. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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19 pages, 15998 KiB  
Article
A 30 μW Embedded Real-Time Cetacean Smart Detector
by Sebastián Marzetti, Valentin Gies, Paul Best, Valentin Barchasz, Sébastien Paris, Hervé Barthélémy and Hervé Glotin
Electronics 2021, 10(7), 819; https://doi.org/10.3390/electronics10070819 - 30 Mar 2021
Cited by 1 | Viewed by 2178
Abstract
Cetacean monitoring is key to their protection. Understanding their behavior relies on multi-channel and high-sampling-rate underwater acoustic recordings for identifying and tracking them in a passive way. However, a lot of energy and data storage is required, requiring frequent human maintenance operations. To [...] Read more.
Cetacean monitoring is key to their protection. Understanding their behavior relies on multi-channel and high-sampling-rate underwater acoustic recordings for identifying and tracking them in a passive way. However, a lot of energy and data storage is required, requiring frequent human maintenance operations. To cope with these constraints, an ultra-low power mixed-signal always-on wake-up is proposed. Based on pulse-pattern analysis, it can be used for triggering a multi-channel high-performance recorder only when cetacean clicks are detected, thus increasing autonomy and saving storage space. This detector is implemented as a mixed architecture making the most of analog and digital primitives: this combination drastically improves power consumption by processing high-frequency data using analog features and lower-frequency ones in a digital way. Furthermore, a bioacoustic expert system is proposed for improving detection accuracy (in ultra-low-power) via state machines. Power consumption of the system is lower than 30 μW in always-on mode, allowing an autonomy of 2 years on a single CR2032 battery cell with a high detection accuracy. The receiver operating characteristic (ROC) curve obtained has an area under curve of 85% using expert rules and 75% without it. This implementation provides an excellent trade-off between detection accuracy and power consumption. Focused on sperm whales, it can be tuned to detect other species emitting pulse trains. This approach facilitates biodiversity studies, reducing maintenance operations and allowing the use of lighter, more compact and portable recording equipment, as large batteries are no longer required. Additionally, recording only useful data helps to reduce the dataset labeling time. Full article
(This article belongs to the Special Issue Advances in Low Power and High Power Electronics)
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