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High-Performance RF Power Amplifiers: The Advancement of GaN, Si, and CMOS for Future Communications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microwave and Wireless Communications".

Deadline for manuscript submissions: closed (15 June 2026) | Viewed by 2625

Editor

School of Electronic Engineering, Kyonggi University, Suwon-si, Republic of Korea
Interests: broadband; high power RF power amplifier; 5G and IOT RF system and parts development
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The explosive growth of next-generation wireless communication systems, including 5G, 6G, and beyond, demands significant advancements in RF power amplifier (PA) technologies. Power amplifiers are critical components in RF front-end modules, directly impacting the performance, efficiency, and reliability of wireless transmitters. This Special Issue aims to explore state-of-the-art developments in high-performance RF power amplifiers using GaN, Si, and CMOS technologies.

Gallium nitride (GaN) devices are gaining increasing attention due to their superior power density, efficiency, and high-frequency capabilities, making them ideal for 5G base stations and emerging high-power applications. At the same time, silicon (Si) and CMOS-based RF PAs offer integration benefits and cost-effectiveness for consumer-level mobile and IoT applications. Recent efforts have focused on improving linearity, energy efficiency, and thermal management while operating at ever-increasing frequencies.

This Special Issue invites contributions related to novel PA architectures, linearization techniques, power-combining methods, broadband performance, thermal-aware design, and packaging innovations across GaN, Si, and CMOS platforms. We are especially interested in research that bridges theory and practice, including circuit-level modeling, EDA tool advancements, and real-world deployments. Whether targeting mmWave front-ends, energy-efficient transmitters, or low-cost PA modules for large-scale integration, this Issue serves as a platform for the discussion of cutting-edge solutions in PA design with an eye to future communication systems.

  • GaN-based high-efficiency RF power amplifiers;
  • CMOS RF PA designs for mobile and IoT applications;
  • Thermal management techniques for high-power PAs;
  • Broadband and multiband PA architectures;
  • Linearity enhancement and digital pre-distortion;
  • Doherty, outphasing, and envelope tracking techniques;
  • Power-combining and load modulation networks;
  • Integration of PAs with antenna arrays in RF modules;
  • PA reliability, packaging, and EMI considerations;
  • Emerging PA solutions for 5G, 6G, and beyond.

While the topics listed should provide a general guideline, we also welcome submissions that explore other emerging concepts, unconventional design approaches, or technologies related to RF power amplifiers. The submission of innovative research that challenges the current boundaries of PA design is particularly encouraged.

Join us in advancing RF power amplifier research with your impactful contributions.

I look forward to receiving your contributions.

Dr. Jihoon Kim
Guest Editor

Manuscript Submission Information

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Keywords

  • GaN power amplifier
  • CMOS RF circuit
  • high-efficiency PA
  • linearity
  • mmWave PA
  • thermal-aware design
  • 5G
  • 6G
  • wireless transmitters

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Published Papers (2 papers)

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Research

11 pages, 3116 KB  
Article
A Fully Integrated Direct Conversion Transmitter with I/Q-Isolated CMOS PA for Sub-6 GHz 5G NR
by Donghwi Kang, Jeheon Lee, Hyeong-Ju Kwon, So-Min Park, Soo-Jin Park, Sung-Uk We and Ji-Seon Paek
Electronics 2026, 15(1), 64; https://doi.org/10.3390/electronics15010064 - 23 Dec 2025
Viewed by 697
Abstract
This work presents a direct conversion transmitter (DCT) for 5G new radio (NR) that eliminates the RF driver by directly feeding a single stage cascode PA through a baseband buffer amplifier and passive up-conversion mixer. The baseband interface uses Class-AB buffers to hold [...] Read more.
This work presents a direct conversion transmitter (DCT) for 5G new radio (NR) that eliminates the RF driver by directly feeding a single stage cascode PA through a baseband buffer amplifier and passive up-conversion mixer. The baseband interface uses Class-AB buffers to hold the output capacitor voltage, enabling accurate sampling at the PA input. A mixer switch is selected for minimal on-resistance variation over the required baseband swing. The PA is designed with separate I and Q voltage inputs and a current summing structure. The PA operates at 2.5 V; other blocks use 1.2 V. Post-layout two-tone simulations at 5 GHz indicate 21 dBm output saturation power and −36.1 dBc of IMD3 at 9 dB PBO power while removing the driver to inter stage matching network of a two-stage design. The results validate a compact, driverless architecture for integrated transmitters. Full article
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19 pages, 1254 KB  
Article
An 8–15 GHz Doherty Power Amplifier with a Compact Quadrature-Hybrid-Based Output Combiner in 22 nm FD-SOI
by Mohamed K. Hussein, Adham Nafee, Mostafa G. Ahmed, Hani Fikri Ragaai and Mohamed El-Nozahi
Electronics 2025, 14(23), 4603; https://doi.org/10.3390/electronics14234603 - 24 Nov 2025
Cited by 2 | Viewed by 1044
Abstract
A compact 8–15 GHz Doherty power amplifier (DPA) is proposed and fabricated in 22 nm FD-SOI CMOS. The proposed DPA relies on a quadrature-hybrid splitter and combiner to replace the bulky λ/4 impedance inverters at the input and the output of the [...] Read more.
A compact 8–15 GHz Doherty power amplifier (DPA) is proposed and fabricated in 22 nm FD-SOI CMOS. The proposed DPA relies on a quadrature-hybrid splitter and combiner to replace the bulky λ/4 impedance inverters at the input and the output of the conventional DPA enabling load modulation over a large fractional bandwidth (FBW = 61%) with efficient and compact integration. The proposed DPA achieves a peak gain of 19.6 dB; ≥17 dB across 8–15 GHz, 18 dBm P1dB, 19.5 dBm Psat, and a peak PAE of 21% at 10 GHz, while sustaining 17% PAE at 6 dB back-off. The proposed DPA enables a modulation BW up to 200 MHz for a 256-QAM single carrier (SC) signal with a peak-to-average power ratio (PAPR) of 6 dB. Under this setting, the average output power (Pavg) is measured at 12.5 dBm with an RMS error vector magnitude (EVM) of 24.1 dB and an average PAE of 15%. Within the scope of CMOS power amplifiers in 22 nm FD-SOI, we found no published example that jointly demonstrates 8–15 GHz coverage and sustained PAE at 6 dB back-off using a quadrature hybrid. Full article
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