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Electronics, Volume 7, Issue 8 (August 2018)

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Cover Story (view full-size image) By using multilevel inductors area minimization is accomplished. In the multilevel structure, the [...] Read more.
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Open AccessArticle Designing Constant Modulus Sequences with Good Correlation and Doppler Properties for Simultaneous Polarimetric Radar
Electronics 2018, 7(8), 153; https://doi.org/10.3390/electronics7080153
Received: 12 July 2018 / Revised: 15 August 2018 / Accepted: 17 August 2018 / Published: 20 August 2018
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Abstract
Simultaneous polarimetric radar transmits a pair of orthogonal waveforms both of which must have good auto- and cross-correlation properties. Besides, high Doppler tolerance is also required in measuring the highly maneuvering targets. A new method for the design of sequences with good correlation
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Simultaneous polarimetric radar transmits a pair of orthogonal waveforms both of which must have good auto- and cross-correlation properties. Besides, high Doppler tolerance is also required in measuring the highly maneuvering targets. A new method for the design of sequences with good correlation and Doppler properties is proposed. We formulate a fourth-order polynomial, but unconstrained, minimization problem. An iterative algorithm based on the gradient method on the phases is applied to solve it. Numerical results demonstrate the superiority of the proposed algorithm compared to the previous state-of-the-art method. Full article
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Open AccessArticle Fast and Accurate Memory Simulation by Integrating DRAMSim2 into McSimA+
Electronics 2018, 7(8), 152; https://doi.org/10.3390/electronics7080152
Received: 2 July 2018 / Revised: 10 August 2018 / Accepted: 17 August 2018 / Published: 20 August 2018
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Abstract
Computer architecture simulators play a crucial role in the verification of a new system’s design. However, a single simulator may not be sufficient in covering detailed modeling of the entire system, thereby lacking in the simulation of a specific functionality under investigation. In
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Computer architecture simulators play a crucial role in the verification of a new system’s design. However, a single simulator may not be sufficient in covering detailed modeling of the entire system, thereby lacking in the simulation of a specific functionality under investigation. In this case, combining two simulators is necessary to compensate for the drawbacks of a single simulator. This paper proposes the integration of DRAMSim2, a simulator that thoroughly models DDR-SDRAM main memory architecture, into the application-level+ simulator McSimA+. The challenges of achieving an efficient integration, especially the integration of a cycle-accurate simulator into an event-driven environment, are addressed. The combined simulator achieves high accuracy due to cycle-accurate simulation while maintaining high speed and flexibility of the event-driven application-level+ simulator. The new simulator’s overall system performance and the accuracy of the newly-integrated power model are verified against the gem5 simulator. Full article
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Open AccessArticle On-Line Application of SHEM by Particle Swarm Optimization to Grid-Connected, Three-Phase, Two-Level VSCs with Variable DC Link Voltage
Electronics 2018, 7(8), 151; https://doi.org/10.3390/electronics7080151
Received: 4 July 2018 / Revised: 10 August 2018 / Accepted: 16 August 2018 / Published: 20 August 2018
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Abstract
This paper is devoted to an otablen-line application of the selective harmonic elimination method (SHEM) to three-phase, two-level, grid-connected voltage source converters (VSCs) by particle swarm optimization (PSO). In such systems, active power can be controlled by the phase shift angle, and reactive
[...] Read more.
This paper is devoted to an otablen-line application of the selective harmonic elimination method (SHEM) to three-phase, two-level, grid-connected voltage source converters (VSCs) by particle swarm optimization (PSO). In such systems, active power can be controlled by the phase shift angle, and reactive power by the modulation index, against variations in the direct current (DC) link voltage. Some selected, low-odd-order harmonic components in the line-to-neutral output voltage waveforms are eliminated by calculating the SHEM angle set continuously through the developed PSO algorithm on field-programmable gate array (FPGA)-based computing hardware as the modulation index is varied. The use of powerful computing hardware permits the elimination of all harmonics up to 50th. The cost function of the developed PSO algorithm is formulated by using an optimum number of particles to obtain a global optimum solution with a small fitness value in each half-cycle of the grid voltage and then updating the SHEM angle set at the beginning of the next full-cycle. Since the convergence of the solution to a global minimum point depends upon the use of correct initial values especially for a large number of SHEM angles, a generalized initialization procedure is also described in the paper. Theoretical results are verified initially using hardware co-simulation. They are also tested using a small scale photovoltaic (PV) supply prototype developed specifically for this purpose. It is demonstrated that the 5th, 7th, 11th, 13th, 17th, and 19th sidekick harmonics are eliminated by on-line calculation of seven SHEM angles through the developed PSO algorithm on a moderately powerful XEM6010-LX150, USB-2.0-integrated FPGA module. All control and protection actions and the calculation of SHEM angles are achieved by a single FPGA chip and its peripherals within the FPGA board. Full article
(This article belongs to the Special Issue Applications of Power Electronics)
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Open AccessArticle An Improved Frequency Measurement Method from the Digital PLL Structure for Single-Phase Grid-Connected PV Applications
Electronics 2018, 7(8), 150; https://doi.org/10.3390/electronics7080150
Received: 12 July 2018 / Revised: 9 August 2018 / Accepted: 18 August 2018 / Published: 20 August 2018
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Abstract
The Phase Locked Loop (PLL) technique has been studied to obtain the phase and frequency information in grid-connected distributed generations for the sake of synchronizing the grid voltage and the inverter output current. In particular, the line frequency information, such as the anti-islanding
[...] Read more.
The Phase Locked Loop (PLL) technique has been studied to obtain the phase and frequency information in grid-connected distributed generations for the sake of synchronizing the grid voltage and the inverter output current. In particular, the line frequency information, such as the anti-islanding function, is very important for the grid connection requirement. This paper presents a novel frequency measurement method from the digital PLL control structure for single-phase grid-connected PV applications. The conventional PLL controller uses the phase information to calculate the frequency of PV inverter output voltage after every line cycle and has shown a relatively low accuracy. This paper uses the angular frequency to directly measure the frequency after every line cycle. To verify the validity of the proposed method compared with the conventional method, a simulation was conducted. According to the simulation results, the measurement error of the proposed method is 80 times lower than the conventional one. Full article
(This article belongs to the Special Issue Grid Connected Photovoltaic Systems)
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Open AccessArticle An Effective Switching Algorithm for Single Phase Matrix Converter in Induction Heating Applications
Electronics 2018, 7(8), 149; https://doi.org/10.3390/electronics7080149
Received: 26 June 2018 / Revised: 8 August 2018 / Accepted: 16 August 2018 / Published: 18 August 2018
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Abstract
Prevalent converters for induction heating (IH) applications employ two-stage conversion for generating high-frequency magnetic field, namely, AC to DC and then DC to high-frequency AC (HFAC). This research embarks upon a direct conversion of utility AC to high frequency AC with the design
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Prevalent converters for induction heating (IH) applications employ two-stage conversion for generating high-frequency magnetic field, namely, AC to DC and then DC to high-frequency AC (HFAC). This research embarks upon a direct conversion of utility AC to high frequency AC with the design of a single-phase matrix converter (SPMC) as a resonant converter using a modified switching technique for IH application. The efficacy of the proposed approach is validated through different attributes such as unity power factor, sinusoidal input current and low total harmonic distortion (THD). The developed prototype-embedded system has high pragmatic deployment potential owing to its cost effectiveness using Arduino mega 2560 and high voltage/current as well as low switching time IXRH40N120 insulated-gate bipolar transistor (IGBT). Different results of the prototype-embedded system for IH application have been verified using Matlab Simulink environment to corroborate its efficacy. Full article
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Open AccessArticle An Inverse Synthetic Aperture Ladar Imaging Algorithm of Maneuvering Target Based on Integral Cubic Phase Function-Fractional Fourier Transform
Electronics 2018, 7(8), 148; https://doi.org/10.3390/electronics7080148
Received: 11 July 2018 / Revised: 11 August 2018 / Accepted: 13 August 2018 / Published: 15 August 2018
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Abstract
When imaging maneuvering targets with inverse synthetic aperture ladar (ISAL), dispersion and Doppler frequency time-variation exist in the range and cross-range echo signal, respectively. To solve this problem, an ISAL imaging algorithm based on integral cubic phase function-fractional Fourier transform (ICPF-FRFT) is proposed
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When imaging maneuvering targets with inverse synthetic aperture ladar (ISAL), dispersion and Doppler frequency time-variation exist in the range and cross-range echo signal, respectively. To solve this problem, an ISAL imaging algorithm based on integral cubic phase function-fractional Fourier transform (ICPF-FRFT) is proposed in this paper. The accurate ISAL echo signal model is established for a space maneuvering target that quickly approximates the uniform acceleration motion. On this basis, the chirp rate of the echo signal is quickly estimated by using the ICPF algorithm, which uses the non-uniform fast Fourier transform (NUFFT) method for fast calculations. At the best rotation angle, the range compression is realized by FRFT and the range dispersion is eliminated. After motion compensation, separation imaging of strong and weak scattering points is realized by using ICPF-FRFT and CLEAN technique and the azimuth defocusing problem is solved. The effectiveness of the proposed method is verified by a simulation experiment of an aircraft scattering point model and real data. Full article
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Open AccessArticle Improving Intelligence and Efficiency of Salt Lake Production by Applying a Decision Support System Based on IOT for Brine Pump Management
Electronics 2018, 7(8), 147; https://doi.org/10.3390/electronics7080147
Received: 20 July 2018 / Revised: 9 August 2018 / Accepted: 10 August 2018 / Published: 14 August 2018
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Abstract
At present, due to their geographical distribution, environmental conditions and traditional monitoring technologies, the manual inspection of brine pumps in Qinghai Saline Lake can not be effectively carried out in real time, so the pumps have a high failure rate. This has seriously
[...] Read more.
At present, due to their geographical distribution, environmental conditions and traditional monitoring technologies, the manual inspection of brine pumps in Qinghai Saline Lake can not be effectively carried out in real time, so the pumps have a high failure rate. This has seriously affected the chemical production of this saline lake. The paper designed a remote real-time monitoring terminal and a decision support system based on LoRa technology, GPRS (General Packet Radio Services) remote communication technology and remote-control technology. The system integrated the liquid-level sensing model and the decision support model for brine pump management. The system monitored and analyzed the voltage, current, and liquid-level parameters in real time to determine the operating status or failure of the brine pump. The ID3 (Iterative Dichotomiser 3) method was used to establish the correlation models between the dynamic monitoring information and the brine pump failure, which is the core of the decision support model. The remote controller was implemented to display and control the running status of the brine pumps when the maintenance personnel received the warning information. PHP (Hypertext Preprocessor) language and a MySQL database were implemented to realize the data display, management and decision support system. Full article
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Open AccessArticle Self-Compensated Driving Circuit for Reducing Drift and Hysteresis in Force Sensing Resistors
Electronics 2018, 7(8), 146; https://doi.org/10.3390/electronics7080146
Received: 15 June 2018 / Revised: 7 August 2018 / Accepted: 8 August 2018 / Published: 14 August 2018
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Abstract
Force Sensing Resistors (FSRs) are manufactured from a blend of conductive nanoparticles dispersed in an insulating polymer matrix. FSRs exhibit large amounts of hysteresis and drift error, but currently, a great effort is placed on improving their performance through different techniques applied during
[...] Read more.
Force Sensing Resistors (FSRs) are manufactured from a blend of conductive nanoparticles dispersed in an insulating polymer matrix. FSRs exhibit large amounts of hysteresis and drift error, but currently, a great effort is placed on improving their performance through different techniques applied during sensor manufacturing. In this article, a novel technique for improving the performance of FSRs is presented; the method can be applied to already-manufactured sensors, which is a clear benefit of the proposed procedure. The method is based on driving the sensors with a modified-astable 555 oscillator, in which the oscillation frequency is set from the sensor’s capacitance and resistance. Considering that the sensor’s capacitance and resistance have opposite signs in the drift characteristic, the driving circuit provides self-compensated force measurements over extended periods of time. The feasibility of the driving circuit to reduce hysteresis and to avoid sensitivity degradation is also tested. In order to obtain representative results, the experimental measurements from this study were performed over eight FlexiForce A201-25 sensors. Full article
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Open AccessArticle FPGA Implementation of a Functional Neuro-Fuzzy Network for Nonlinear System Control
Electronics 2018, 7(8), 145; https://doi.org/10.3390/electronics7080145
Received: 30 May 2018 / Revised: 9 August 2018 / Accepted: 9 August 2018 / Published: 11 August 2018
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Abstract
This study used Xilinx Field Programmable Gate Arrays (FPGAs) to implement a functional neuro-fuzzy network (FNFN) for solving nonlinear control problems. A functional link neural network (FLNN) was used as the consequent part of the proposed FNFN model. This study adopted the linear
[...] Read more.
This study used Xilinx Field Programmable Gate Arrays (FPGAs) to implement a functional neuro-fuzzy network (FNFN) for solving nonlinear control problems. A functional link neural network (FLNN) was used as the consequent part of the proposed FNFN model. This study adopted the linear independent functions and the orthogonal polynomials in a functional expansion of the FLNN. Thus, the design of the FNFN model could improve the control accuracy. The learning algorithm of the FNFN model was divided into structure learning and parameter learning. The entropy measurement was adopted in the structure learning to determine the generated new fuzzy rule, whereas the gradient descent method in the parameter learning was used to adjust the parameters of the membership functions and the weights of the FLNN. In order to obtain high speed operation and real-time application, a very high speed integrated circuit hardware description language (VHDL) was used to design the FNFN controller and was implemented on FPGA. Finally, the experimental results demonstrated that the proposed hardware implementation of the FNFN model confirmed the viability in the temperature control of a water bath and the backing control of a car. Full article
(This article belongs to the Special Issue Selected Papers from the IEEE ICASI 2018)
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Open AccessArticle A Novel Multi-User Codebook Design for 5G in 3D-MIMO Heterogeneous Networks
Electronics 2018, 7(8), 144; https://doi.org/10.3390/electronics7080144
Received: 7 July 2018 / Revised: 30 July 2018 / Accepted: 7 August 2018 / Published: 10 August 2018
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Abstract
The 2D precoding technology can only adjust the beam in a horizontal direction through data processing, which will cause serious problems for multiuser systems, especially at the edge of the base station it will cause serious inter-cell interference. To solve this problem, in
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The 2D precoding technology can only adjust the beam in a horizontal direction through data processing, which will cause serious problems for multiuser systems, especially at the edge of the base station it will cause serious inter-cell interference. To solve this problem, in the frequency-division duplex (FDD) 3D-MIMO Heterogeneous network system, the influence of feedback overhead on system performance under limited feedback mechanism is studied using random geometry. Based on the deployment of a uniform planar array (UPA) at the base station, a 3D-MIMO multiuser codebook design scheme based on horizontal transmission angle and the vertical down-tilt angle is proposed, and the codebook design scheme is simulated and analyzed. The results show that the feedback overhead and the micro base station density affect the system throughput and even affect the bit error rate (BER) of the 3D precoding scheme. Compared with the precoding scheme based on 2D and 3D discrete Fourier transform (DFT) codebooks, this scheme greatly reduces the system’s BER, improves the system’s throughput, and optimizes system performance. Full article
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Open AccessArticle MWCNT–Epoxy Nanocomposite Sensors for Structural Health Monitoring
Electronics 2018, 7(8), 143; https://doi.org/10.3390/electronics7080143
Received: 22 July 2018 / Revised: 5 August 2018 / Accepted: 7 August 2018 / Published: 9 August 2018
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Abstract
We address multi-walled carbon nanotubes (MWCNTs) for structural health monitoring in adhesive bonds, such as in building structures. MWCNT-loaded composites are employed to sense strain changes under tension load using an AC impedance measurement setup. Different weight percentages of 1, 1.5, 2 and
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We address multi-walled carbon nanotubes (MWCNTs) for structural health monitoring in adhesive bonds, such as in building structures. MWCNT-loaded composites are employed to sense strain changes under tension load using an AC impedance measurement setup. Different weight percentages of 1, 1.5, 2 and 3 wt % MWCNTs are added to the base epoxy resin using different dispersion times, i.e., 5, 10, and 15 min. The equivalent parallel resistance of the specimens is first measured by applying an alternating voltage at different frequencies. To determine the mechanical as well as sensory properties, the specimens are then subjected to a tensile test with concurrent impedance measurement at a fixed pre-chosen frequency. Using alternating voltage, a higher sensitivity of the impedance reading can be achieved. Employing these sensors in buildings and combining the readings of a network of such devices can significantly improve the buildings’ safety. Additionally, networks of such sensors can be used to identify necessary maintenance actions and locations. Full article
(This article belongs to the Special Issue Innovative Technologies and Services for Smart Cities)
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Open AccessArticle High Frequency Transformer’s Parasitic Capacitance Minimization for Photovoltaic (PV) High-Frequency Link-Based Medium Voltage (MV) Inverter
Electronics 2018, 7(8), 142; https://doi.org/10.3390/electronics7080142
Received: 18 June 2018 / Revised: 4 August 2018 / Accepted: 6 August 2018 / Published: 8 August 2018
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Abstract
The high-frequency-based medium voltage (MV) inverter is used in renewable energy power sources for power transmission. However, power quality is compromised as a result of the increase in common mode noise currents by the high inter-winding parasitic capacitance in high-frequency link transformers. This
[...] Read more.
The high-frequency-based medium voltage (MV) inverter is used in renewable energy power sources for power transmission. However, power quality is compromised as a result of the increase in common mode noise currents by the high inter-winding parasitic capacitance in high-frequency link transformers. This fast voltage transient response leads to harmonic distortion and transformer overheating, which causes power supply failure or many other electrical hazards. This paper presents a comparative study between conventional and modified toroid transformer designs for isolated power supply. A half bridge high-frequency (10 kHz) MV DC–AC inverter was designed along with power source; a 680 W solar module renewable system was built. An FEM-simulation with Matlab-FFT analysis was used to determine the core flux distribution and to calculate the total harmonics distortion (THD). A GWInstek LCR meter and Fluke VT04A measured the inter-winding capacitance and temperature in all four transformer prototypes, respectively. The modified design of a toroid ferrite core transformer offers more resistance to temperature increase without the use of any cooling agent or external circuitry, while reducing the parasitic capacitance by 87%. Experiments were conducted along with a mathematical derivation of the inter-winding capacitance to confirm the validity of the approach. Full article
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Open AccessArticle Analog Memristive Characteristics and Conditioned Reflex Study Based on Au/ZnO/ITO Devices
Electronics 2018, 7(8), 141; https://doi.org/10.3390/electronics7080141
Received: 5 July 2018 / Revised: 28 July 2018 / Accepted: 1 August 2018 / Published: 8 August 2018
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As the fourth basic electronic component, the application fields of the memristive devices are diverse. The digital resistive switching with sudden resistance change is suitable for the applications of information storage, while the analog memristive devices with gradual resistance change are required in
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As the fourth basic electronic component, the application fields of the memristive devices are diverse. The digital resistive switching with sudden resistance change is suitable for the applications of information storage, while the analog memristive devices with gradual resistance change are required in the neural system simulation. In this paper, a transparent device of ZnO films deposited by the magnetron sputtering on indium tin oxides (ITO) glass was firstly prepared and found to show typical analog memristive switching behaviors, including an I–V curve that exhibits a ‘pinched hysteresis loops’ fingerprint. The conductive mechanism of the device was discussed, and the LTspice model was built to emulate the pinched hysteresis loops of the I–V curve. Based on the LTspice model and the Pavlov training circuit, a conditioned reflex experiment has been successfully completed both in the computer simulation and the physical analog circuits. The prepared device also displayed synapses-like characteristics, in which resistance decreased and gradually stabilized with time under the excitation of a series of voltage pulse signals. Full article
(This article belongs to the Special Issue Nanoelectronic Materials, Devices and Modeling)
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Open AccessArticle Design and Implementation of a Sensor-Cloud Platform for Physical Sensor Management on CoT Environments
Electronics 2018, 7(8), 140; https://doi.org/10.3390/electronics7080140
Received: 6 July 2018 / Revised: 22 July 2018 / Accepted: 24 July 2018 / Published: 7 August 2018
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Abstract
The development of the Internet of Things (IoT) has increased the ubiquity of the Internet by integrating all objects for interaction via embedded systems, leading to a highly distributed network of devices communicating with human beings as well as other devices. In recent
[...] Read more.
The development of the Internet of Things (IoT) has increased the ubiquity of the Internet by integrating all objects for interaction via embedded systems, leading to a highly distributed network of devices communicating with human beings as well as other devices. In recent years, cloud computing has attracted a lot of attention from specialists and experts around the world. With the increasing number of distributed sensor nodes in wireless sensor networks, new models for interacting with wireless sensors using the cloud are intended to overcome restricted resources and efficiency. In this paper, we propose a novel sensor-cloud based platform which is able to virtualize physical sensors as virtual sensors in the CoT (Cloud of Things) environment. Virtual sensors, which are the essentials of this sensor-cloud architecture, simplify the process of generating a multiuser environment over resource-constrained physical wireless sensors and can help in implementing applications across different domains. Virtual sensors are dynamically provided in a group which advantages capability of the management the designed platform. An auto-detection approach on the basis of virtual sensors is additionally proposed to identify the accessible physical sensors nodes even if the status of these sensors are offline. In order to assess the usability of the designed platform, a smart-space-based IoT case study was implemented, and a series of experiments were carried out to evaluate the proposed system performance. Furthermore, a comparison analysis was made and the results indicate that the proposed platform outperforms the existing platforms in numerous respects. Full article
(This article belongs to the Special Issue Open-Source Electronics Platforms: Development and Applications)
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Open AccessArticle Area Efficient Dual-Fed CMOS Distributed Power Amplifier
Electronics 2018, 7(8), 139; https://doi.org/10.3390/electronics7080139
Received: 19 July 2018 / Revised: 30 July 2018 / Accepted: 3 August 2018 / Published: 6 August 2018
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In this paper, an area-efficient 4-stage dual-fed distributed power amplifier (DPA) implemented in a 0.35 μm Complementary Metal Oxide Semiconductor (CMOS) process is presented. To effectively reduce the area of the circuit, techniques such as using multilevel inductors and closely-placing conventional spiral inductors
[...] Read more.
In this paper, an area-efficient 4-stage dual-fed distributed power amplifier (DPA) implemented in a 0.35 μm Complementary Metal Oxide Semiconductor (CMOS) process is presented. To effectively reduce the area of the circuit, techniques such as using multilevel inductors and closely-placing conventional spiral inductors are employed. Additionally, a novel technique based on stacking inductors one on top of others is implemented. Based on these techniques, a 32% area reduction is achieved compared to a conventional design without a noticeable performance degradation. This reduction could be further exploited as the number of stages of the dual-fed DPA increases. Full article
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Open AccessArticle Precision Modeling: Application of Metaheuristics on Current–Voltage Curves of Superconducting Films
Electronics 2018, 7(8), 138; https://doi.org/10.3390/electronics7080138
Received: 13 July 2018 / Revised: 31 July 2018 / Accepted: 1 August 2018 / Published: 3 August 2018
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Abstract
Contemplating the importance of studying current–voltage curves in superconductivity, it has been recently and rightly argued that their approximation, rather than incessant measurements, seems to be a more viable option. This especially becomes bona fide when the latter needs to be recorded for
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Contemplating the importance of studying current–voltage curves in superconductivity, it has been recently and rightly argued that their approximation, rather than incessant measurements, seems to be a more viable option. This especially becomes bona fide when the latter needs to be recorded for a wide range of critical parameters including temperature and magnetic field, thereby becoming a tedious monotonous procedure. Artificial neural networks have been recently put forth as one methodology for approximating these so-called electrical measurements for various geometries of antidots on a superconducting thin film. In this work, we demonstrate that the prediction accuracy, in terms of mean-squared error, achieved by artificial neural networks is rather constrained, and, due to their immense credence on randomly generated networks’ coefficients, they may result in vastly varying prediction accuracies for different geometries, experimental conditions, and their own tunable parameters. This inconsistency in prediction accuracies is resolved by controlling the uncertainty in networks’ initialization and coefficients’ generation by means of a novel entropy based genetic algorithm. The proposed method helps in achieving a substantial improvement and consistency in the prediction accuracy of current–voltage curves in comparison to existing works, and is amenable to various geometries of antidots, including rectangular, square, honeycomb, and kagome, on a superconducting thin film. Full article
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Open AccessArticle A Pipelined FFT Processor Using an Optimal Hybrid Rotation Scheme for Complex Multiplication: Design, FPGA Implementation and Analysis
Electronics 2018, 7(8), 137; https://doi.org/10.3390/electronics7080137
Received: 7 July 2018 / Revised: 29 July 2018 / Accepted: 1 August 2018 / Published: 2 August 2018
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Abstract
The fast Fourier transform (FFT) is the most prevalent algorithm for the spectral analysis of acoustic emission signals acquired at ultra-high sampling rates to monitor the condition of rotary machines. The complexity and cost of the associated hardware limit the use of FFT
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The fast Fourier transform (FFT) is the most prevalent algorithm for the spectral analysis of acoustic emission signals acquired at ultra-high sampling rates to monitor the condition of rotary machines. The complexity and cost of the associated hardware limit the use of FFT in real-time applications. In this paper, an efficient hardware architecture for FFT implementation is proposed based on the radix-2 decimation in frequency algorithm (R2DIF) and a feedback pipelined technique (FB) that allows effective sharing of storage between the input and output data at each stage of the FFT process via shift registers. The proposed design uses an optimal hybrid rotation scheme by combining the modified coordinate rotation digital computer (m-CORDIC) algorithm and a binary encoding technique based on canonical signed digit (CSD) for replacing the complex multipliers in FFT. The m-CORDIC algorithm, with an adaptive iterative monitoring process, improves the convergence of computation, whereas the CSD algorithm optimizes the multiplication of constants using a simple shift-add method. Therefore, the proposed design does not require the large memory typically entailed by existing designs to carry out twiddle factor multiplication in large-point FFT implementations, thereby reducing its area on the chip. Moreover, the proposed pipelined FFT processor uses only distributed logic resources and does not require expensive dedicated functional blocks. Experimental results show that the proposed design outperforms existing state-of-the-art approaches in speed by about 49% and in resource utilization by around 51%, while delivering the same accuracy and utilizing less chip area. Full article
(This article belongs to the Special Issue Hardware and Architecture)
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Open AccessReview Variants of the Low-Energy Adaptive Clustering Hierarchy Protocol: Survey, Issues and Challenges
Electronics 2018, 7(8), 136; https://doi.org/10.3390/electronics7080136
Received: 5 July 2018 / Revised: 28 July 2018 / Accepted: 30 July 2018 / Published: 2 August 2018
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Abstract
A wireless sensor network (WSN) is a modern technology in radio communication. A WSN comprises a number of sensors that are randomly spread in a specific area for sensing and monitoring physical attributes that are difficult to monitor by humans, such as temperature,
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A wireless sensor network (WSN) is a modern technology in radio communication. A WSN comprises a number of sensors that are randomly spread in a specific area for sensing and monitoring physical attributes that are difficult to monitor by humans, such as temperature, humidity, and pressure. Many problems, including data routing, power consumption, clustering, and selecting cluster heads (CHs), may occur due to the nature of WSNs. Various protocols have been conducted to resolve these issues. One of the important hierarchical protocols that are used to reduce power consumption in WSNs is low-energy adaptive clustering hierarchy (LEACH). This paper presents a comprehensive study of clustering protocols for WSNs that are relevant to LEACH. This paper is the first to emphasis on cluster formation and CHs selection methods and their strengths and weaknesses. A new taxonomy is presented to discuss LEACH variants on the basis of different classes, and the current survey is compared with other existing surveys. A complete comparison of the location, energy, complexity, reliability, multi–hop path, and load balancing characteristics of LEACH variants is conducted. Future research guidelines for CHs selection and cluster formation in WSNs are also discussed. Full article
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Open AccessArticle Analysis of the Quantization Noise in Discrete Wavelet Transform Filters for Image Processing
Electronics 2018, 7(8), 135; https://doi.org/10.3390/electronics7080135
Received: 30 June 2018 / Revised: 25 July 2018 / Accepted: 31 July 2018 / Published: 2 August 2018
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Abstract
In this paper, we analyze the noise quantization effects in coefficients of discrete wavelet transform (DWT) filter banks for image processing. We propose the implementation of the DWT method, making it possible to determine the effective bit-width of the filter banks coefficients at
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In this paper, we analyze the noise quantization effects in coefficients of discrete wavelet transform (DWT) filter banks for image processing. We propose the implementation of the DWT method, making it possible to determine the effective bit-width of the filter banks coefficients at which the quantization noise does not significantly affect the image processing results according to the peak signal-to-noise ratio (PSNR). The dependence between the PSNR of the DWT image quality on the wavelet and the bit-width of the wavelet filter coefficients is analyzed. The formulas for determining the minimal bit-width of the filter coefficients at which the processed image achieves high quality (PSNR ≥ 40 dB) are given. The obtained theoretical results were confirmed through the simulation of DWT for a test image using the calculated bit-width values. All considered algorithms operate with fixed-point numbers, which simplifies their hardware implementation on modern devices: field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), etc. Full article
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Open AccessArticle Series Active Filter Design Based on Asymmetric Hybrid Modular Multilevel Converter for Traction System
Electronics 2018, 7(8), 134; https://doi.org/10.3390/electronics7080134
Received: 30 June 2018 / Revised: 25 July 2018 / Accepted: 30 July 2018 / Published: 1 August 2018
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Abstract
This paper presents a comparative analysis of a new topology based on an asymmetric hybrid modular multilevel converter (AHMMC) with recently proposed multilevel converter topologies. The analysis is based on various parameters for medium voltage-high power electric traction system. Among recently proposed topologies,
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This paper presents a comparative analysis of a new topology based on an asymmetric hybrid modular multilevel converter (AHMMC) with recently proposed multilevel converter topologies. The analysis is based on various parameters for medium voltage-high power electric traction system. Among recently proposed topologies, few converters have been analysed through simulation results. In addition, the study investigates AHMMC converter which is a cascade arrangement of H-bridge with five-level cascaded converter module (FCCM) in more detail. The key features of the proposed AHMMC includes: reduced switch losses by minimizing the switching frequency as well as the components count, and improved power factor with minimum harmonic distortion. Extensive simulation results and low voltage laboratory prototype validates the working principle of the proposed converter topology. Furthermore, the paper concludes with the comparison factors evaluation of the discussed converter topologies for medium voltage traction applications. Full article
(This article belongs to the Special Issue Applications of Power Electronics)
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Open AccessArticle Multiple Wavelength Optical Coherence Tomography Assessments for Enhanced Ex Vivo Intra-Cochlear Microstructural Visualization
Electronics 2018, 7(8), 133; https://doi.org/10.3390/electronics7080133
Received: 30 June 2018 / Revised: 23 July 2018 / Accepted: 28 July 2018 / Published: 31 July 2018
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Abstract
The precise identification of intra-cochlear microstructures is an essential otorhinolaryngological requirement to diagnose the progression of cochlea related diseases. Thus, we demonstrated an experimental procedure to investigate the most optimal wavelength range, which can enhance the visualization of ex vivo intra-cochlear microstructures using
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The precise identification of intra-cochlear microstructures is an essential otorhinolaryngological requirement to diagnose the progression of cochlea related diseases. Thus, we demonstrated an experimental procedure to investigate the most optimal wavelength range, which can enhance the visualization of ex vivo intra-cochlear microstructures using multiple wavelengths (i.e., 860 nm, 1060 nm, and 1300 nm) based optical coherence tomography (OCT) systems. The high-resolution tomograms, volumetric, and quantitative evaluations obtained from Basilar membrane, organ of Corti, and scala vestibule regions revealed complementary comparisons between the aforementioned three distinct wavelengths based OCT systems. Compared to 860 nm and 1300 nm wavelengths, 1060 nm wavelength OCT was discovered to be an appropriate wavelength range verifying the simultaneously obtainable high-resolution and reasonable depth range visualization of intra-cochlear microstructures. Therefore, the implementation of 1060 nm OCT can minimize the necessity of two distinct OCT systems. Moreover, the results suggest that the performed qualitative and quantitative analysis procedure can be used as a powerful tool to explore further anatomical structures of the cochlea for future studies in otorhinolaryngology. Full article
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Open AccessArticle The Enhanced Firefly Algorithm Based on Modified Exploitation and Exploration Mechanism
Electronics 2018, 7(8), 132; https://doi.org/10.3390/electronics7080132
Received: 3 July 2018 / Revised: 14 July 2018 / Accepted: 24 July 2018 / Published: 27 July 2018
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Abstract
As a nature-inspired search algorithm, the Firefly algorithm (being a naturally outstanding search algorithm with few control parameters) may have a considerable influential performance. In this paper, we present a new firefly algorithm to address the parameter selection and adaptation strategy in the
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As a nature-inspired search algorithm, the Firefly algorithm (being a naturally outstanding search algorithm with few control parameters) may have a considerable influential performance. In this paper, we present a new firefly algorithm to address the parameter selection and adaptation strategy in the standard firefly algorithm. The proposed firefly algorithm introduces a modified exploration and exploitation mechanism, with adaptive randomness and absorption coefficients. The proposed method employs the adaptation of the randomness and absorption coefficients to be a function of time/iterations. Moreover, gray relational analysis advancing fireflies is used to allocate different information from appealing ones effectively. Standard benchmark functions are applied to verify the effects of these improvements and it is illustrated that, in most situations, the performance of the proposed firefly algorithm is superior to (or at least highly competitive with) the standard firefly algorithm, and state-of-the-art approaches in terms of performance. Full article
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Open AccessArticle Distributed Sensory System of Surface Cracks Monitoring Based on Electrical Impedance Tomography
Electronics 2018, 7(8), 131; https://doi.org/10.3390/electronics7080131
Received: 24 June 2018 / Revised: 18 July 2018 / Accepted: 25 July 2018 / Published: 27 July 2018
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Abstract
In this paper, we propose a method of distributed sensory systems designing for monitoring of surface cracks in highly loaded constructions based on electrical impedance tomography. A thin conductive film with contacts on the perimeter applied on the monitored surface is used as
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In this paper, we propose a method of distributed sensory systems designing for monitoring of surface cracks in highly loaded constructions based on electrical impedance tomography. A thin conductive film with contacts on the perimeter applied on the monitored surface is used as a crack sensor. Registration and monitoring of surface cracks using the developed modified method of electrical impedance tomography (EIT) are carried out. The proposed method differs from the traditional EIT method as it has considerably lower computational complexity with sufficient resolving power. This makes it possible to use the proposed EIT method for continuous rapid monitoring of surface cracks during the operation of a controlled construction in real-time mode. The main stages of the proposed modified EIT method, a block diagram of the crack image reconstruction algorithm and a method for processing the crack images, which provide the possibility for adjusting the sensitivity of the monitoring system, are considered. The main modules of the monitoring system software are described. Analysis of the imitative modeling results of the cracks registering processes as a function of size, shape, and the arrangement of cracks, the number of boundary contacts of the distributed sensor, the step of the grid, and the parameters of a digital filter are considered. Comparative analysis of the developed and standard EIT methods for surface cracks monitoring in constructive elements was performed. Full article
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Open AccessArticle Evaluating the Impact of Optical Interconnects on a Multi-Chip Machine-Learning Architecture
Electronics 2018, 7(8), 130; https://doi.org/10.3390/electronics7080130
Received: 30 June 2018 / Revised: 18 July 2018 / Accepted: 25 July 2018 / Published: 27 July 2018
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Abstract
Following trends that emphasize neural networks for machine learning, many studies regarding computing systems have focused on accelerating deep neural networks. These studies often propose utilizing the accelerator specialized in a neural network and the cluster architecture composed of interconnected accelerator chips. We
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Following trends that emphasize neural networks for machine learning, many studies regarding computing systems have focused on accelerating deep neural networks. These studies often propose utilizing the accelerator specialized in a neural network and the cluster architecture composed of interconnected accelerator chips. We observed that inter-accelerator communication within a cluster has a significant impact on the training time of the neural network. In this paper, we show the advantages of optical interconnects for multi-chip machine-learning architecture by demonstrating performance improvements through replacing electrical interconnects with optical ones in an existing multi-chip system. We propose to use highly practical optical interconnect implementation and devise an arithmetic performance model to fairly assess the impact of optical interconnects on a machine-learning accelerator platform. In our evaluation of nine Convolutional Neural Networks with various input sizes, 100 and 400 Gbps optical interconnects reduce the training time by an average of 20.6% and 35.6%, respectively, compared to the baseline system with 25.6 Gbps electrical ones. Full article
(This article belongs to the Special Issue Distributed Computing and Storage)
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Open AccessArticle A Receiving Antenna Allocation Scheme for Downlink MU-MIMO-OFDM Transmission
Electronics 2018, 7(8), 129; https://doi.org/10.3390/electronics7080129
Received: 27 June 2018 / Revised: 17 July 2018 / Accepted: 23 July 2018 / Published: 26 July 2018
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Abstract
This paper proposes a novel receiving antenna allocation scheme for downlink multiuser multiple input multiple output orthogonal frequency division multiplexing (MU-MIMO-OFDM) transmission; an access point (AP) simultaneously transmits data frames to a combination of allocated receiving antennas on a subcarrier basis at each
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This paper proposes a novel receiving antenna allocation scheme for downlink multiuser multiple input multiple output orthogonal frequency division multiplexing (MU-MIMO-OFDM) transmission; an access point (AP) simultaneously transmits data frames to a combination of allocated receiving antennas on a subcarrier basis at each station (STA). The proposed scheme combines a limited channel state information (CSI) feedback sequence with a receiving antenna decision method. In the proposed scheme, each STA estimates the channel responses of all receiving antennas by using the training preamble transmitted from an AP, and then feeds the channel response of the antenna with maximum norm back to the AP when the spatial correlation value between receiving antennas is higher than a threshold. Otherwise, each STA feeds full channel responses back to the AP. This scheme decreases the amount of CSI fed back while exploiting the spatial diversity gain, and the AP’s computational complexity is also decreased regarding the antenna allocation. Moreover, the receiving antenna decision method eliminates the overhead to notify the allocated antenna information from the AP to each STA by simply comparing its own receiving antenna powers. We clarify the effectiveness of the proposed scheme in our computer simulations using channel responses measured in an indoor environment. The results show that the proposed scheme maintains the channel capacity of the downlink MU-MIMO-OFDM transmission while greatly reducing the overhead and computational complexity. Full article
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Open AccessArticle Super-Twisting Extended State Observer and Sliding Mode Controller for Quadrotor UAV Attitude System in Presence of Wind Gust and Actuator Faults
Electronics 2018, 7(8), 128; https://doi.org/10.3390/electronics7080128
Received: 19 June 2018 / Revised: 9 July 2018 / Accepted: 24 July 2018 / Published: 26 July 2018
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Abstract
This article addresses the problem of high precision attitude control for quadrotor unmanned aerial vehicle in presence of wind gust and actuator faults. We consider the effect of those factors as lumped disturbances, and in order to realize the quickly and accurately estimation
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This article addresses the problem of high precision attitude control for quadrotor unmanned aerial vehicle in presence of wind gust and actuator faults. We consider the effect of those factors as lumped disturbances, and in order to realize the quickly and accurately estimation of the disturbances, we propose a control strategy based on the online disturbance uncertainty estimation and attenuation method. Firstly, an enhanced extended state observer (ESO) is constructed based on the super-twisting (ST) algorithm to estimate and attenuate the impact of wind gust and actuator faults in finite time. And the convergence analysis and parameter selection rule of STESO are given following. Secondly, in order to guarantee the asymptotic convergence of desired attitude timely, a sliding mode control law is derived based on the super-twisting algorithm. And a comprehensive stability analysis for the entire system is presented based on the Lyapunov stability theory. Finally, to demonstrate the efficiency of the proposed solution, numerical simulations and real time experiments are carried out in presences of wind disturbance and actuator faults. Full article
(This article belongs to the Special Issue Autonomous Control of Unmanned Aerial Vehicles)
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Open AccessArticle A Bandwidth-Enhanced Differential LC-Voltage Controlled Oscillator (LC-VCO) and Superharmonic Coupled Quadrature VCO for K-Band Applications
Electronics 2018, 7(8), 127; https://doi.org/10.3390/electronics7080127
Received: 29 June 2018 / Revised: 17 July 2018 / Accepted: 20 July 2018 / Published: 25 July 2018
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Abstract
A novel varactor circuit exhibiting a wider tuning range and a new technique for quadrature coupling of LC-Voltage Controlled Oscillator (LC-VCO) is presented and validated on a 25 GHz oscillator. The proposed varactor circuit employs distribute-biased parallel varactors with a series inductor connected
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A novel varactor circuit exhibiting a wider tuning range and a new technique for quadrature coupling of LC-Voltage Controlled Oscillator (LC-VCO) is presented and validated on a 25 GHz oscillator. The proposed varactor circuit employs distribute-biased parallel varactors with a series inductor connected at both ends of the varactor bank to extend the tuning range of the oscillator. Similarly, the quadrature coupling is accomplished by employing the 2nd harmonic, explicitly generated in the stand-alone free-running differential oscillator using frequency doubler. As an example, the Differential VCO (DVCO) is tunable between 20 GHz and 31 GHz and exhibits the best Phase Noise (PN) of −100 dBc/Hz at 1 MHz offset frequency. Similarly, the Quadrature VCO (QVCO) covers 42% tuning bandwidth around 25 GHz oscillation frequency, which is significantly wider than other state-of-the-art VCOs at comparable frequencies. In addition, all the oscillators are designed in class-C to further improve their performances both in term of low power and low phase noise. The presented oscillators are designed using high-performance SiGe HBTs of the GlobalFoundries (GFs) 130 nm SiGe BiCMOS 8HP process. The presented DVCO and QVCO draw currents of approximately 10 mA and 21 mA, respectively from a 1.2 V supply. Full article
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Open AccessArticle Analysis and Suppression of Unwanted Turn-On and Parasitic Oscillation in SiC JFET-Based Bi-Directional Switches
Electronics 2018, 7(8), 126; https://doi.org/10.3390/electronics7080126
Received: 5 July 2018 / Revised: 19 July 2018 / Accepted: 19 July 2018 / Published: 24 July 2018
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Abstract
Silicon Carbide (SiC)-based Bi-Directional Switches (BDS) have great potential in the construction of several power electronic circuits including multi-level converters, solid-state breakers, matrix converters, HERIC (high efficient and reliable inverter concept) photovoltaic grid-connected inverters and so on. In this paper, two issues with
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Silicon Carbide (SiC)-based Bi-Directional Switches (BDS) have great potential in the construction of several power electronic circuits including multi-level converters, solid-state breakers, matrix converters, HERIC (high efficient and reliable inverter concept) photovoltaic grid-connected inverters and so on. In this paper, two issues with the application of SiC-based BDSs, namely, unwanted turn-on and parasitic oscillation, are deeply investigated. To eliminate unwanted turn-on, it is proposed to add a capacitor (CX) paralleled at the signal input port of the driver IC (integrated circuit) and the capacitance range of CX is also analytically derived to guide the selection of CX. To mitigate parasitic oscillation, a combinational method, which combines a snubber capacitor (CJ) paralleled with the JFET (Junction Field Effect Transistor) and a ferrite ring connected in series with the power line, is proposed. It is verified that the use of CJ mainly improves the turn-off transient and the use of a ferrite ring damps the current oscillation during the turn-on transient significantly. The effects of the proposed methods have been demonstrated by theoretical analysis and verified by experimental results. Full article
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