Search Results (173)

Monocrystalline silicon, despite its widespread use as a photoelectrode material, is hindered by inherent drawbacks, such as high surface reflectivity, vulnerability to oxide passivation, and instability in aqueous electrolytes. To address these, a micropyramidal texture is fabricated on the silicon surface via wet chemical etching. A heterojunction photoanode was constructed by sequentially depositing NiSe₂ and WO₃ onto the textured silicon using chemical bath deposition, forming NiSe₂/WO₃@SiMPs. The photoanode demonstrates optimal photoelectrochemical performance at a NiSe₂ to WO₃ mass ratio of 9:1. Under simulated solar illumination (AM 1.5 G, 100 mW cm⁻²), it achieves a photocurrent of 5.62 mA cm⁻² at 1.23 V (vs. RHE), and a maximum photocurrent of 13.6 mA cm⁻² at 2.0 V (vs. RHE), markedly outperforming the individual components NiSe₂@SiMPs (8.23 mA cm⁻²) and WO₃@SiMPs (0.95 mA cm⁻²) at 2.0 V (vs. RHE). Electrochemical impedance spectroscopy (EIS) results show a markedly lower charge transfer resistance (Rct) for the NiSe₂/WO₃@SiMPs (8.16 Ω) compared to the single-phase counterparts NiSe₂@SiMPs (121.48 Ω) and WO₃@SiMPs (902.23 Ω), indicating more efficient charge separation. In addition, the photocurrent remains steady for about 10 h without significant degradation. This work presents a promising strategy for improving the photoelectrochemical water splitting efficiency of silicon-based photoelectrodes through rational heterostructure engineering. Full article

This study provides a comprehensive investigation into the growth behavior of boron nitride (BN) buffer layers on Silicon carbide (SiC) substrates and their influence on interfacial band alignment. BN layers were deposited on semi-insulating SiC by RF magnetron sputtering with deposition times of 2.5, 5, and 7.5 min (these deposition times are specific experimental parameters to adjust the thickness of the amorphous BN layer, not intrinsic material properties of BN). Atomic force microscopy revealed that the surface roughness of the BN layers initially decreased and then increased with thickness, indicating an evolution from nucleation to continuous film formation, followed by surface coarsening. Transmission electron microscopy confirmed the BN thicknesses of approximately 3.25, 4.91, and 7.57 nm, showing that the layers gradually became uniform and compact, thereby improving the structural integrity of the BN/SiC interface. Band alignment was analyzed using the Kraut method, yielding a valence band offset of ~0.36 eV and a conduction band offset of ~2.34 eV for the BN/SiC heterojunction. This alignment indicates that the BN buffer layer introduces a pronounced electron barrier, effectively suppressing leakage, while the relatively small VBO facilitates hole transport across the interface. These findings demonstrate that the BN buffer layer enhances interfacial bonding, reduces defect states, and enables band structure engineering, offering a promising strategy for improving the performance of wide-bandgap semiconductor devices. Full article

In this study, high-conductivity W-doped Ga₂O₃ thin films were successfully fabricated by directly depositing a composition of Ga₂O₃ with 10.7 at% WO₃ (W:Ga = 12:100) using electron beam evaporation. The resulting thin films were found to be amorphous. Due to the ohmic contact behavior observed between the W-doped Ga₂O₃ film and platinum (Pt), Pt was used as the contact electrode. Current-voltage (J-V) measurements of the W-doped Ga₂O₃ thin films demonstrated that the samples exhibited significant current density even without any post-deposition annealing treatment. To further validate the excellent charge transport characteristics, Hall effect measurements were conducted. Compared to undoped Ga₂O₃ thin films, which showed non-conductive characteristics, the W-doped thin films showed an increased carrier concentration and enhanced electron mobility, along with a substantial decrease in resistivity. The measured Hall coefficient of the W-doped Ga₂O₃ thin films was negative, indicating that these thin films were n-type semiconductors. Energy-Dispersive X-ray Spectroscopy was employed to verify the elemental ratios of Ga, O, and W in the W-doped Ga₂O₃ thin films, while X-ray photoelectron spectroscopy analysis further confirmed these ratios and demonstrated their variation with the depth of the deposited thin films. Furthermore, the W-doped Ga₂O₃ thin films were deposited onto both p-type and heavily doped p⁺-type silicon (Si) substrates to fabricate heterojunction diodes. All resulting devices exhibited good rectifying behavior, highlighting the promising potential of W-doped Ga₂O₃ thin films for use in rectifying electronic components. Full article

Trap states in 2D transition metal dichalcogenides significantly affect the responsivity and response time of photodetectors, and previous ReS₂/Si-based heterojunction photodetectors have struggled to simultaneously achieve high responsivity and fast response. To address this issue, we developed a n-type ReS₂/p-type Si heterojunction photodetector through interface engineering. Specifically, the silicon substrate with a silicon dioxide dielectric layer was treated with inductively coupled soft plasma to adjust the thickness and surface states of the dielectric layer. This treatment created a multilayered heterostructure, which increased carrier concentration, effectively passivated sulfur-vacancy-induced defects, and thereby improved responsivity. Experimental results showed that the silicon-based n-type ReS₂ photodetector achieved a responsivity of 0.88 A W⁻¹ with a rapid response rise time of 2.5 s, a significant improvement from the intrinsic values of 12 mA W⁻¹ responsivity and 6 s rise time. Additionally, due to the defect-tunable nature of this pretreatment technique, the device exhibited enhanced Raman peaks and intensified photoluminescence (PL) absorption features, confirming the effectiveness of the interface engineering in optimizing device performance. Full article

In this work, we investigate the electrical properties of a metal–insulator–semiconductor (MIS) heterojunction based on porous silicon dioxide (Ag/pSiO₂/Si). The porous silicon (PS) films were elaborated by electrochemical anodization under specific experimental conditions to obtain a porosity of about 55%. Porous silicon (PS) was oxidized by IR-RTP at different oxidation temperatures (Tox) ranging from 200 to 950 °C under an oxygen atmosphere. The morphology of the samples was analyzed using a scanning electron microscope (SEM). Ag/Al and Ag contacts were screen printed on the back and front sides of the heterojunction, respectively. Both the series and shunt resistances were derived from dark current–voltage (I–V) characteristics related to the various Ag/pSiO₂/Si heterojunctions. In this context, the reflectance was also measured at different oxidation temperatures to investigate its correlation with the series resistance (Rs) and shunt resistance (Rsh). The optimum electrical performance was obtained for an oxidation temperature close to 400 °C. Depending on the pSiO₂ thickness, two conduction mechanisms were highlighted within the devices. For a Tox below 200 °C, as well as for the non-oxidized devices, the conduction mechanism is governed by the tunneling current through the pSiO₂ film. However, when the Tox increases and exceeds 200 °C, the pSiO₂ thickness increases, leading to the switching of the conduction mechanism to a thermionic instead of a tunneling effect mechanism. Full article

Ultraviolet (UV) and blue-light photodetectors are vital in environmental monitoring, medical and biomedical applications, optical communications, and security and anti-counterfeiting technologies. However, conventional silicon-based devices suffer from limited sensitivity to short-wavelength light due to their narrow indirect bandgap. In this study, we investigate the influence of precursor concentration on the structural, optical, and photoresponse characteristics of nanostructured CdS thin films synthesized via chemical bath deposition. Among the CdS samples prepared at different precursor concentrations, the best photoresponsivity of 21.1 mA/W was obtained at 2 M concentration. Subsequently, a p–n heterojunction photodetector was fabricated by integrating a spin-coated CuSCN layer with the optimized CdS nanostructure. The resulting device exhibited pronounced rectifying behavior with a rectification ratio of ~750 and an ideality factor of 1.39. Under illumination and a 5 V bias, the photodetector achieved an exceptional responsivity exceeding 10⁴ A/W in the UV region—over six orders of magnitude higher than that of CdS-based metal–semiconductor–metal devices. This remarkable enhancement is attributed to the improved light absorption, efficient charge separation, and enhanced hole transport enabled by CuSCN incorporation and heterojunction formation. These findings present a cost-effective, solution-processed approach to fabricating high-responsivity nanostructured photodetectors, promising for future applications in smart healthcare, environmental surveillance, and consumer electronics. Full article

In this paper, a novel 4H-SiC LDMOS structure with a trench heterojunction in the source (referred as to THD-LDMOS) is proposed and investigated for the first time, to enhance the reverse recovery performance of its parasitic diode. Compared with 4H-SiC, silicon has a smaller band energy, which results in a lower built-in potential for the junction formed by P+ polysilicon and a 4N-SiC N-drift region. A trench P+ polysilicon is introduced in the source side, forming a heterojunction with the N-drift region, and this heterojunction is unipolar and connected in parallel with the body PiN diode. When the LDMOS operates as a freewheeling diode, the trench heterojunction conducts first, preventing the parasitic PiN from turning on and thereby significantly reducing the number of carriers in the N-drift region. Consequently, THD-LDMOS exhibits superior reverse recovery characteristics. The simulation results indicate that the reverse recovery peak current and reverse recovery charge of THD-LDMOS are reduced by 55.5% and 77.6%, respectively, while the other basic electrical characteristics remains unaffected. Full article

Graphene’s exceptional carrier mobility and broadband absorption make it promising for ultrafast photodetection. However, its low optical absorption limits responsivity, while the absence of a bandgap results in high dark current, constraining the signal-to-noise ratio and efficiency. Although silicon (Si) photodetectors normally offer fabrication compatibility, their performance is severely hindered by interface trap states and optical shading. To overcome these limitations, we demonstrate an epitaxial graphene/n-Si heterojunction photodiode. This device utilizes graphene epitaxially grown on germanium integrated with a transferred Si thin film, eliminating polymer residues and interface defects common in transferred graphene. As a result, the fabricated photodetector achieves an ultralow dark current of 1.2 × 10⁻⁹ A, a high responsivity of 1430 A/W, and self-powered operation at room temperature. This work provides a strategy for high-sensitivity and low-power photodetection and demonstrates the practical integration potential of graphene/Si heterostructures for advanced optoelectronics. Full article

Epitaxial growth of β-Ga₂O₃ nanowires on silicon substrates was realized by the low-pressure chemical vapor deposition (LPCVD) method. The as-grown Si/Ga₂O₃ heterojunctions were employed in the Underwater DUV detection. It is found that the carrier type as well as the carrier concentration of the silicon substrate significantly affect the performance of the Si/Ga₂O₃ heterojunction. The p-Si/β-Ga₂O₃ (2.68 × 10¹⁵ cm⁻³) devices exhibit a responsivity of up to 205.1 mA/W, which is twice the performance of the devices on the n-type substrate (responsivity of 93.69 mA/W). Moreover, the devices’ performance is enhanced with the increase in the carrier concentration of the p-type silicon substrates; the corresponding device on the high carrier concentration substrate (6.48 × 10¹⁷ cm⁻³) achieves a superior responsivity of 845.3 mA/W. The performance enhancement is mainly attributed to the built-in electric field at the p-Si/n-Ga₂O₃ heterojunction and the reduction in the Schottky barrier under high carrier concentration. These findings would provide a strategy for optimizing carrier transport and interface engineering in solar-blind UV photodetectors, advancing the practical use of high-performance solar-blind photodetectors for underwater application. Full article

Wearable sensors have rapidly advanced, enabling applications such as human activity monitoring, electronic skin, and biomimetic robotics. To meet the growing demands of these applications, multifunctional sensing has become essential for wearable devices. However, most existing studies predominantly focus on enhancing single-function sensing capabilities. This study introduces a multifunctional sensor that combines high stretchability for strain and pressure detection with ultraviolet (UV) sensing capability. To achieve simultaneous detection of strain, pressure, and UV light, a multi-sensing approach was employed: a capacitive method for strain and pressure detections and a resistive method utilizing a pn-heterojunction diode for UV detection. In the capacitive method, polyaniline (PANI) served as parallel-plate electrodes, while silicon-based elastomer acted as the dielectric layer. This configuration enabled up to 100% elongation and enhanced operational stability through encapsulation. The sensor demonstrated a strong linear relationship between capacitance value changes reasonably based on the area of PANI, and showed a good linearity with an R-squared value of 0.9918. It also detected pressure across a wide range, from low (0.4 kPa) to high (9.4 kPa). Furthermore, for wearable applications, the sensor reliably captured capacitance variations during finger bending at different angles. For UV detection, a pn-heterojunction diode composed of p-type silicon and n-type zinc oxide nanorods exhibited a rapid response time of 6.1 s and an on/off ratio of 13.8 at −10 V. Durability under 100% tensile strain was confirmed through Von Mises stress calculations using finite element modeling. Overall, this multifunctional sensor offers significant potential for a variety of applications, including human motion detection, wearable technology, and robotics. Full article

This paper presents the first demonstration and comparison of two identical oscillator circuits employing piezoelectric zinc oxide (ZnO) microelectromechanical systems (MEMS) resonators, implemented on conventional printed-circuit-board (PCB) and three-dimensional (3D)-printed acrylonitrile butadiene styrene (ABS) substrates. Both oscillators operate simultaneously at dual frequencies (260 MHz and 437 MHz) without the need for additional circuitry. The MEMS resonators, fabricated on silicon-on-insulator (SOI) wafers, exhibit high-quality factors (Q), ensuring superior phase noise performance. Experimental results indicate that the oscillator packaged using 3D-printed chip-carrier assembly achieves a 2–3 dB improvement in phase noise compared to the PCB-based oscillator, attributed to the ABS substrate’s lower dielectric loss and reduced parasitic effects at radio frequency (RF). Specifically, phase noise values between −84 and −77 dBc/Hz at 1 kHz offset and a noise floor of −163 dBc/Hz at far-from-carrier offset were achieved. Additionally, the 3D-printed ABS-based oscillator delivers notably higher output power (4.575 dBm at 260 MHz and 0.147 dBm at 437 MHz). To facilitate modular characterization, advanced packaging techniques leveraging precise 3D-printed encapsulation with sub-100 μm lateral interconnects were employed. These ensured robust packaging integrity without compromising oscillator performance. Furthermore, a comparison between two transistor technologies—a silicon germanium (SiGe) heterojunction bipolar transistor (HBT) and an enhancement-mode pseudomorphic high-electron-mobility transistor (E-pHEMT)—demonstrated that SiGe HBT transistors provide superior phase noise characteristics at close-to-carrier offset frequencies, with a significant 11 dB improvement observed at 1 kHz offset. These results highlight the promising potential of 3D-printed chip-carrier packaging techniques in high-performance MEMS oscillator applications. Full article

In the purpose of enhancing solar cell efficiency and sustainability, zinc selenide (ZnSe) and silicon (Si) play indispensable roles, offering a compelling combination of stability and transparency while also highlighting their abundant availability. This study utilizes the SCAPS_1D tool to explore diverse heterojunction setups, aiming to solve the nuanced correlation between key parameters and photovoltaic performance, therefore contributing significantly to the advancement of sustainable energy solutions. Exploring the performance analysis of heterojunction solar cell configurations employing ZnSe and Si elements, various configurations including SnO₂/ZnSe/p_Si/p⁺_Si, SnO₂/CdS/p_Si/p⁺_Si, TiO₂/ZnSe/p_Si/p⁺_Si, and TiO₂/CdS/p_Si/p⁺_Si are investigated, delving into parameters such as back surface field thickness (BSF), doping concentration, operating temperature, absorber layer properties, electron transport layer properties, interface defects, series and shunt resistance. Among these configurations, the SnO₂/ZnSe/p_Si/p⁺_Si configuration with a doping concentration of 10¹⁹ cm⁻³ and a BSF thickness of 2 μm, illustrates a remarkable conversion efficiency of 22.82%, a short circuit current density (J_sc) of 40.33 mA/cm², an open circuit voltage (V_oc) of 0.73 V, and a fill factor (FF) of 77.05%. Its environmentally friendly attributes position it as a promising contender for advanced photovoltaic applications. This work emphasizes the critical role of parameter optimization in propelling solar cell technologies toward heightened efficiency and sustainability. Full article

Renewable energy sources are critical to the global effort to achieve carbon neutrality. Alongside hydropower, wind and nuclear plants, the photovoltaic (PV) systems developed greatly, with new PV technologies emerging in recent years. Although the conversion efficiencies are improving and the materials used have a lower impact on the environment, the feasibility of these technologies is required to be assessed. This paper proposes a levelized cost of energy (LCOE) model to assess the feasibility of five PV technologies: high-efficiency silicon heterojunction cells (HJT), N-type monocrystalline silicon cells (N-type), P-type passivated emitter and rear contact cells (PERC), N-type tunnel oxide passivated contact cells (TOPCon) and bifacial TOPCon. The LCOE considers capital investment, government incentives, operation and maintenance costs, residual value of PV modules and total energy output during the PV system’s life span. To determine the influence of PV system’s capacity over the LCOE values, three systems are analyzed for each technology: 3 kW, 5 kW and 7 kW. The results show that the largest PV systems have the lowest LCOE values, ranging from 2.39 c€/kWh (TOPCon) to 2.92 c€/kWh (HJT) when incentives are accessed, and ranging from 6.05 c€/kWh (TOPCon) to 6.51 c€/kWh (HJT) without subsidies. The 3 kW and 5 kW PV systems have higher LCOE values due to lower energy output during lifetime. Full article

This paper proposes a structural silicon heterojunction photosensitive element with a simple form, low manufacturing cost, and efficient performance, which has a high-intensity photoelectric effect and a high frequency range of use. It can be applied as microwave switches to active frequency selective surfaces (AFSSs) to replace PIN diodes. Meanwhile, we explore the crucial role of pentacene/silicon heterojunction in the photoelectric conversion process. It is found that due to the inherent photovoltaic effect and the built-in electric field interaction between the two materials, the insertion loss of the heterojunction formed is reduced to 4.5 dB, which is 2.5 dB lower than that of the high-resistivity silicon wafer. In order to further reduce the insertion loss, the surface of the silicon wafer is etched and then heterojunction is prepared, which can further reduce insertion loss to within 2.5 dB, and the bandwidth difference between the presence and absence of pump excitation exceeds 10 dB extends to 12 GHz, indicating that the light collecting ability of structural silicon significantly enhances its photoelectric effect. The research results demonstrate the potential of using structural silicon heterojunctions in photoelectric devices, providing new technology for high-performance microwave switches and implementing optically controlled FSSs. Full article

In this work, the effects of heavy ion strike position, incident angle, linear energy transfer (LET) value, ambient temperature, bias conditions, and the synergistic effects of total dose irradiation on the single-event transient (SET) in silicon-germanium heterojunction bipolar transistors on silicon-on-insulator (SiGe-on-SOI HBTs) were investigated using TCAD simulations. It was demonstrated that, compared to the bulk SiGe HBT, the SiGe-on-SOI HBT exhibits lower transient current and less charge collection, indicating better resistance to SET. The SET response is more pronounced when heavy ions strike vertically from the emitter and base regions. Transient current and collected charge escalate with increasing incident angle, demonstrating a strong linear correlation with LET values. As the temperature decreases, the peak transient current increases, while the pulse duration decreases and the total collected charge diminishes. After total dose irradiation, the peak transient current in the SiGe-on-SOI HBT decreases, whereas the damage was more severe in the absence of irradiation. Under collector positive bias and positive bias, significant SET responses were observed, while cutoff bias and substrate bias exhibited better resistance to SET damage. These findings provide critical insights into radiation-hardened design strategies for the SiGe-on-SOI HBT. Full article