Sign in to use this feature.

Years

Between: -

Subjects

remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline

Journals

Article Types

Countries / Regions

remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline

Search Results (299)

Search Parameters:
Keywords = metal-oxide-semiconductor field effect transistor (MOSFET)

Order results
Result details
Results per page
Select all
Export citation of selected articles as:
21 pages, 1649 KB  
Article
A Physics-Based Compact Model for P-Type Ballistic Nanowire GAA MOSFETs Incorporating the Source-to-Drain Tunneling Effect
by He Cheng, Zhijia Yang, Chao Zhang and Zhipeng Zhang
Nanomaterials 2026, 16(17), 1053; https://doi.org/10.3390/nano16171053 - 24 Aug 2026
Abstract
This paper presents an analytical compact DC current model and a numerical gate capacitance model for p-type cylindrical gate-all-around (GAA) nanowire metal–oxide–semiconductor field-effect transistors (MOSFETs). The models are formulated within the Landauer transport framework, incorporating source-to-drain tunneling (SDT) and quantum statistical charge analysis. [...] Read more.
This paper presents an analytical compact DC current model and a numerical gate capacitance model for p-type cylindrical gate-all-around (GAA) nanowire metal–oxide–semiconductor field-effect transistors (MOSFETs). The models are formulated within the Landauer transport framework, incorporating source-to-drain tunneling (SDT) and quantum statistical charge analysis. The proposed current model is validated against non-equilibrium Green’s function (NEGF) simulations for different channel lengths, nanowire radii, and bias conditions, showing good agreement with the NEGF results in the ballistic limit. The model parameters are separated into physical parameters obtained or calibrated from the NEGF simulations and a single set of global empirical fitting parameters. The latter is extracted once and remains unchanged across the investigated device geometries and bias conditions, allowing its transferability to be evaluated. The compact model is implemented in Verilog-A, and its SPICE compatibility is verified through DC simulations of PMOS inverter circuits. All NEGF comparisons in this work are performed with a zero channel backscattering coefficient corresponding to the ballistic transport limit; validation of the quasi-ballistic regime is left for future work. Full article
(This article belongs to the Section Nanoelectronics, Nanosensors and Devices)
Show Figures

Figure 1

39 pages, 11142 KB  
Review
A Comprehensive Review of MOSFET Switching Loss Modelling Techniques for Power Electronic Converters
by Ahmed Darwish and Wesam Rohouma
Electronics 2026, 15(16), 3706; https://doi.org/10.3390/electronics15163706 - 19 Aug 2026
Viewed by 252
Abstract
This paper reviews and discusses the behavioural modelling techniques used to simulate the dynamic behaviour of switching metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs) employed in power electronic converters. It is necessary to develop efficient, accurate and computationally fast models [...] Read more.
This paper reviews and discusses the behavioural modelling techniques used to simulate the dynamic behaviour of switching metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs) employed in power electronic converters. It is necessary to develop efficient, accurate and computationally fast models for simulating the efficiency and power losses of power converters used in modern applications such as electric vehicles (EVs), solar photovoltaic (PV) systems, wind turbines (WTs) and other energy systems. In this context, the paper focuses on the approaches used to estimate the switching losses of these devices. The paper discusses the main differences, advantages, and drawbacks of the behavioural modelling methods presented in the literature including average models, charge-based models, and other physical models. The paper focuses on the Miller Plateau phenomenon in these devices, as it plays a major role in calculating the switching losses of power electronic converters. The paper provides a comprehensive review of the different modelling methods in terms of accuracy, computational effort, execution speed, and feasibility for hardware-in-the-Loop (HiL) systems. The paper also discusses the modern data-driven methods and their potential integration into future power electronic systems. At the end, the review identifies some research gaps and highlights promising directions for future behavioural modelling research. Full article
(This article belongs to the Special Issue Smart Power System Optimization, Operation, and Control)
Show Figures

Figure 1

11 pages, 4506 KB  
Article
High-Output-Current Boron-Doped Single-Crystal Diamond MOSFETs with a Thin Boron-Doped Epitaxial Layer
by Jiali Wang, Ruozheng Wang, Liangshun Qu, Genqiang Chen, Feng Wen and Hongxing Wang
Nanomaterials 2026, 16(15), 915; https://doi.org/10.3390/nano16150915 - 25 Jul 2026
Viewed by 359
Abstract
High-output-current boron-doped diamond (B-diamond) metal–oxide–semiconductor field-effect transistors (MOSFETs) with a modulated boron-doped epitaxial layer were fabricated. An intrinsic diamond epitaxial layer was deposited on the single-crystal diamond substrate as a buffer layer, and plasma-enhanced chemical vapor deposition (PECVD) SiO2 was employed as [...] Read more.
High-output-current boron-doped diamond (B-diamond) metal–oxide–semiconductor field-effect transistors (MOSFETs) with a modulated boron-doped epitaxial layer were fabricated. An intrinsic diamond epitaxial layer was deposited on the single-crystal diamond substrate as a buffer layer, and plasma-enhanced chemical vapor deposition (PECVD) SiO2 was employed as both the gate dielectric and passivation layer. The boron-doped epitaxial layer has a thickness of approximately 500 nm and a boron concentration in the range of 1017–1018 cm−3. The B-diamond MOSFETs showed clear p-channel operation, with a maximum output current of −0.18 mA/mm at room temperature. When the temperature was increased to 150 °C, the maximum output current increased to −1.05 mA/mm, while the on-resistance decreased from 413.91 to 12.13 kΩ·mm. The on/off ratio remains approximately 105 over the measured temperature range. In addition, the device exhibited a breakdown voltage of −347 V at a gate-to-drain spacing of 12.5 μm, and the simulation results showed that the peak electric field was mainly concentrated near the drain-side gate edge of the passivation layer. These results indicated that, for the B-diamond MOSFETs, a balanced epitaxial layer thickness and boron concentration were essential for achieving sufficient channel conduction as well as effective gate control ability. Full article
(This article belongs to the Special Issue Wide Bandgap Semiconductor Material, Device and System Integration)
Show Figures

Figure 1

17 pages, 12564 KB  
Article
Single and Repetitive Surge Reliability of 1200 V Asymmetric Trench SiC MOSFETs Under Various Gate Biases
by Menglin Yan, Zhizhe Wang, Dazheng Chen, Yuncong Li, Yongle Zhong, Yuansheng Li, Jun Luo and Hao Xia
Micromachines 2026, 17(7), 823; https://doi.org/10.3390/mi17070823 - 10 Jul 2026
Viewed by 468
Abstract
The parameter degradation and failure mechanisms of 1200 V asymmetric trench-type (AT) silicon carbide (SiC) metal oxide semiconductor field-effect transistors (MOSFETs) under various single and repetitive surge currents, with various gate bias voltages (VGS) of 0 V, −5 V, and −10 [...] Read more.
The parameter degradation and failure mechanisms of 1200 V asymmetric trench-type (AT) silicon carbide (SiC) metal oxide semiconductor field-effect transistors (MOSFETs) under various single and repetitive surge currents, with various gate bias voltages (VGS) of 0 V, −5 V, and −10 V, are systematically investigated in this work. It is indicated that VGS has no impact on the single surge reliability, with the same maximum single surge current (SSCmax) under different VGS. However, during repetitive surge stress (90% and 60% SSCmax), the maximum surge cycles have increased as VGS increases from −10 V to 0 V. It may be caused by the enhancement of channel-assisted leakage conduction, allowing more surge current to flow through the channel. It is concluded from gate capacitance (Cg-Vg) and low-frequency noise (LFN) characterizations that lower VGS increases SiC/SiO2 interface defect density, accelerating parameter degradation during single and repetitive surge stress. Both chip and package failures are observed for single and repetitive surge stress. For single surge stress, the device failure has resulted from the melted source Al as the metal erodes and penetrates through the interlayer dielectric and the ohmic contact layer between the source metal and the SiC-doped region, respectively, leading to a three-terminal short circuit. For repetitive surge stress, the device failure has been caused by the penetration of Al metal into the interlayer dielectric, leading to a gate-source short circuit. This comprehensive research provides valuable guidance for enhancing the surge reliability of SiC MOSFETs. Full article
(This article belongs to the Special Issue Emerging Technologies and Applications for Semiconductor Industry)
Show Figures

Figure 1

12 pages, 3399 KB  
Article
Investigation on Degradation of Switching Characteristics in SiC MOSFETs Under Repetitive Surge Current
by Zhichao Cheng, Ling Sang, Feng He, Yawei He, Zheyang Li, Rui Jin and Peng Cui
Electronics 2026, 15(12), 2721; https://doi.org/10.3390/electronics15122721 - 19 Jun 2026
Cited by 1 | Viewed by 442
Abstract
Surge reliability is a crucial aspect of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) reliability. This study investigates the degradation behavior and mechanisms of switching characteristics in 1.2 kV planar-gate SiC MOSFETs under repetitive surge current. A surge current test platform is established [...] Read more.
Surge reliability is a crucial aspect of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) reliability. This study investigates the degradation behavior and mechanisms of switching characteristics in 1.2 kV planar-gate SiC MOSFETs under repetitive surge current. A surge current test platform is established to conduct surge tests on the device, while monitoring the evolution of its switching characteristics. The results indicate that after 4000 surge current cycles, the device’s turn-on delay time (td(on)), rise time (tr), and turn-on loss (EON) show no significant changes. In contrast, the turn-off delay time (td(off)), fall time (tf), and turn-off loss (EOFF) increase by 9%, 7.5%, and 8.3%, respectively. Switching characteristics variations are closely linked to the reduction in threshold voltage (VTH) and the increase in gate-source capacitance (CGS) and gate-drain capacitance (CGD). The degradation of these parameters stems from the accumulation of positive trapped charge in the gate oxide layer above the channel and junction field-effect transistor (JFET) region. The increase in charges results from the combined effects of negative gate bias and cyclic high temperature induced by repetitive surge current. This study provides a theoretical basis for the comprehensive understanding of the impact of surge current on SiC MOSFET performance. Full article
(This article belongs to the Section Power Electronics)
Show Figures

Figure 1

33 pages, 6866 KB  
Article
Optimization of Gate Current Profiles for SiC Power MOSFETs with Respect to Switching Loss, Overshoot, and Slew Rate
by Rolands Shavelis, Kaspars Ozols, Michael Ebli and Christian Ohms
Electronics 2026, 15(11), 2387; https://doi.org/10.3390/electronics15112387 - 1 Jun 2026
Viewed by 376
Abstract
This paper addresses the challenge of optimally controlling silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) to minimize switching losses while simultaneously reducing overshoots and voltage slew rates. A digitally controlled gate current source is used to drive the transistors, and its output waveform [...] Read more.
This paper addresses the challenge of optimally controlling silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) to minimize switching losses while simultaneously reducing overshoots and voltage slew rates. A digitally controlled gate current source is used to drive the transistors, and its output waveform is defined by a set of parameters that must be optimized. To this end, a sequential lowest segment extraction (SLSE) method is proposed to identify parameter sets that generate trade-off curves that closely approximate the Pareto frontiers. These curves represent the lowest simultaneously achievable values of either switching loss and current/voltage overshoot, or switching loss and maximum voltage slew rate. The resulting boundary curves demonstrate a total switching loss reduction of up to 60% while maintaining nearly the same overshoot and slew rate values compared to a classical gate driver. The paper concludes with an analysis of the results and a summary of the key findings. Full article
(This article belongs to the Section Power Electronics)
Show Figures

Figure 1

41 pages, 6438 KB  
Review
Advances and Perspectives in Gate Dielectric Thin Films for 4H-SiC MOSFETs
by Zhaopeng Bai, Jinsong Liang, Chengxi Ding, Zimo Zhou, Man Luo, Lin Gu, Hong-Ping Ma and Qing-Chun Zhang
Materials 2026, 19(4), 766; https://doi.org/10.3390/ma19040766 - 15 Feb 2026
Viewed by 1858
Abstract
The performance and reliability of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are largely determined by the material properties of gate dielectric films and the quality of the dielectric/SiC interface. This paper provides a systematic review of recent progress in gate dielectric engineering for 4H-SiC [...] Read more.
The performance and reliability of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are largely determined by the material properties of gate dielectric films and the quality of the dielectric/SiC interface. This paper provides a systematic review of recent progress in gate dielectric engineering for 4H-SiC MOSFETs, with emphasis on SiO2-based gate dielectrics and high-dielectric-constant (high-k) gate dielectrics. First, for conventional thermally grown SiO2/SiC systems, the effects of interface nitridation, gate oxide doping, and surface pretreatment techniques are comprehensively discussed. The influence mechanisms of these processes on carbon-related interface defects, interface state density and field-effect mobility are analyzed, and the advances in related research are summarized. Second, the application of high-k gate dielectrics, including Al2O3, HfO2, ZrO2, and stacked dielectric structures, in SiC MOS devices is systematically reviewed. The advantages of these materials in reducing equivalent oxide thickness, increasing gate capacitance, suppressing leakage current, and improving thermal stability are highlighted. In addition, interface defects and electrical characteristics associated with different high-k gate dielectrics are comparatively evaluated. Finally, future research directions are discussed, including in situ interface engineering based on atomic layer deposition, dopant modulation, and heterogeneous gate dielectric structures. These approaches show strong potential for achieving high mobility, low loss, and high reliability in advanced 4H-SiC power MOSFETs. Full article
(This article belongs to the Special Issue Advancements in Thin Film Deposition Technologies)
Show Figures

Graphical abstract

16 pages, 17462 KB  
Article
Car Safety Airbags Based on Triboelectric Nanogenerators
by Bowen Cha, Jun Luo, Zilong Guo and Huayan Pu
Sensors 2026, 26(3), 1043; https://doi.org/10.3390/s26031043 - 5 Feb 2026
Cited by 1 | Viewed by 1704
Abstract
Triboelectric nanogenerators (TENGs) have gradually been applied in various practical scenarios, mainly focusing on core areas such as wearable motion monitoring devices, medical security systems, and natural resource exploration technology. However, they have the problem of low output energy and have not yet [...] Read more.
Triboelectric nanogenerators (TENGs) have gradually been applied in various practical scenarios, mainly focusing on core areas such as wearable motion monitoring devices, medical security systems, and natural resource exploration technology. However, they have the problem of low output energy and have not yet formed effective integration with mature commercially available products, which has hindered the industrialization process. This situation still significantly limits its global promotion and application. In this study, TENG was used as the sensing module for intelligent automotive airbags. We tested the voltage and current output characteristics of the system under different impact forces and frequency conditions. During the testing process, the electrical energy generated under different operating conditions is transmitted to the control system via Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) circuits. The system will quickly determine whether to trigger the airbag deployment based on the received electrical signals, and activate the ignition device when necessary to achieve rapid inflation and deployment of the airbag. Compared with traditional triggering mechanisms, the airbag system based on this designed sensor has higher sensitivity and reliability. The sensor can stably capture collision signals, and experiments have shown that as the collision speed increases, the slope of its open-circuit voltage gradually approaches infinity. Applying TENG to automotive airbags not only effectively improves the triggering efficiency and accuracy of airbags, but also provides more reliable safety protection for drivers and passengers. Finite element simulation of the automotive airbag was conducted to provide specific data support for evaluating its safety performance. With the continuous advancement of TENG technology and further expansion of its application scenarios, we believe that such innovative safety technologies will play a more critical role in the future automotive industry. Full article
(This article belongs to the Section Chemical Sensors)
Show Figures

Graphical abstract

34 pages, 5698 KB  
Review
Optimizing Silicon MOSFETs: The Impact of DTCO and Machine Learning Techniques
by Ammar Tariq, Fortunato Neri, Valeria Cinnera Martino, Salvatore Rinaudo, Carmelo Corsaro and Enza Fazio
Electronics 2026, 15(1), 166; https://doi.org/10.3390/electronics15010166 - 29 Dec 2025
Cited by 1 | Viewed by 2399
Abstract
In an era of rapid technological advancements and growing necessity for effective power management systems, the significance of silicon Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs) in contemporary power electronics is more critical than ever. This review explores the advancements in silicon MOSFET technology through the [...] Read more.
In an era of rapid technological advancements and growing necessity for effective power management systems, the significance of silicon Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs) in contemporary power electronics is more critical than ever. This review explores the advancements in silicon MOSFET technology through the lens of Design Technology Co-Optimization (DTCO). By integrating design and process technology strategies, DTCO optimizes power, performance, area, and cost (PPAC) metrics, addressing the limitations of traditional scaling methods. The manuscript presents an exhaustive analysis of the foundational principles of MOSFET technology, the progression of DTCO, and its implications on critical design metrics. The inclusion of machine learning techniques enhances the DTCO process, enabling vast simulations and efficient design iterations, which are crucial for navigating the complexities of advanced semiconductor device physics. Empirical evidence from TCAD simulations augmented by machine learning insights demonstrates the effectiveness of DTCO in enhancing device performance, reliability, and manufacturing yield. This review emphasizes the significance of DTCO and machine learning in addressing contemporary challenges and influencing the future trajectory of silicon MOSFET technology. Full article
(This article belongs to the Special Issue Feature Review Papers in Electronics)
Show Figures

Figure 1

22 pages, 83077 KB  
Article
Comparative Analysis of SiC-Based Isolated Bidirectional DC/DC Converters for a Modularized Off-Board EV Charging System with a Bipolar DC Link
by Kaushik Naresh Kumar, Rafał Miśkiewicz, Przemysław Trochimiuk, Jacek Rąbkowski and Dimosthenis Peftitsis
Electronics 2025, 14(22), 4522; https://doi.org/10.3390/electronics14224522 - 19 Nov 2025
Cited by 4 | Viewed by 1985
Abstract
The choice of a suitable isolated and bidirectional DC/DC converter (IBDC) topology is an important step in the design of a bidirectional electric vehicle (EV) charging system. In this context, six 10 kW rated silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET)-based dual-active bridge [...] Read more.
The choice of a suitable isolated and bidirectional DC/DC converter (IBDC) topology is an important step in the design of a bidirectional electric vehicle (EV) charging system. In this context, six 10 kW rated silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET)-based dual-active bridge (DAB) converter topologies, supplied by a +750/0/−750 V bipolar DC link, are analyzed and compared in this article. The evaluation criteria include the required volt-ampere semiconductor ratings, loss distribution, efficiency, and thermal considerations of the considered converter configurations. The IBDC topologies are compared based on the observations and results obtained from theoretical analysis, electro-thermal simulations, and experiments, considering the same voltage and power conditions. The advantages and disadvantages of the topologies, in terms of the considered evaluation criteria, are discussed. It is shown that the series-resonant (SR) input-series output-parallel (ISOP) full-bridge (FB) DAB converter configuration is the most suitable design choice for the considered EV charging application based on the chosen operating conditions and evaluation criteria. Full article
(This article belongs to the Special Issue DC–DC Power Converter Technologies for Energy Storage Integration)
Show Figures

Figure 1

11 pages, 2457 KB  
Article
Temperature-Dependent Reverse-Recovery Behavior Analysis and Circuit-Level Mitigation of Superjunction MOSFETs
by Wenrong Cui, Peng Liao, Yanghao Wang, Jianbin Guo, Yafen Yang, David Wei Zhang and Hang Xu
Micromachines 2025, 16(11), 1252; https://doi.org/10.3390/mi16111252 - 31 Oct 2025
Viewed by 886
Abstract
This study explores the temperature dependence of reverse-recovery behavior in superjunction metal-oxide-semiconductor field-effect-transistors (MOSFETs) using experiments and Technology Computer-Aided Design (TCAD) simulations. Results show that at 145 °C, switching failure occurs due to severe reverse-recovery degradation. The main cause is the temperature-induced increase [...] Read more.
This study explores the temperature dependence of reverse-recovery behavior in superjunction metal-oxide-semiconductor field-effect-transistors (MOSFETs) using experiments and Technology Computer-Aided Design (TCAD) simulations. Results show that at 145 °C, switching failure occurs due to severe reverse-recovery degradation. The main cause is the temperature-induced increase in carrier lifetime, leading to a higher reverse-recovery charge, current, and time. A practical solution is proposed by adding a small parallel capacitor, which effectively suppresses reverse recovery and improves switching reliability. This work provides physical insight and a simple strategy for optimizing superjunction MOSFET performance in high-temperature power electronics. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 3rd Edition)
Show Figures

Figure 1

35 pages, 4540 KB  
Review
Recent Progress of β-Ga2O3 Power Diodes: A Comprehensive Review
by Lin-Qing Zhang, Jia-Jia Liu, Ya-Ting Tian, Han Xi, Qing-Hua Yue, Hong-Fang Li, Zhi-Yan Wu and Li-Fang Sun
Inorganics 2025, 13(11), 364; https://doi.org/10.3390/inorganics13110364 - 31 Oct 2025
Cited by 6 | Viewed by 4716
Abstract
Ultra-bandgap semiconductor material, β-gallium oxide (β-Ga2O3), has great potential for fabricating the next generation of high-temperature, high-voltage power devices due to its superior material properties and cost competitiveness. In addition, β-Ga2O3 has the advantages of high-quality, [...] Read more.
Ultra-bandgap semiconductor material, β-gallium oxide (β-Ga2O3), has great potential for fabricating the next generation of high-temperature, high-voltage power devices due to its superior material properties and cost competitiveness. In addition, β-Ga2O3 has the advantages of high-quality, large-size, low-cost, and controllable doping, which can be realized by the melt method. It has a wide bandgap of 4.7–4.9 eV, a large breakdown field strength of 8 MV/cm, and a Baliga figure of merit (BFOM) as high as 3000, which is approximately 10 and 4 times that of SiC and GaN, respectively. These properties enable β-Ga2O3 to be strongly competitive in power diodes and metal-oxide-semiconductor field-effect transistor (MOSFET) applications. Most of the current research is focused on electrical characteristics of those devices, including breakdown voltage (VBR), specific on-resistance (RON,SP), power figure of merit (PFOM), etc. Considering the rapid development of β-Ga2O3 diode technology, this review mainly introduces the research progress of different structures of β-Ga2O3 power diodes, including vertical and lateral structures with various advanced techniques. A detailed analysis of Ga2O3-based high-voltage power diodes is presented. This review will help our theoretical understanding of β-Ga2O3 power diodes as well as the development trends of β-Ga2O3 power application schemes. Full article
Show Figures

Figure 1

22 pages, 7371 KB  
Article
Online Junction Temperature Measurement for Power MOSFETs Using the Body Diode Under Varying Forward Currents
by Xueli Zhu, Yajie Huang, Donglai Zhang, Yuepeng Zhang, Jun Wu, Bowen Jiang, Linzhong Xia, Bo Gao and Changwei Lv
Energies 2025, 18(19), 5045; https://doi.org/10.3390/en18195045 - 23 Sep 2025
Cited by 2 | Viewed by 2417
Abstract
Power metal-oxide-semiconductor field-effect transistors (MOSFETs) provide numerous advantages and are widely utilized in various power circuits. The junction temperature plays a critical role in determining the reliability, performance, and operational lifetime of power MOSFETs. Therefore, accurate monitoring of the junction temperature of power [...] Read more.
Power metal-oxide-semiconductor field-effect transistors (MOSFETs) provide numerous advantages and are widely utilized in various power circuits. The junction temperature plays a critical role in determining the reliability, performance, and operational lifetime of power MOSFETs. Therefore, accurate monitoring of the junction temperature of power MOSFETs is essential to ensure the safe operation of power circuit systems. In bridge or motor drive circuits, MOSFETs often operate in a freewheeling state via the body diode, where the freewheeling current is typically variable. The proposed method for junction temperature measurement utilizes the body diode and is designed to accommodate varying forward currents. It also accounts for the temperature-dependent ideality factor to improve measurement accuracy. By integrating the forward voltage and forward current of the body diode, this approach reduces the required sampling frequency. To validate the method’s effectiveness, three representative types of power MOSFETs, a Si MOSFET (IRF520), a SiC MOSFET (C2M0080120D), and an aerospace-grade radiation-hardened MOSFET (RSCS25045T1RH), were used to measure junction temperatures before and after irradiation. Following ideality factor correction, the maximum absolute error compared to reference measurements from thermocouples and a thermal imager remained within 2 K across the temperature range of 300 K to 420 K. Experimental results confirm the feasibility of the proposed method. Full article
(This article belongs to the Special Issue Advancements in Power Electronics for Power System Applications)
Show Figures

Figure 1

14 pages, 4689 KB  
Article
Digital Push–Pull Driver Power Supply Topology for Nondestructive Testing
by Haohuai Xiong, Cheng Guo, Qing Zhao and Xiaoping Huang
Sensors 2025, 25(18), 5839; https://doi.org/10.3390/s25185839 - 18 Sep 2025
Viewed by 1325
Abstract
Push–pull switch-mode power supplies are widely employed due to their high efficiency and power density. However, traditional designs typically depend on multiple auxiliary circuits to achieve functions such as power-up control, voltage regulation, and system protection, resulting in structural complexity and difficulty in [...] Read more.
Push–pull switch-mode power supplies are widely employed due to their high efficiency and power density. However, traditional designs typically depend on multiple auxiliary circuits to achieve functions such as power-up control, voltage regulation, and system protection, resulting in structural complexity and difficulty in debugging. Additionally, dual-power high-voltage amplifier systems often suffer from voltage deviations caused by supply imbalances or load fluctuations, potentially leading to equipment failure and significant economic losses. To overcome these limitations, we propose a novel digital signal-controlled push–pull driver power supply topology in this paper. Specifically, this design utilizes digital pulse-width modulation (PWM) signals to control multi-stage metal-oxide-semiconductor field-effect transistors (MOSFETs), incorporating adjustable duty-cycle drives, multi-channel current sensing, and fault protection mechanisms. Experimental validation was performed on a ±220 V, 20 kHz, 180 W power supply prototype. The results demonstrate excellent performance, notably enhancing stability and reliability in dual-side synchronous power supply scenarios. Thus, this digital-control topology effectively addresses the drawbacks of conventional push–pull designs and offers potential applications in nondestructive testing and high-voltage driving systems. Full article
(This article belongs to the Section Fault Diagnosis & Sensors)
Show Figures

Figure 1

30 pages, 6054 KB  
Article
Development of a High-Switching-Frequency Motor Controller Based on SiC Discrete Components
by Shaokun Zhang, Jing Guo and Wei Sun
World Electr. Veh. J. 2025, 16(8), 474; https://doi.org/10.3390/wevj16080474 - 19 Aug 2025
Cited by 1 | Viewed by 3252
Abstract
Discrete Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors (SiC MOSFETs) are characterized by their lower parasitic parameters and single-chip design, enabling them to achieve even faster switching speeds. However, the rapid rate of change in voltage (dv/dt) and current (di/dt) can lead to overshoot and [...] Read more.
Discrete Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors (SiC MOSFETs) are characterized by their lower parasitic parameters and single-chip design, enabling them to achieve even faster switching speeds. However, the rapid rate of change in voltage (dv/dt) and current (di/dt) can lead to overshoot and oscillation in both voltage and current, ultimately limiting the performance of high-frequency operations. To address this issue, this paper presents a high-switching-frequency motor controller that utilizes discrete SiC MOSFETs. To achieve a high switching frequency for the controller while minimizing current oscillation and voltage overshoot, a novel electronic system architecture is proposed. Additionally, a passive driving circuit is designed to suppress gate oscillation without the need for additional control circuits. A new printed circuit board (PCB) laminate stack featuring low parasitic inductance, high current conduction capacity, and efficient heat dissipation is also developed using advanced wiring technology and a specialized heat dissipation structure. Compared to traditional methods, the proposed circuit and bus design features a simpler structure, a higher power density, and achieves a 13% reduction in current overshoot, along with a 15.7% decrease in switching loss. The silicon carbide (SiC) controller developed from this research has successfully undergone double-pulse and power testing. The results indicate that the designed controller can operate reliably over extended periods at a switching frequency of 50 kHz, achieving a maximum efficiency of 98.2% and a power density of 9 kW/kg (10 kW/L). The switching frequency and quality density achieved by the controller have not been observed in previous studies. This controller is suitable for use in the development of new energy electrical systems. Full article
Show Figures

Figure 1

Back to TopTop