Special Issue "MOCAST 2021"

A special issue of Technologies (ISSN 2227-7080).

Deadline for manuscript submissions: closed (31 December 2021) | Viewed by 22865

Special Issue Editors

Prof. Dr. Spyridon Nikolaidis
E-Mail Website
Guest Editor
Prof. Dr. Rodrigo Picos
E-Mail Website
Guest Editor
1. Industrial Engineering and Construction Department, University of Balearic Islands, 07122 Palma, Majorca, Spain
2. Balearic Islands Health Institute (Idisba), 07021 Palma, Majorca, Spain
Interests: device modelling; memristors; nonlinear electron device
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The 10th International Conference on Modern Circuit and System Technologies on Electronics and Communications (MOCAST 2021) will take place in Thessaloniki, Greece, from July 5 to 7, 2021. The MOCAST technical program includes all aspects of circuit and system technologies from modeling to design, verification, implementation, and application. This Special Issue aims at publishing extended versions of top-ranking papers in the conference. The topics of MOCAST include:

  • Analog/RF and mixed signal circuits;
  • Digital circuits and systems design;
  • Nonlinear circuits and systems;
  • Device and circuit modeling;
  • High-performance embedded systems;
  • Systems and applications;
  • Sensors and systems;
  • Machine learning and AI applications;
  • Communication;        
  • Network systems;
  • Power management;
  • Imagers, MEMS, medical, and displays;
  • Radiation front ends (nuclear and space application);
  • Education in circuits, systems, and communications.

Prof. Dr. Spiros Nikolaidis
Prof. Dr. Rodrigo Picos
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Technologies is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Published Papers (13 papers)

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Editorial

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Editorial
MOCAST 2021
Technologies 2022, 10(4), 87; https://doi.org/10.3390/technologies10040087 - 20 Jul 2022
Viewed by 685
Abstract
The International Conference on Modern Circuits and Systems Technologies (MOCAST) was first launched in 2012 inside the framework of a European Project (JEWEL) [...] Full article
(This article belongs to the Special Issue MOCAST 2021)

Research

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Article
A Switched Capacitor Memristor Emulator Using Stochastic Computing
Technologies 2022, 10(2), 39; https://doi.org/10.3390/technologies10020039 - 02 Mar 2022
Cited by 1 | Viewed by 1616
Abstract
Due to the increased use of memristors and their many applications, the use of emulators has grown in parallel to avoid some of the difficulties presented by real devices, such as variability and reliability. In this paper, we present a memristive emulator designed [...] Read more.
Due to the increased use of memristors and their many applications, the use of emulators has grown in parallel to avoid some of the difficulties presented by real devices, such as variability and reliability. In this paper, we present a memristive emulator designed using a switched capacitor (SC), that is, an analog component/block and a control part or block implemented using stochastic computing (SCo) and therefore fully digital. Our design is thus a mixed signal circuit. Memristor equations are implemented using stochastic computing to generate the control signals necessary to work with the controllable resistor implemented as a switched capacitor. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Parasitic Coupling in 3D Sequential Integration: The Example of a Two-Layer 3D Pixel
Technologies 2022, 10(2), 38; https://doi.org/10.3390/technologies10020038 - 28 Feb 2022
Cited by 1 | Viewed by 2266
Abstract
In this paper, we present a thorough analysis of parasitic coupling effects between different electrodes for a 3D Sequential Integration circuit example comprising stacked devices. More specifically, this study is performed for a Back-Side Illuminated, 4T–APS, 3D Sequential Integration pixel with both its [...] Read more.
In this paper, we present a thorough analysis of parasitic coupling effects between different electrodes for a 3D Sequential Integration circuit example comprising stacked devices. More specifically, this study is performed for a Back-Side Illuminated, 4T–APS, 3D Sequential Integration pixel with both its photodiode and Transfer Gate at the bottom tier and the other parts of the circuit on the top tier. The effects of voltage bias and 3D inter-tier contacts are studied by using TCAD simulations. Coupling-induced electrical parameter variations are compared against variations due to temperature change, revealing that these two effects can cause similar levels of readout error for the top-tier readout circuit. On the bright side, we also demonstrate that in the case of a rolling shutter pixel readout, the coupling effect becomes nearly negligible. Therefore, we estimate that the presence of an inter-tier ground plane, normally used for electrical isolation, is not strictly mandatory for Monolithic 3D pixels. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Lightweight Neural Network for COVID-19 Detection from Chest X-ray Images Implemented on an Embedded System
Technologies 2022, 10(2), 37; https://doi.org/10.3390/technologies10020037 - 25 Feb 2022
Cited by 4 | Viewed by 2170
Abstract
At the end of 2019, a severe public health threat named coronavirus disease (COVID-19) spread rapidly worldwide. After two years, this coronavirus still spreads at a fast rate. Due to its rapid spread, the immediate and rapid diagnosis of COVID-19 is of utmost [...] Read more.
At the end of 2019, a severe public health threat named coronavirus disease (COVID-19) spread rapidly worldwide. After two years, this coronavirus still spreads at a fast rate. Due to its rapid spread, the immediate and rapid diagnosis of COVID-19 is of utmost importance. In the global fight against this virus, chest X-rays are essential in evaluating infected patients. Thus, various technologies that enable rapid detection of COVID-19 can offer high detection accuracy to health professionals to make the right decisions. The latest emerging deep-learning (DL) technology enhances the power of medical imaging tools by providing high-performance classifiers in X-ray detection, and thus various researchers are trying to use it with limited success. Here, we propose a robust, lightweight network where excellent classification results can diagnose COVID-19 by evaluating chest X-rays. The experimental results showed that the modified architecture of the model we propose achieved very high classification performance in terms of accuracy, precision, recall, and f1-score for four classes (COVID-19, normal, viral pneumonia and lung opacity) of 21.165 chest X-ray images, and at the same time meeting real-time constraints, in a low-power embedded system. Finally, our work is the first to propose such an optimized model for a low-power embedded system with increased detection accuracy. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Effective Current Pre-Amplifiers for Visible Light Communication (VLC) Receivers
Technologies 2022, 10(), 36; https://doi.org/10.3390/technologies10010036 - 21 Feb 2022
Cited by 1 | Viewed by 1428
Abstract
Visible light communication (VLC) is an upcoming wireless communication technology. In a VLC system, signal integrity under low illumination intensity and high transmission frequencies are of great importance. Towards this direction, the performance of the analog front end (AFE) sub-system either at the [...] Read more.
Visible light communication (VLC) is an upcoming wireless communication technology. In a VLC system, signal integrity under low illumination intensity and high transmission frequencies are of great importance. Towards this direction, the performance of the analog front end (AFE) sub-system either at the side of the transmitter or the receiver is crucial. However, little research on the AFE of the receiver is reported in the open literature. Aiming to enhance signal integrity, three pre-amplification topologies for the VLC receiver AFE are presented and compared in this paper. All three use bipolar transistors (BJT): the first consists of a single BJT, the second of a double BJT in cascade connection, and the third of a double BJT in Darlington-like connection. In order to validate the performance characteristics of the three topologies, simulation results are provided with respect to the light illumination intensity, the data transmission frequency and the power consumption. According to these simulations, the third topology is characterized by higher data transmission frequencies, lower illuminance intensity and lower power consumption per MHz of operation. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Performance Analysis of 2D and 3D Bufferless NoCs Using Markov Chain Models
Technologies 2022, 10(), 27; https://doi.org/10.3390/technologies10010027 - 02 Feb 2022
Cited by 1 | Viewed by 1253
Abstract
Performance analysis and design space exploration of bufferless Networks-on-Chip is done mainly through time-consuming cycle-accurate simulation, due to the chaotic nature of packet deflections, which have thus far prevented the development of an accurate analytical model. In order to raise the level of [...] Read more.
Performance analysis and design space exploration of bufferless Networks-on-Chip is done mainly through time-consuming cycle-accurate simulation, due to the chaotic nature of packet deflections, which have thus far prevented the development of an accurate analytical model. In order to raise the level of abstraction as well as capture the inherently probabilistic behavior of deflection routing, this paper presents a methodology for employing Markov chain models in the analysis of the behavior of bufferless Networks-on-Chip. A formal way of describing a bufferless NoC topology as a set of discrete-time Markov chains is presented. It is demonstrated that by combining this description with the network average distance, it is possible to obtain the expectation of the number of hops between any pair of nodes in the network as a function of the flit deflection probability. Comparisons between the proposed model and cycle-accurate simulation demonstrate the accuracy achieved by the model, with negligible computational cost. The useful range of the proposed model is quantified, demonstrating that it has an error of less than 10% for a significant proportion (between 33 and 75%) of the injection rate range below saturation. Finally, a simple equation for comparing mesh topologies with a “back-of-the-envelope” calculation is introduced. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Reliable IoT-Based Monitoring and Control of Hydroponic Systems
Technologies 2022, 10(), 26; https://doi.org/10.3390/technologies10010026 - 02 Feb 2022
Cited by 1 | Viewed by 2575
Abstract
This paper presents the design and implementation of iPONICS: an intelligent, low-cost IoT-based control and monitoring system for hydroponics greenhouses. The system is based on three types of sensor nodes. The main (master) node is responsible for controlling the pump, monitoring the quality [...] Read more.
This paper presents the design and implementation of iPONICS: an intelligent, low-cost IoT-based control and monitoring system for hydroponics greenhouses. The system is based on three types of sensor nodes. The main (master) node is responsible for controlling the pump, monitoring the quality of the water in the greenhouse and aggregating and transmitting the data from the slave nodes. Environment sensing slave nodes monitor the ambient conditions in the greenhouse and transmit the data to the main node. Security nodes monitor activity (movement in the area). The system monitors water quality and greenhouse temperature and humidity, ensuring that crops grow under optimal conditions according to hydroponics guidelines. Remote monitoring for the greenhouse keepers is facilitated by monitoring these parameters via connecting to a website. An innovative fuzzy inference engine determines the plant irrigation duration. The system is optimized for low power consumption in order to facilitate off-grid operation. Preliminary reliability analysis indicates that the system can tolerate various transient faults without requiring intervention. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits
Technologies 2022, 10(), 23; https://doi.org/10.3390/technologies10010023 - 31 Jan 2022
Cited by 1 | Viewed by 1284
Abstract
Due to continuous CMOS technology downscaling, Integrated Circuits (ICs) have become more susceptible to radiation-induced hazards such as soft errors. Thus, to design radiation-hardened and reliable ICs, the Soft Error Rate (SER) estimation constitutes an essential procedure. An accurate SER evaluation is provided [...] Read more.
Due to continuous CMOS technology downscaling, Integrated Circuits (ICs) have become more susceptible to radiation-induced hazards such as soft errors. Thus, to design radiation-hardened and reliable ICs, the Soft Error Rate (SER) estimation constitutes an essential procedure. An accurate SER evaluation is provided based on a SPICE-oriented electrical masking analysis, combined with a TCAD characterization process. Furthermore, the proposed work analyzes the effect of a Static Timing Analysis (STA) methodology and the actual interconnection delay on SER evaluation. An analysis of the generated Single Event Multiple Transients (SEMTs) and the circuit operating frequency that are related to the SER estimation is also discussed. Various benchmarks, synthesized utilizing a 45 nm and 15 nm technology, are employed, and the experimental results demonstrate the SER variation as the device node scales down. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Efficient Stochastic Computing FIR Filtering Using Sigma-Delta Modulated Signals
Technologies 2022, 10(), 14; https://doi.org/10.3390/technologies10010014 - 20 Jan 2022
Cited by 1 | Viewed by 1405
Abstract
This work presents a soft-filtering digital signal processing architecture based on sigma-delta modulators and stochastic computing. A sigma-delta modulator converts the input high-resolution signal to a single-bit stream enabling filtering structures to be realized using stochastic computing’s negligible-area multipliers. Simulation in the spectral [...] Read more.
This work presents a soft-filtering digital signal processing architecture based on sigma-delta modulators and stochastic computing. A sigma-delta modulator converts the input high-resolution signal to a single-bit stream enabling filtering structures to be realized using stochastic computing’s negligible-area multipliers. Simulation in the spectral domain demonstrates the filter’s proper operation and its roll-off behavior, as well as the signal-to-noise ratio improvement using the sigma-delta modulator, compared to typical stochastic computing filter realizations. The proposed architecture’s hardware advantages are showcased with synthesis results for two FIR filters using FPGA and synopsys tools, while comparisons with standard stochastic computing-based hardware realizations, as well as with conventional binary ones, demonstrate its efficacy. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
A Simplified Tantalum Oxide Memristor Model, Parameters Estimation and Application in Memory Crossbars
Technologies 2022, 10(), 6; https://doi.org/10.3390/technologies10010006 - 10 Jan 2022
Cited by 2 | Viewed by 1525
Abstract
In this paper, an improved and simplified modification of a tantalum oxide memristor model is presented. The proposed model is applied and analyzed in hybrid and passive memory crossbars in LTSPICE environment and is based on the standard Ta2O5 memristor [...] Read more.
In this paper, an improved and simplified modification of a tantalum oxide memristor model is presented. The proposed model is applied and analyzed in hybrid and passive memory crossbars in LTSPICE environment and is based on the standard Ta2O5 memristor model proposed by Hewlett–Packard. The discussed modified model has several main enhancements—inclusion of a simplified window function, improvement of its effectiveness by the use of a simple expression for the i–v relationship, and replacement of the classical Heaviside step function with a differentiable and flat step-like function. The optimal values of coefficients of the tantalum oxide memristor model are derived by comparison of experimental current–voltage relationships and by using a procedure for parameter estimation. A simplified LTSPICE library model, correspondent to the analyzed tantalum oxide memristor, is created in accordance with the considered mathematical model. The improved and altered Ta2O5 memristor model is tested and simulated in hybrid and passive memory crossbars for a state near to a hard-switching operation. After a comparison of several of the best existing memristor models, the main pros of the proposed memristor model are highlighted—its improved implementation, better operating rate, and good switching properties. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Artwork Style Recognition Using Vision Transformers and MLP Mixer
Technologies 2022, 10(), 2; https://doi.org/10.3390/technologies10010002 - 28 Dec 2021
Cited by 1 | Viewed by 1777
Abstract
Through the extensive study of transformers, attention mechanisms have emerged as potentially more powerful than sequential recurrent processing and convolution. In this realm, Vision Transformers have gained much research interest, since their architecture changes the dominant paradigm in Computer Vision. An interesting and [...] Read more.
Through the extensive study of transformers, attention mechanisms have emerged as potentially more powerful than sequential recurrent processing and convolution. In this realm, Vision Transformers have gained much research interest, since their architecture changes the dominant paradigm in Computer Vision. An interesting and difficult task in this field is the classification of artwork styles, since the artistic style of a painting is a descriptor that captures rich information about the painting. In this paper, two different Deep Learning architectures—Vision Transformer and MLP Mixer (Multi-layer Perceptron Mixer)—are trained from scratch in the task of artwork style recognition, achieving over 39% prediction accuracy for 21 style classes on the WikiArt paintings dataset. In addition, a comparative study between the most common optimizers was conducted obtaining useful information for future studies. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Encoding Two-Qubit Logical States and Quantum Operations Using the Energy States of a Physical System
Technologies 2022, 10(), 1; https://doi.org/10.3390/technologies10010001 - 22 Dec 2021
Cited by 4 | Viewed by 1584
Abstract
In this paper, we introduce a novel coding scheme, which allows single quantum systems to encode multi-qubit registers. This allows for more efficient use of resources and the economy in designing quantum systems. The scheme is based on the notion of encoding logical [...] Read more.
In this paper, we introduce a novel coding scheme, which allows single quantum systems to encode multi-qubit registers. This allows for more efficient use of resources and the economy in designing quantum systems. The scheme is based on the notion of encoding logical quantum states using the charge degree of freedom of the discrete energy spectrum that is formed by introducing impurities in a semiconductor material. We propose a mechanism of performing single qubit operations and controlled two-qubit operations, providing a mechanism for achieving these operations using appropriate pulses generated by Rabi oscillations. The above architecture is simulated using the Armonk single qubit quantum computer of IBM to encode two logical quantum states into the energy states of Armonk’s qubit and using custom pulses to perform one and two-qubit quantum operations. Full article
(This article belongs to the Special Issue MOCAST 2021)
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Article
Incremental Lagrangian Relaxation Based Discrete Gate Sizing and Threshold Voltage Assignment
Technologies 2021, 9(4), 92; https://doi.org/10.3390/technologies9040092 - 26 Nov 2021
Cited by 1 | Viewed by 1412
Abstract
Timing closure remains one of the most critical challenges of a physical synthesis flow, especially when the design operates under multiple operating conditions. Even if timing is almost closed at the end of the flow, last-mile placement and routing congestion optimizations may introduce [...] Read more.
Timing closure remains one of the most critical challenges of a physical synthesis flow, especially when the design operates under multiple operating conditions. Even if timing is almost closed at the end of the flow, last-mile placement and routing congestion optimizations may introduce new timing violations. Correcting such violations needs minimally disruptive techniques such as threshold voltage reassignment and gate sizing that affect only marginally the placement and routing of the almost finalized design. To this end, we transform a powerful Lagrangian-relaxation-based optimizer, used for global timing optimization early in the design flow, into a practical incremental timing optimizer that corrects small timing violations with fast runtime and without increasing the area/power of the design. The proposed approach was applied to already optimized designs of the ISPD 2013 benchmarks assuming that they experience new timing violations due to local wire rerouting. Experimental results show that in single corner designs, timing is improved by more than 36% on average, using 45% less runtime. Correspondingly, in a multicorner context, timing is improved by 39% when compared to the fully-fledged version of the timing optimizer. Full article
(This article belongs to the Special Issue MOCAST 2021)
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