Special Issue "Modern Circuits and Systems Technologies on Electronics"

A special issue of Technologies (ISSN 2227-7080). This special issue belongs to the section "Information and Communication Technologies".

Deadline for manuscript submissions: closed (1 November 2018)

Special Issue Editors

Guest Editor
Prof. Dr. Spiros Nikolaidis

Physics Department, Aristotle University of Thessaloniki, Thessaloniki, Greece
Website | E-Mail
Interests: Digital circuits and systems
Guest Editor
Dr. Alkiviadis Hatzopoulos

School of Electrical and Computer Engineering, Aristotle University of Thessaloniki, Thessaloniki, Greece
E-Mail
Interests: analog and mixed signal design and testing

Special Issue Information

Dear Colleagues,

The 7th International Conference on Modern Circuit and System Technologies on Electronics and Communications (MOCAST 2018) will take place in Thessaloniki, Greece, 7–9 May, 2018. The MOCAST technical program includes all aspects of circuit and system technologies, including modeling, design, verification, implementation and application. This Special Issue aims at publishing extended versions of top-ranked papers at the conference. This year, MOCAST is technically sponsored by IEEE. The topics of MOCAST include:

  • analog/RF and mixed signal circuits
  • digital circuits and systems design
  • nonlinear circuits and systems
  • device and circuit modeling
  • high performance embedded systems
  • systems and applications
  • power management
  • imagers, mems, medical and displays
  • radiation front ends (nuclear and space application)
  • education in circuits, systems and communications

Prof. Dr. Spiros Nikolaidis
Dr. Alkiviadis Hatzopoulos
Guest Editors

Related Special Issue “Modern Circuits and Systems Technologies on Communications

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Technologies is an international peer-reviewed open access quarterly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 350 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • electronic circuit technologies
  • electronic system technologies
  • modeling, design and implementation of circuits and systems
  • systems and applications

Published Papers (7 papers)

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Research

Open AccessArticle
A Telemedicine Service System Exploiting BT/BLE Wireless Sensors for Remote Management of Chronic Patients
Technologies 2019, 7(1), 13; https://doi.org/10.3390/technologies7010013
Received: 14 November 2018 / Revised: 8 January 2019 / Accepted: 15 January 2019 / Published: 18 January 2019
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Abstract
The management of the increasing number of patients affected by cardiovascular, pulmonary, and metabolic chronic diseases represents a major challenge for the National Health System (NHS) in any developed country. Chronic diseases are indeed the main cause of hospitalization, especially for elderly people, [...] Read more.
The management of the increasing number of patients affected by cardiovascular, pulmonary, and metabolic chronic diseases represents a major challenge for the National Health System (NHS) in any developed country. Chronic diseases are indeed the main cause of hospitalization, especially for elderly people, leading to sustainability problems due to the huge amount of resources required. In the last years, the adoption of the chronic care model (CCM) as assistive model improved the management of these patients and reduced the related healthcare costs. The diffusion of wireless sensors, portable devices and connectivity enables to implement new information and communication technology (ICT)-based innovative applications to further improve the outcomes of the CCM. This paper presents a telemedicine platform for data acquisition, distribution, processing, presentation, and storage, aimed to remotely monitor the clinical status of chronic patients. The proposed solution is based on monitoring kits, with wireless Bluetooth (BT)/ Bluetooth low energy (BLE) sensors and a gateway (i.e., smartphone or tablet) connected to a web-based cloud application that collects and makes available the clinical information to the medical staff. The platform allows clinicians and practitioners to monitor at distance their patients, according to personalized treatment plans, and to act promptly in case of aggravations, reducing hospitalizations and improving patients’ quality of life. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessArticle
A High-Level Synthesis Implementation and Evaluation of an Image Processing Accelerator
Received: 14 November 2018 / Revised: 19 December 2018 / Accepted: 21 December 2018 / Published: 23 December 2018
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Abstract
Most frequently, an FPGA is used as an implementation platform in applications of graphics processing, as its structure can effectively exploit both spatial and temporal parallelism. Such parallelization techniques involve fundamental restrictions, namely being their dependence on both the processing model and the [...] Read more.
Most frequently, an FPGA is used as an implementation platform in applications of graphics processing, as its structure can effectively exploit both spatial and temporal parallelism. Such parallelization techniques involve fundamental restrictions, namely being their dependence on both the processing model and the system’s hardware constraints, that can force the designer to restructure the architecture and the implementation. Predesigned accelerators can significantly assist the designer to solve this problem and meet his deadlines. In this paper, we present our accelerators for Grayscale and Sobel Edge Detection, two of the most fundamental algorithms used in digital image processing projects. We have implemented those algorithms with a “bare-metal” VHDL design, written purely by hand, as a portable USB accelerator device, as well as an HLS-based overlay of a similar implementation designed to be used by a Python interface. The comparisons of the two architectures showcase that the HLS generated design can perform equally to or even better than the handwritten HDL equivalent, especially when the correct compiler directives are provided. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessArticle
Improved Parallel Legalization Schemes for Standard Cell Placement with Obstacles
Received: 9 November 2018 / Revised: 18 December 2018 / Accepted: 19 December 2018 / Published: 22 December 2018
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Abstract
In standard cell placement, a circuit is given consisting of cells with a standard height, (different widths) and the problem is to place the cells in the standard rows of a chip area so that no overlaps occur and some target function is [...] Read more.
In standard cell placement, a circuit is given consisting of cells with a standard height, (different widths) and the problem is to place the cells in the standard rows of a chip area so that no overlaps occur and some target function is optimized. The process is usually split into at least two phases. In a first pass, a global placement algorithm distributes the cells across the circuit area, while in the second step, a legalization algorithm aligns the cells to the standard rows of the power grid and alleviates any overlaps. While a few legalization schemes have been proposed in the past for the basic problem formulation, few obstacle-aware extensions exist. Furthermore, they usually provide extreme trade-offs between time performance and optimization efficiency. In this paper, we focus on the legalization step, in the presence of pre-allocated modules acting as obstacles. We extend two known algorithmic approaches, namely Tetris and Abacus, so that they become obstacle-aware. Furthermore, we propose a parallelization scheme to tackle the computational complexity. The experiments illustrate that the proposed parallelization method achieves a good scalability, while it also efficiently prunes the search space resulting in a superlinear speedup. Furthermore, this time performance comes at only a small cost (sometimes even improvement) concerning the typical optimization metrics. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessFeature PaperArticle
A Preconditioned Iterative Approach for Efficient Full Chip Thermal Analysis on Massively Parallel Platforms
Received: 1 November 2018 / Revised: 12 December 2018 / Accepted: 17 December 2018 / Published: 20 December 2018
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Abstract
Efficient full-chip thermal simulation is among the most challenging problems facing the EDA industry today, especially for modern 3D integrated circuits, due to the huge linear systems resulting from thermal modeling approaches that require unreasonably long computational times. While the formulation problem, by [...] Read more.
Efficient full-chip thermal simulation is among the most challenging problems facing the EDA industry today, especially for modern 3D integrated circuits, due to the huge linear systems resulting from thermal modeling approaches that require unreasonably long computational times. While the formulation problem, by applying a thermal equivalent circuit, is prevalent and can be easily constructed, the corresponding 3D equations network has an undesirable time-consuming numerical simulation. Direct linear solvers are not capable of handling such huge problems, and iterative methods are the only feasible approach. In this paper, we propose a computationally-efficient iterative method with a parallel preconditioned technique that exploits the resources of massively-parallel architectures such as Graphic Processor Units (GPUs). Experimental results demonstrate that the proposed method achieves a speedup of 2.2× in CPU execution and a 26.93× speedup in GPU execution over the state-of-the-art iterative method. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessArticle
Development of a Transmission Line Model for the Thickness Prediction of Thin Films via the Infrared Interference Method
Technologies 2018, 6(4), 122; https://doi.org/10.3390/technologies6040122
Received: 1 November 2018 / Revised: 15 December 2018 / Accepted: 18 December 2018 / Published: 19 December 2018
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Abstract
An efficient transmission line model in the micrometric order is presented in this paper, to determine the thickness of thin dielectric films deposited on highly-doped substrates. In particular, the estimation of the thickness is based on multiple reflections of an incident infrared electromagnetic [...] Read more.
An efficient transmission line model in the micrometric order is presented in this paper, to determine the thickness of thin dielectric films deposited on highly-doped substrates. In particular, the estimation of the thickness is based on multiple reflections of an incident infrared electromagnetic wave generating interference on the sensor. To this objective, the periodicity of the local maxima and minima, including the phase shift and wavelength dependence of the reflection at the layer-substrate interface, leads in the extraction of the required thickness. Moreover, a theoretical transmission line circuit is designed, in order to model the multiple interferences scenario, and an iterative method is developed to converge towards the correct coating thickness. The featured theoretical transmission line model is validated, via a direct comparison with Certified Reference Materials, to indicate its overall accuracy and reliability level. Finally, the proposed method is utilized to calculate the thickness of coated metallic samples. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessArticle
Energy-Harvesting Powered Variable Storage Topology for Battery-Free Wireless Sensors
Technologies 2018, 6(4), 106; https://doi.org/10.3390/technologies6040106
Received: 29 October 2018 / Revised: 12 November 2018 / Accepted: 13 November 2018 / Published: 16 November 2018
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Abstract
The energy autonomy of wireless sensors is one of the main roadblocks to their wide deployment. The purpose of this study is to propose simple adaptive storage architecture, which combined with energy harvesting, could replace a battery. The main concept is based on [...] Read more.
The energy autonomy of wireless sensors is one of the main roadblocks to their wide deployment. The purpose of this study is to propose simple adaptive storage architecture, which combined with energy harvesting, could replace a battery. The main concept is based on using several ultracapacitors (at least two) that are reconfigured in a series or in parallel according to its state of charge/discharge, either to speed up the startup of the powered system or to provide energy autonomy. The proposed structure is based on two ultra-capacitors, one of small capacitance value and one of big value. Powered by an energy-harvesting source, the devised control circuitry allows cold start up with empty ultra-capacitors, pre-regulated output voltage, and energy usage efficiency close to 94.7%. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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Open AccessArticle
FPGA-Based Implementation of a Multilayer Perceptron Suitable for Chaotic Time Series Prediction
Technologies 2018, 6(4), 90; https://doi.org/10.3390/technologies6040090
Received: 16 August 2018 / Revised: 18 September 2018 / Accepted: 28 September 2018 / Published: 1 October 2018
Cited by 2 | PDF Full-text (1248 KB) | HTML Full-text | XML Full-text
Abstract
Many biological systems and natural phenomena exhibit chaotic behaviors that are saved in time series data. This article uses time series that are generated by chaotic oscillators with different values of the maximum Lyapunov exponent (MLE) to predict their future behavior. Three prediction [...] Read more.
Many biological systems and natural phenomena exhibit chaotic behaviors that are saved in time series data. This article uses time series that are generated by chaotic oscillators with different values of the maximum Lyapunov exponent (MLE) to predict their future behavior. Three prediction techniques are compared, namely: artificial neural networks (ANNs), the adaptive neuro-fuzzy inference system (ANFIS) and least-squares support vector machines (SVM). The experimental results show that ANNs provide the lowest root mean squared error. That way, we introduce a multilayer perceptron that is implemented using a field-programmable gate array (FPGA) to predict experimental chaotic time series. Full article
(This article belongs to the Special Issue Modern Circuits and Systems Technologies on Electronics)
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