Search Results (156)

For automotive GFRP structural components, beyond structural design, the warpage, residual stress/strain, and fiber orientation inevitably induced during the injection molding process significantly compromise their service performance. These factors also diminish the reliability of performance assessments. Thus, it is imperative to develop a process–structure co-optimization approach for GFRP components. In this paper, the performance of a front-end module is evaluated through topological structure design, injection molding process optimization, and simulation with mapped injection molding history, followed by experimental validation and analysis. Under ±1000 N loading, the initial design shows excessive displacement at the latch mounting points (2.254 mm vs. <2.0 mm limit), which is reduced to 1.609 mm after topology optimization. By employing a sequential valve control system, the controls of the melt line and fiber orientation are is superior to thatose of conventional gating systems. The optimal process parameter combination is determined through orthogonal experiments, reducing the warpage to 1.498 mm with a 41.5% reduction compared to the average warpage of the orthogonal tests. The simulation results incorporating injection molding data mapping (fiber orientation, residual stress–strain) show closer agreement with experimental measurements. When the measured displacement exceeded 0.65 mm, the average relative error $E_r$, range $R$, and variance $s^2$ between the experimental results and mapped simulations were 11.78%, 14%, and 0.002462, respectively, validating the engineering applicability of this method. The methodology and workflow can provide methodological support for the design and performance assessment of GFRP automotive body structures, which enhances structural rigidity, improves control over injection molding process defects, and elevates the reliability of performance evaluation. Full article

This paper investigates the latch-up effect in CMOS devices based on a 28 nm CMOS process within the temperature range of 200 K to 450 K using Sentaurus Technology Computer-Aided Design (TCAD) simulation, with a particular focus on the single-event latch-up (SEL) effect in the high-temperature range of 300 K to 450 K. The physical mechanism underlying the triggering of SEL in CMOS devices at high temperatures is revealed. The results show that when the linear energy transfer (LET) value is 75 MeV cm²/mg, the CMOS devices do not exhibit SEL effects at 300 K and 350 K. However, when the temperature rises to 400 K, a significant latch-up effect occurs, which becomes more pronounced with increasing temperature. Additionally, at a supply voltage of 1.2 V and a temperature of 450 K, the LET threshold for triggering SEL in CMOS devices decreases by 91.4% compared to 75 MeV cm²/mg at 300 K, dropping to 6 MeV cm²/mg. As the temperature increases, the latch-up trigger current of the CMOS devices decreases from 1.18 × 10⁻⁴ A/μm at 300 K to 4.65 × 10⁻⁵ A/μm at 450 K, and the hold voltage decreases from 1.48 V at 300 K to 1.07 V at 450 K. Full article

Background/Objectives: Breastfeeding is widely recognized as the best way to feed infants and has numerous health benefits for both mothers and infants. However, despite its well-documented benefits, breastfeeding rates remain lower than recommended in many parts of the world. This systematic review examines factors that create barriers for mothers trying to breastfeed, covering studies published between 2003 and 2025. Methods: A total of 18 studies were included in this systematic review, selected from the following databases: PsycINFO, MEDLINE, Academic Search Complete, Communication and Mass Media Complete, ERIC, SocINDEX, and CINAHL. Studies were selected based on predefined inclusion criteria, focusing on peer-reviewed articles that examined factors influencing breastfeeding practices. Data extraction and quality assessment were performed independently by two reviewers using standardized tools. The review analyzed personal, cultural, economic, and health-related barriers. Results: The analysis revealed multiple barriers to breastfeeding, categorized into personal, sociocultural, economic, and healthcare-related factors. Common challenges included a lack of counseling, latching difficulties, insufficient workplace support, and cultural misconceptions. The heterogeneity of study designs posed challenges in synthesizing the findings. Conclusions: More targeted policies and programs are needed to address these barriers and help mothers succeed in breastfeeding. Improving breastfeeding outcomes worldwide will require better healthcare, social support, and an understanding of cultural influences. Full article

Energy-efficient integrated circuits require scaled-down supply voltages, posing challenges for analog design, particularly for operational transconductance amplifiers (OTAs) essential in high-accuracy CMOS feedback systems. Below 1 V, gate-driven OTAs are limited in common-mode input range and minimum supply voltage. This work investigates CMOS Bulk-Driven (BD) sub-threshold techniques as an efficient alternative for ultra-low voltage (ULV) and ultra-low power (ULP) designs. Although BD overcomes MOS threshold voltage limitations, historical challenges like lower transconductance, latch-up, and layout complexity hindered its use. Recent advancements in CMOS processes and the need for ULP solutions have revived industrial interest in BD. Through theoretical analysis and computer simulations, we explore BD topologies for ULP OTA input stages, classifying them as tailed/tail-less and class A/AB, evaluating their effectiveness for robust analog design, while offering valuable insights for circuit designers. Full article

As wireless communication systems continue to demand higher data transmission rates, the need for analog-to-digital converters (ADCs) with a higher sampling rate becomes increasingly critical. However, traditional successive approximation register (SAR) ADCs operating at 1 bit/cycle often face speed limitations due to the fixed bit intervals and comparator regeneration delays, which constrain their scalability in advanced technology nodes. To address these challenges, this paper presents a high-speed 8-bit single-channel SAR ADC featuring a novel delay generation circuit that enables tailored bit intervals (TBIs) to reduce conversion latency. A split capacitive digital-to-analog converter (CDAC) is employed to suppress input common-mode voltage shifts, while inverted dynamic latch pairs and early capacitor reset techniques are introduced to improve conversion speed. The proposed ADC is implemented in a 16 nm CMOS process, occupying only 0.0012 mm². Post-layout simulations across extreme process and temperature corners validate the robustness of the design. The TBI-ADC achieves an effective number of bits (ENOB) of 7.20 bits at Typical–Typical (TT) 25 °C with a power consumption of 6.94 mW. Furthermore, it reaches a sampling rate of 1.6 GS/s at Fast–Fast (FF) −40 °C, representing a 33% improvement over the fastest previously reported single-channel, 1 bit/cycle, 8-bit SAR ADC. Full article

Background/Objectives: Breastfeeding multiple birth infants (MBIs) poses unique challenges that require tailored support; however, research on these mothers’ experiences is limited. This study explored the breastfeeding journeys of Australian mothers of MBIs, highlighting barriers, facilitators, and support needs. Methods: Data were collected via an online survey (May–August 2024) and included quantitative data on breastfeeding initiation, duration, and challenges, as well as qualitative insights into mothers’ experiences. Thematic analysis was used to identify key themes, and statistical analyses were used to compare breastfeeding outcomes by parity. Results: While most mothers (87%) had an antenatal intention to breastfeed, they faced barriers such as latching difficulties (56%), inadequate milk supply (49%), and sore nipples (47%). Preterm births (58%) and neonatal unit admissions delayed the breastfeeding initiation. Most mothers (99%) used electric breast pumps to boost milk supply (68%) and enable expressed breast milk feeding by other caregivers (65% of mothers). While 72% were satisfied with hospital breastfeeding support and some mothers received excellent hands-on support, others felt neglected due to busy staff or conflicting advice. Mothers frequently reported that breastfeeding guidance was geared toward singletons, leaving them unprepared for the challenges of feeding multiples. Mothers’ suggestions for improving care included specialised guidance, better access to lactation support, and in-home practical support to alleviate the burden of feeding and expressing. Additionally, mothers reported that healthcare professionals should be trained to offer practical, non-judgemental support to help mothers navigate the elaborate challenges of breastfeeding MBIs. Conclusions: This study underscores the need for early postpartum support and tailored guidelines to enhance MBI breastfeeding outcomes and maternal-infant well-being. Full article

Industry 5.0 places growing emphasis on intelligent and efficient design methodologies aiming to reduce development times, accelerate the time-to-market, and enhance human–machine collaboration in creating new products. This article proposes the use of a model-based design (MBD) approach to developing a detailed electro-thermal model (ETDM) of a Smart Latch Mechanism (SLM) used in automotive door automation systems. The proposed ETDM enhances the accuracy of the design and verification processes and enables the simulation of specific scenarios, such as fault conditions, within a virtual environment. The simulation-based framework presented in this article leverages partial knowledge of the system to enable rapid estimations of the performance and functional validation. It encompasses the injection of disturbances, the analysis of failure scenarios, and the use of processor-in-the-loop (PIL) procedures for validation purposes. This work aims to employ detailed modeling and simulation techniques and use publicly available technical data and work from the literature to eliminate the need for physical testing and instrumentation, enabling the development of models that accurately reflect the real-world behavior under defined operating conditions. The proposed framework has the potential to facilitate rapid prototyping and system reconfiguration, contributing to shorter development cycles and improved industrial efficiency by reducing both production times and the associated costs for established automotive subsystems where high precision is nonessential. Full article

Data accuracy is critical for sensor systems. As essential components of digital circuits within sensor systems, nanoscale CMOS latches are particularly susceptible to single-node upsets (SNUs) and double-node upsets (DNUs), which can lead to data errors. In this paper, a highly robust Double-Node-Upset-Tolerant Latch-Based on Input Splitting C-Elements (DNUISC) is proposed. The DNUISC latch is designed by interconnecting three sets of input-splitting C-elements to form a feedback loop, and it incorporates clock gating and fast-path techniques to minimize power consumption and delay. Simulations are conducted using the 28 nm process in HSPICE. The simulation results show that the DNUISC can self-recover from any single-node upset and is tolerant of any double-node upset. Compared with existing hardened latches, the DNUISC achieves a 55.21% reduction in area-power-delay product (APDP). Furthermore, the proposed DNUIS demonstrates high reliability and low sensitivity under varying process, voltage, and temperature conditions. Full article

With advances in space, nuclear, and defense industries, the susceptibility of semiconductor integrated circuits (ICs) to radiation has increased. Radiation-induced degradation and malfunctioning of IC performance can lead to system failure, leading to significant damage. To address this limitation, this study employed mixed-stage modeling and simulation (M&S) techniques to evaluate the reliability of complementary metal-oxide semiconductor application-specific ICs (ASICs) in radiation environments. Radiation-hardened IC chips were designed and fabricated using layout modification techniques based on M&S. The ASIC, which includes the D-latch and Operational Amplifier (Op-Amp) circuits, was validated for resistance up to a total ionizing dose of 20 kGy(Si). The proposed radiation-hardened ICs demonstrated stable performance even in radiation-exposed environments, ensuring reliable operation under such conditions. The findings provide insights into overcoming radiation-induced degradation and malfunction in semiconductor integrated circuits, which is particularly relevant for advancing space, nuclear, and defense industries. Full article

The “enzyme latch” and “Fe gate” mechanisms are crucial factors influencing soil carbon sequestration capacity, playing a key role in understanding the dynamic changes in soil organic carbon (SOC). However, there is a lack of research regarding polyphenol oxidase (PPO) activity and the concentration of iron oxides in paddy soils under varying incubating temperatures and cultivation practices. This study was conducted over three years in a double-cropping rice area in southern China, incorporating systematic soil sampling to measure PPO activity, Fe oxide concentration, and basic physicochemical properties. The results showed that temperature did not significantly affect either PPO activity or the concentration of Fe oxides. Additionally, compared to conventional management (CK), organic management led to a decrease in Fe oxides (Fe bound to organic matter, reactive Fe, and total free Fe) by 19.1%, 16.2%, and 13.7%, respectively (p < 0.05). At the same time, PPO activity did not show any significant changes. Our results indicated that short-term (5 weeks) incubation temperature did not affect PPO activity or Fe oxides, while organic farming decreased Fe oxides without influencing PPO activity. PPO activity increased with the length of the incubation period. Full article

Physical unclonable functions (PUFs) are emerging as highly promising lightweight hardware security primitives that offer novel information security solutions. PUFs capitalize on the intrinsic physical variations within circuits to generate unpredictable responses. Nevertheless, diverse PUF types often encounter difficulties in concurrently fulfilling multiple performance requisites. As is well known, strong PUFs possess significantly larger challenge–response pair (CRP) set sizes. However, they are vulnerable to machine learning (ML) attacks. Conversely, weak PUFs generate responses with superior randomness, yet their CRP sets are inadequate to satisfy the demands of practical applications. This paper presents a newly devised double-latch PUF (DL-PUF) to address this issue. This design significantly enhances both the CRP set size and security performance. The available CRPs of the DL-PUF design can reach up to $2^{64}$, and its robust security features are also demonstrated in this paper. We have implemented this design on twelve 45 nm Xilinx Spartan 6 XC6SLX25 FPGAs. The experimental results indicate that our proposed DL-PUF performs well in terms of reliability, uniqueness, uniformity, and randomness. Additionally, three machine learning algorithms were employed to conduct comprehensive tests on the DL-PUF. The results reveal its excellent resilience against machine learning attacks. Full article

The digital integrated circuit (IC) design industry is continuously evolving. However, the rapid advancements in technology are accompanied by major reliability concerns. Conventional clock-based synchronous designs become exceedingly susceptible to transient errors, caused by radiation rays, power jitters, electromagnetic interferences (EMIs), and/or other noise sources, primarily due to aggressive device and voltage scaling. quasi-delay-insensitive (QDI) asynchronous (clockless) circuits demonstrate inherent robustness against such transient errors, owing to their unique architecture. However, they are not completely immune. This article presents a hardened QDI Sleep Convention Logic (SCL) asynchronous architecture, which can fully recover from radiation-induced single-event effects such as single-event upset (SEU) and single-event latch-up (SEL). Multiple benchmark circuits are designed based on the proposed architecture. The simulation results indicate that the proposed designs offer substantial energy savings per operation, dissipate substantially less power during idle phases, and have lower area footprints in comparison to designs based on an existing resilient Null Convention Logic (NCL) architecture at the cost of increased latency. In addition, a formal verification framework for the proposed architecture is also presented. The performance and scalability of the proposed verification scheme are demonstrated using several multiplier benchmark circuits of varying width. Full article

Despite the advantages of fin field-effect transistors (FinFETs), there are hidden issues such as electric field enhancement and exacerbated self-heating effects, which will intensify device aging effects. Due to the escalating costs associated with aging protection at the device process level, there is an urgent need to reduce the impact of aging on circuit performance from the circuit design perspective. This study focuses on the specific structure of the strong-arm latch comparator and conducts a detailed aging analysis. Based on the quasi-static approximation (QSA) model, the threshold voltage shift under operational stress is simulated. It is concluded that both the hot carrier injection (HCI) effect and negative bias temperature instability (NBTI) effect play equally non-negligible roles. Furthermore, aging tests were conducted based on 14 nm FinFET devices, validating the substantial HCI effects induced by short-duration pulses. Simultaneously, the test results suggest that the aging effect becomes more remarkable with increasing current. An improved circuit is proposed to reduce the HCI effect by reducing the current pulse by the way of pre-charging, which effectively reduces the threshold voltage shift of the latch comparator input transistors. Full article

Vacuum-assisted and forceps-assisted vaginal births are associated with higher rates of formula supplementation and shorter breastfeeding duration compared to unassisted vaginal births; however, the reasons for this are unclear. Factors such as maternal knowledge, partner support, and parity significantly influence breastfeeding initiation and duration. The prevalence of perineal trauma, neonatal and maternal birth complications, and decreased birth satisfaction is higher after assisted births and may also impact breastfeeding outcomes. Given the limited research on the specific effects of different vaginal birth modes on breastfeeding, this study aimed to examine women’s experiences of establishing breastfeeding after unassisted, vacuum-assisted, and forceps-assisted vaginal birth. A mixed-methods study design was employed using an anonymous online questionnaire, which included binary, multiple choice, and open-ended questions, and Likert scale items. Using social media, we recruited Australian women who had an unassisted, vacuum-assisted, or forceps-assisted birth within the last year. Details of participant demographics, breastfeeding history, initiation and establishment, postpartum mobility, and pain ratings were recorded. Additionally, qualitative data on postpartum recovery and breastfeeding support were analysed using an inductive thematic analysis framework. A total of 565 women were recruited between May and June 2024, of which 488 responses were retained for analysis. Thematic analysis of the qualitative responses identified four central themes that defined women’s experiences of establishing breastfeeding and were similar between unassisted or assisted vaginal birth modes: Experience of Care, Environment, Expectations, and Health Complications. A range of both positive and negative experiences of breastfeeding support, environmental factors, and expectations of the realities of breastfeeding impacted women’s experiences. For many women, various maternal and/or newborn health issues, nipple pain, and latching difficulties made breastfeeding more difficult. Commercial milk formula supplementation during the hospital stay was more prevalent after a forceps-assisted birth when compared to unassisted vaginal birth (41% vs. 17%, respectively; p < 0.001). Further, during the first two weeks at home, commercial milk formula supplementation was more prevalent after both forceps-assisted (26%) and vacuum-assisted (23%) births than after unassisted vaginal birth (8%, p < 0.001). Pain ratings in the early days following birth and in the first two weeks at home were significantly higher for the forceps-assisted group than for the other vaginal birth modes (p ≤ 0.005). Women that had an unassisted vaginal birth with an intact perineum had the lowest pain ratings in the early days and weeks after birth, while pain ratings were similar between women that had a vacuum-assisted birth and those who had an unassisted vaginal birth with a perineal tear or episiotomy (p = 0.05). Early commercial milk formula supplementation is associated with shorter breastfeeding duration, while postpartum pain is known to impede maternal mobility and may partially inhibit the milk ejection reflex, potentially negatively impacting breastfeeding and increasing formula use. Therefore, women who have an instrumental assisted vaginal birth, particularly those who have a forceps-assisted birth, are at greater risk of suboptimal breastfeeding outcomes including short durations of exclusive and any breastfeeding. Improvements to early postpartum pain management, breastfeeding education, and the judicious use of commercial milk formula may improve breastfeeding and subsequent maternal and health outcomes after instrument-assisted vaginal birth. Full article

Frequency divider circuits divide the frequency of an input signal by a specified ratio. They are critical components in analog, digital, and mixed-signal microelectronics. In power-constrained environments, such as cryogenic electronics or implanted biomedical devices, minimizing power consumption is crucial. This paper reviews operational principles, benefits, trade-offs, and circuit solutions of three main typologies of frequency divider: Current Mode Logic (CML), Injection-Locking (IL), and True Single-Phase Clock (TSPC). Distinct trade-offs between operation speed, power efficiency, complexity, and integration make each of them suitable for specific applications. Nevertheless, hybrid circuit solutions combining different typologies could potentially balance performance and energy efficiency. This paper thus also reports and discusses examples of hybrid frequency dividers. Examples of frequency dividers implemented in emerging technologies, such as the FinFETs CMOS, are addressed, as well. The purpose of this paper is to guide designers in selecting frequency divider solutions that best meet the design-specific requirements. Full article