Search Results (653)

An Analog-to-Digital Converter (ADC) is an indispensable part of image sensor systems. This paper presents a silicon-based 13-bit 100 kS/s two-step single-slope analog-to-digital converter (TS-SS ADC) for infrared image sensors with a frame rate of 100 Hz. For the charge leakage and offset voltage issues inherent in conventional TS-SS ADC, a four-terminal comparator was employed to resolve the fine ramp voltage offset caused by charge redistribution in storage and parasitic capacitors. In addition, a current-steering digital-to-analog converter (DAC) was adopted to calibrate the voltage reference of the dynamic comparator and mitigate differential nonlinearity (DNL)/integral nonlinearity (INL). To eliminate quantization dead zones, a 1-bit redundancy was incorporated into the fine quantization circuit. Finally, the quantization scheme consisted of 7-bit coarse quantization followed by 7-bit fine quantization. The ADC was implemented using an SMIC 55 nm processSemiconductor Manufacturing International Corporation, Shanghai, China. The post-simulation results show that when the power supply is 3.3 V, the ADC achieves a quantization range of 1.3 V–3 V. Operating at a 100 kS/s sampling rate, the proposed ADC exhibits an effective number of bits (ENOBs) of 11.86, a spurious-free dynamic range (SFDR) of 97.45 dB, and a signal-to-noise-and-distortion ratio (SNDR) of 73.13 dB. The power consumption of the ADC was 22.18 mW. Full article

The use of low-resolution analog-to-digital converters (ADCs) in receivers has emerged as an effective solution for reducing power consumption in millimeter-wave (mmWave) massive multiple-input–multiple-output (MIMO) systems. However, low-resolution ADCs also pose significant challenges for channel estimation. To address this issue, we propose a joint uplink/downlink (UL/DL) channel estimation algorithm that utilizes the spatial reciprocity of frequency division duplex (FDD) to improve the estimation of quantized UL channels. Quantified UL/DL channels are concentrated at the BS for joint estimation. This estimation problem is regarded as a compressed sensing problem with finite bits, which has led to the development of expectation-maximization-based quantitative generalized approximate messaging (EM-QGAMP) algorithms. In the expected step, QGAMP is used for posterior estimation of sparse channel coefficients, and the block maximization minimization (MM) algorithm is introduced in the maximization step to improve the estimation accuracy. Finally, simulation results verified the robustness of the proposed EM-QGAMP algorithm, and the proposed algorithm’s NMSE (normalized mean squared error) outperforms traditional methods by over 90% and recent state-of-the-art techniques by 30%. Full article

This article presents a comprehensive modeling and simulation framework for a capacitive MEMS accelerometer integrated with a sigma-delta analog-to-digital converter (ADC), with a focus on applications in wearable health and motion monitoring devices. The accelerometer used in the system is connected to a smartphone equipped with dedicated software and will be used to assess the risk of falling, which is crucial for patients with balance disorders. The authors designed the accelerometer with special attention paid to the specification required in a system, where the acceleration is ±2 g and the frequency is 100 Hz. They investigated the sensor’s behavior in the DC, AC, and time domains, capturing both the mechanical response of the proof mass and the resulting changes in output capacitance due to external acceleration. A key component of the simulation is the implementation of a second-order sigma-delta modulator designed to digitize the small capacitance variations generated by the sensor. The Simulink model includes the complete signal path from analog input to quantization, filtering, decimation, and digital-to-analog reconstruction. By combining MEMS+ modeling with MATLAB-based system-level simulations, the workflow offers a fast and flexible alternative to traditional finite element methods and facilitates early-stage design optimization for MEMS sensor systems intended for real-world deployment. Full article

Since its publication in the 1960s, the Kalman Filter (KF) has been a powerful tool in optimal state estimation. However, the KF and most of its variants have mainly focused on the state estimation of smooth systems. In this work, we propose a new algorithm called the Discrete Unilateral Constrained Extended Kalman Filter (DUCEKF) that expands the capabilities of the Extended Kalman Filter (EKF) to a class of hybrid mechanical systems known as systems with unilateral constraints. Such systems are non-smooth in position and discontinuous in velocity. Lyapunov stability theory is invoked to establish sufficient conditions for the estimation error stability of the proposed algorithm. A comparison of the proposed algorithm with the EKF is conducted in simulation through a case study to demonstrate the superiority of the DUCEKF for the state estimation tasks in this class of systems. Simulations and an experiment were developed in this case study to validate the performance of the proposed algorithm. The experiment was conducted using electronic hardware that consists of an Embedded System (ES) called “Mikromedia for dsPIC33EP” and an external DAC-12 Click board, which includes a Digital-to-Analog Converter (DAC) from Texas Instruments. Full article

Secure communication is critically dependent on high-speed and high-security quantum random number generation (QRNG). In this work, we present a responsive approach to enhance the efficiency and security of QRNG by leveraging polarization-controlled heterodyne detection to simultaneously measure the quadrature amplitude and phase fluctuations of vacuum shot noise. To address the practical non-idealities inherent in QRNG systems, we investigate the critical impacts of imbalanced heterodyne detection, amplitude–phase overlap, finite-size effects, and security parameters on quantum conditional min-entropy derived from the entropy uncertainty principle. It effectively mitigates the overestimation of randomness and fortifies the system against potential eavesdropping attacks. For a high-security parameter of ${10}^{-20}$, QRNG achieves a true random bit extraction ratio of 83.16% with a corresponding real-time speed of 37.25 Gbps following a 16-bit analog-to-digital converter quantization and 1.4 GHz bandwidth extraction. Furthermore, we develop a deep convolutional neural network for rapid and accurate entropy evaluation. The entropy evaluation of 13,473 sets of quadrature data is processed in 68.89 s with a mean absolute percentage error of 0.004, achieving an acceleration of two orders of magnitude in evaluation speed. Extracting the shot noise with full detection bandwidth, the generation rate of QRNG using dual-quadrature heterodyne detection exceeds 85 Gbps. The research contributes to advancing the practical deployment of QRNG and expediting rapid entropy assessment. Full article

This paper investigates the error performance of cooperative decode-and-forward (DF) multiple-input multiple-output (MIMO) systems employing one-bit analog-to-digital converters (ADCs) over Rayleigh fading channels. In cooperative DF MIMO systems, detection errors at the relay may propagate to the destination, thereby degrading overall detection performance. Although joint maximum likelihood detection can efficiently mitigate error propagation by leveraging probabilistic information from a source-to-relay link, its computational complexity is impractical. To address this issue, an approximate maximum likelihood (AML) detection scheme is introduced, which significantly reduces complexity while maintaining reliable performance. However, its analysis under one-bit ADCs is challenging because of its nonlinearity. The main contributions of this paper are summarized as follows: (1) a tractable upper bound on the pairwise error probability (PEP) of the AML detector is derived using Jensen’s inequality and the Chernoff bound, (2) the asymptotic behavior of the PEP is analyzed to reveal the achievable diversity gain, (3) the analysis shows that full diversity is attained only when symbol pairs in the PEP satisfy a sign-inverted condition and the relay correctly decodes the source symbol, and (4) the simulation results verify the accuracy of the theoretical analysis and demonstrate the effectiveness of the proposed analysis. Full article

This paper presents a low-power data acquisition (DAQ) chip tailored for impulsive charge sensing, featuring a comparator-gated dynamic acquisition (CG-DAQ) architecture. A dynamic comparator triggers both the gain stage and a 12-bit successive-approximation register (SAR) analog-to-digital converter (ADC) through a shared timing path, enabling event-driven amplification and digitization. Programmable conversion gain ranging from 5 to 40 mV/pC is achieved by switching the sampling capacitance. Fabricated in TSMC 65 nm CMOS, the chip detects input charges from 0.01 to 36 pC, supports a signal bandwidth of 10 kHz to 100 kHz, and enables sampling rates up to 1 MS/s. It achieves an input-referred noise of 5.5 fC_rms and a peak signal-to-noise ratio (SNR) of 67 dB, all within a 54 μW power envelope and a compact 0.03 mm² core area. The proposed architecture facilitates accurate and energy-efficient charge-domain sensing for capacitive and piezoelectric sensor applications. Full article

This paper proposes a dual-mode CMOS analog front-end (AFE) circuit for short-wave infrared (SWIR) image sensors, which integrates a hybrid readout circuit (ROIC) and a 12-bit two-step single-slope analog-to-digital converter (TS-SS ADC). The ROIC dynamically switches between buffered-direct-injection (BDI) and direct-injection (DI) modes, thus balancing injection efficiency against power consumption. While the DI structure offers simplicity and low power, it suffers from unstable biasing and reduced injection efficiency under high background currents. Conversely, the BDI structure enhances injection efficiency and bias stability via an input buffer but incurs higher power consumption. To address this trade-off, a dual-mode injection architecture with mode-switching transistors is implemented. Mode selection is executed in-pixel via a low-leakage transmission gate and coordinated by the column timing controller, enabling low-current pixels to operate in low-noise BDI mode, whereas high-current pixels revert to the low-power DI mode. The TS-SS ADC employs a four-terminal comparator and dynamic reference voltage compensation to mitigate charge leakage and offset, which improves signal-to-noise ratio (SNR) and linearity. The prototype occupies 2.1 mm × 2.88 mm in a 0.18 µm CMOS process and serves a 64 × 64 array. The AFE achieves a dynamic range of 75.58 dB, noise of 249.42 μV, and 81.04 mW power consumption. Full article

This study introduces a Multiscale Dual-Attention U-Net (TS-MSDA U-Net) model for long-term time series synthesis. By integrating multiscale temporal feature extraction and dual-attention mechanisms into the U-Net backbone, the model captures complex temporal dependencies more effectively. The model was evaluated in two distinct applications. In the first, using multivariate datasets from 70 real-world electric vehicle (EV) trips, TS-MSDA U-Net achieved a mean absolute error below 1% across key parameters, including battery state of charge, voltage, acceleration, and torque—representing a two-fold improvement over the baseline TS-p2pGAN. While dual-attention modules provided only modest gains over the basic U-Net, the multiscale design enhanced overall performance. In the second application, the model was used to reconstruct high-resolution signals from low-speed analog-to-digital converter data in a prototype resonant CLLC half-bridge converter. TS-MSDA U-Net successfully learned nonlinear mappings and improved signal resolution by a factor of 36, outperforming the basic U-Net, which failed to recover essential waveform details. These results underscore the effectiveness of transformer-inspired U-Net architectures for high-fidelity multivariate time series modeling in both EV analytics and power electronics. Full article

Multi-fingered dexterous hands provide superior dexterity in complex manipulation tasks due to their high degrees of freedom (DOFs) and biomimetic structures. Inspired by the anatomical structure of human tendons and muscles, numerous robotic hands powered by pneumatic artificial muscles (PAMs) have been created to replicate the compliant and adaptable features of biological hands. Nonetheless, PAMs have inherent nonlinear and hysteresis behaviors that create considerable challenges to achieving real-time control accuracy and stability in dexterous hands. In order to address these challenges, this paper proposes a hierarchical control architecture that employs a fuzzy PID strategy to optimize the nonlinear control of pneumatic artificial muscles (PAMs). The FPGA-based hardware integrates a multi-channel digital-to-analog converter (DAC) and a multiplexed acquisition module, facilitating the independent actuation of 20 PAMs and the real-time monitoring of 20 joints. The software implements a fuzzy PID algorithm that dynamically adjusts PID parameters based on both the error and the error rate, thereby effectively managing the nonlinear behaviors of the hand. Experimental results demonstrate that the designed control system achieves high precision in controlling the angle of a single finger joint, with errors maintained within ±1°. In scenarios involving multi-finger cooperative grasping and biomimetic motion demonstrations, the system exhibits excellent synchronization and real-time performance. These results validate the efficacy of the fuzzy PID control strategy and confirm that the proposed system fulfills the precision and stability requirements for complex operational tasks, providing robust support for the application of PAM-driven multi-fingered dexterous hands. Full article

The inherent non-ideal characteristics of circuit components and inter-channel mismatch errors induce nonlinear amplitude and phase distortions in time-interleaved pipelined analog-to-digital converters (TI-pipelined ADCs), significantly degrading system performance. Limited by prior modeling, conventional digital calibration methods only correct partial errors, while machine learning (ML) approaches achieve comprehensive calibration at a high computational cost. This work proposes an ensemble calibration framework that combines polynomial modeling and ML techniques. The ensemble calibration framework employs a two-stage correction: a learned Volterra front-end performs forward mapping to compensate static baseline nonlinear distortions, while a lightweight neural network back-end implements inverse mapping to correct dynamic nonlinear distortions and inter-channel mismatch errors adaptively. Experiments conducted on TI-pipelined ADCs show improvements in both the spurious-free dynamic range (SFDR) and signal-to-noise and distortion ratio (SNDR). It is noteworthy that in two ADCs fabricated using 40 nm CMOS technology, the 12-bit, 3000 MS/s silicon-validated four-channel TI-pipelined ADC exhibits SFDR and SNDR improvements from 35.47 dB and 35.35 dB to 79.70 dB and 55.63 dB, respectively, while the 16-bit, 1000 MS/s silicon-validated four-channel TI-pipelined ADC demonstrates an enhancement from 38.62 dB and 40.21 dB to 80.90 dB and 62.43 dB, respectively. Furthermore, a comparison with related studies reveals that our method achieves comprehensive calibration performance for wide-band inputs while substantially reducing computational complexity, requiring only 4.4 K parameters and 8.57 M floating-point operations per second (FLOPs). Full article

The application of oxygen sensors based on Tunable Diode Laser Absorption Spectroscopy (TDLAS) in the industrial field has received extensive attention. However, most of the existing studies construct detection systems using discrete devices, making it difficult to apply them in the industrial field. In this work, through the optimization of the sensor circuit, the size of the core components of the sensor is reduced to 7.8 × 7.8 × 11.8 cm³, integrating the laser, photodetector, and system control circuit. A novel integrated optical path design is proposed for the optical mechanical structure, which enhances the structural integration and long-term optical path stability while reducing the system assembly complexity. The interlocking design of the laser-driven digital-to-analog converter (DAC) and photocurrent acquisition analog-to-digital converter (ADC) reduces the requirements of the harmonic signal extraction for the system hardware. By adopting a high-precision ADC and a high-resolution pulse-width modulation (PWM), the peak-to-peak value of the laser temperature control noise is reduced to 2 m°C, thereby reducing the detection noise of the sensor. This oxygen detection system has a minimum response time of 0.1 s. Under the condition of a 0.5 m detection optical path, the Allan variance shows that when the integration time is 5.6 s, the detection limit reaches 53.4 ppm, which is ahead of the detection accuracy of similar equipment under the very small system size. Full article

To enhance the resolution of shallow geological structure detection, this study developed a Controlled-Source wide frequency range Magnetotelluric Detector (called CSUMT) with a frequency range spanning from 1 Hz to 1 MHz, and conducted systematic field experiments in Fengxian County, Shaanxi Province. The CSUMT system employs a high-precision 24-bit analog-to-digital converter and is compatible with both inductive magnetic sensors and superconducting quantum interference device (SQUID) magnetic sensors, featuring wide bandwidth and high dynamic range. Comparative experiments with the commercial V8 instrument demonstrated high consistency in electric field, magnetic field, and apparent resistivity measurements, confirming the CSUMT system’s reliability in field applications. In addition, this study compared the performance of inductive and SQUID magnetic sensors in actual surveys, revealing that SQUID sensors exhibit lower noise and more stable data output, making them suitable for signal detection across a broader frequency range. The results validate the practicality of the CSUMT system in complex geological environments and provide experimental support for the appropriate selection of magnetic sensors. Full article

As the primary electronic payload of laser interferometry system for space gravitational wave detection, the core function of the phasemeter is ultra-high precision phase measurement. According to the principle of laser heterodyne interferometry and the requirement of 1 pm ranging accuracy of the phasemeter, the phase measurement noise should reach 2π μrad/Hz^1/2@(0.1 mHz–1 Hz). The heterodyne interference signal first passes through the quadrant photoelectric detector (QPD) to achieve photoelectric conversion, then passes through the analog-to-digital converter (ADC) to achieve analog and digital conversion, and finally passes through the digital phase-locked loop (DPLL) for phase locking. The sampling timing jitter of the heterodyne interference signal caused by the ADC is the main noise affecting the phase measurement performance and must be suppressed. This paper proposes a sampling timing jitter noise suppression system (STJNSS), which can set system parameters for high-frequency signals used for inter-satellite clock noise transmission, the system clock of the phasemeter, and the pilot frequency for suppressing ADC sampling timing jitter noise, meeting the needs of the current major space gravitational wave detection plans. The experimental results after the integration of SJNSS and the phase meter show that the phase measurement noise of the heterodyne interferometer signal reaches 2π μrad/Hz^1/2@(0.1 mHz–1 Hz), which meets the requirements of space gravitational wave missions. Full article

With increasing complexity and the demand for electronic components, evaluation boards that allow the customer to assess the components themselves are required. However, the evaluation boards are normally tested manually, and manual testing methods have challenges in terms of time efficiency, human error, and scalability. Therefore, we formulated an automated testing system based on robotic process automation (RPA) to address the issues. The system integrates RPA with existing testing hardware for high-speed analog-to-digital converter (ADC) evaluation boards to simplify processes of configuration, data logging, and the analysis of key parameters such as the signal-to-noise ratio full scale (SNRFS) and spurious-free dynamic range (SFDR). The current hardware setup was modified for automation to develop an RPA-based software solution for efficient testing, and its performance was compared with traditional methods in terms of time and repeatability. A marked improvement in test time efficiency was observed, with a reduction of up to 69.68% for inexperienced operators and 41.4% for experienced ones. The RPA-based method demonstrated a high accuracy (99.9603%) and repeatability, with minimal variance between test runs. The system provides an efficient and cost-effective test process that minimizes human intervention. This reduces process complexity for evaluation board functional testing, providing an effective solution to meet the growing demands of electronic components. Full article