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Electronics
Special Issues
Design of Low-Voltage and Low-Power Integrated Circuits, Volume 2
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Design of Low-Voltage and Low-Power Integrated Circuits, Volume 2

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 August 2026 | Viewed by 703

Editors

Dr. Nabil Yassine

E-Mail Website
Guest Editor
School of Engineering, Computing and Mathematics, Oxford Brookes University, Oxford OX3 0BP, UK
Interests: biomedical engineering; autonomous vehicle navigation systems; electric powertrain control systems; battery management systems; machine learning
Special Issues, Collections and Topics in MDPI journals
Dr. Abdallah Tammam

E-Mail Website
Guest Editor
School of Engineering, Computing and Mathematics, Oxford Brookes University, Oxford OX3 0BP, UK
Interests: biomedical engineering; autonomous vehicle navigation systems; radio frequency circuits
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Khaled Hayatleh

E-Mail Website
Guest Editor
School of Engineering, Computing and Mathematics, Oxford Brookes University, Oxford OX3 0BP, UK
Interests: analogue circuits and systems; biomedical engineering; autonomous vehicle navigation systems; radio frequency circuits
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues, 

This Special Issue focuses on advancing the research of low-voltage and low-power integrated circuits. This area of research is becoming increasingly important in several industries. From the medical and biomedical industries, where we rely increasingly on portable and wearable devices for healthcare monitoring, to the reliance on battery-powered devices and their respective management systems, such as in the automotive and smartphone industries. 

This Special Issue’s scope includes analogue and digital circuits focusing on improving accuracy, reliability, and signal-to-noise ratio while operating at low power. The purpose of this Special Issue is to consolidate the state-of-the-art research in low voltage and low power integrated designs. Below are the following topics to be covered: 

  • Novel designs of low-voltage and low-power integrated analogue and digital circuit designs;
  • Analogue-to-digital converters;
  • Digital-to-analogue converters;
  • Low-voltage and low-power circuits for IoT applications;
  • Low-voltage circuit designs for battery management systems (BMS);
  • Low-voltage and low-power circuit designs for biomedical and medical applications;
  • Low-power designs for sensors;
  • Low-power operational amplifier circuits;
  • Low-power bandgap reference circuits;
  • Low-power DC-DC Converters;
  • Low-power energy harvesting systems;
  • Low-power control systems.

Dr. Nabil Yassine
Dr. Abdallah Tammam
Prof. Dr. Khaled Hayatleh
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 250 words) can be sent to the Editorial Office for assessment.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-anonymized peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • low voltage
  • low power
  • IoT
  • biomedical
  • medical
  • amplifiers
  • analogue
  • digital
  • integrated circuits
  • SNR
  • BMS
  • control
  • converters
  • energy harvesting

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Related Special Issue

Published Papers (1 paper)

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Research

18 pages, 5091 KB  
Article
A Fast-Locking PLL Using Low-Power Cycle Slippage Compensation and Accumulated Phase Error Correction
by Phuoc B. T. Huynh, Gyeong-Seok Lee and Tae-Yeoul Yun
Electronics 2026, 15(10), 1999; https://doi.org/10.3390/electronics15101999 - 8 May 2026
Viewed by 371
Abstract
This article presents a fast-locking phase-locked loop (PLL) that incorporates a low-power extended phase frequency detector (LPEPFD) and a discriminator-aided phase detector (DAPD) to simultaneously address cycle slippage and frequency overshoot issues during frequency and phase acquisition, respectively. Specifically, the proposed LPEPFD introduces [...] Read more.
This article presents a fast-locking phase-locked loop (PLL) that incorporates a low-power extended phase frequency detector (LPEPFD) and a discriminator-aided phase detector (DAPD) to simultaneously address cycle slippage and frequency overshoot issues during frequency and phase acquisition, respectively. Specifically, the proposed LPEPFD introduces a novel finite state machine architecture that extends the linear range of a conventional PFD without requiring a power-hungry counter, thereby eliminating cycle slippage and reducing the time required for frequency acquisition while maintaining switching activity and power consumption comparable to those of the conventional design. Moreover, after frequency convergence, the DAPD quantizes the accumulated phase error, which is corrected by adaptively tuning the programmable delay lines without causing significant frequency overshoot seen in conventional PLLs, resulting in improved settling time. Fabricated using a 28 nm complementary metal oxide semiconductor (CMOS) process, the proposed fast-locking PLL occupies an area of 0.36 mm2 and operates over a frequency range of 2.6 to 3.2 GHz. Experimental results demonstrate a 0.84-μs settling time for a frequency hop from 2.6 to 3.1 GHz. The designed PLL consumes 5.6 mW of power from a supply of 1 V with an integral root-mean-square jitter of 1.27 ps from 1 kHz to 100 MHz. Full article
(This article belongs to the Special Issue Design of Low-Voltage and Low-Power Integrated Circuits, Volume 2)
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