State-of-the-Art High-Performance Computing and Networking

High-performance computing (HPC) plays an indispensable role in addressing many of the challenges of today’s society. From cancer fighting to astrophysics, supercomputers are used to solve extremely large problems in a reasonable time. As all fields of science evolve, more and more computational power is required to process the ever-increasing datasets. There are big challenges associated with all of the following three broad domains: hardware, software, and applications. Hardware support for exascales can be accomplished by increased energy-friendly heterogeneity (i.e., specialized resources). This heterogeneity is no longer exclusive to processing elements (e.g., CPUs and accelerators), as modern memory hierarchies tend to expose a variety of memory subsystems composed of different technologies. Another hardware-related challenge is the significant increase in the number of compute nodes compared with previous systems, which brings the potential for serious congestion problems because of the higher generated network traffic. These hardware-related challenges pose major implications in terms of all software layers, which tend to be under a heavier burden to hide the complexity of managing the hardware resources from the programmer.

This Special Issue “State-of-the-Art High-Performance Computing and Networking” aims to publish novel research related to all levels of HPC. Submissions are expected to focus on computing and/or networking aspects of current and emerging HPC platforms. Review articles are also welcome.

Topics of interest include, but are not limited to, the following:

• Applications
• Programming models, runtime systems, and compiler support
• System software
• Performance tools
• Computer architecture
• Network architecture and HPC protocols

Prof. Dr. Antonio J. Peña
Prof. Dr. Pedro Valero-Lara
Guest Editors

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