PVPh/PMMA-ZrO₂ Hybrid Gate Dielectric for Flexible CdS TFTs

Abstract

The development of flexible thin-film transistors (TFTs) is crucial for the advancement of wearable electronics, bendable displays, and the Internet of Things (IoT). A key challenge in this field is the fabrication of high-performance gate dielectric layers that combine excellent electrical properties with mechanical robustness and low-temperature processability. In this work, we report flexible TFTs based on CdS and hybrid PVPh/PMMA-ZrO₂ as semiconductor and gate dielectric layers, respectively. The hybrid gate dielectric films were deposited on flexible PEN substrates via a facile spin-coating process at a low temperature of 150 °C. On the other hand, CdS layers were deposited through photo-assisted chemical bath deposition at room temperature. Both correspond to deposition methods in solutions, fulfilling the low-temperature condition. The electrical properties of the hybrid gate dielectric layers were characterized by using metal–insulator–metal (MIM) capacitors, which presented excellent insulating properties, low leakage current density and suitable gate capacitance for transistor operation. From the analysis of the electrical response of flexible TFTs, reliable device characteristics and key electrical metrics were extracted. Furthermore, the MIM and TFTs were tested under mechanical bending, demonstrating stable performance. The MIM capacitors showed outstanding mechanical stability, retaining low leakage and stable capacitance after 1000 bending cycles, with changes attributed to reversible interfacial charge redistribution rather than bulk degradation. Meanwhile the TFTs kept full electrical functionality under repeated bending and tight bending radii (down to 0.6 cm), demonstrating reasonable mechanical durability. These results validate the solution-processed PVPh/PMMA-ZrO₂/CdS system as a promising, mechanically robust platform for flexible electronics.

1. Introduction

In recent years, there has been a growing demand for the development of flexible, lightweight, and cost-effective electronic devices. This has accelerated research towards solution-processing fabrication techniques for the deposition of semiconductors and dielectrics layers in thin-film transistors (TFTs) [1,2,3]. Solution-processing techniques offer numerous advantages for the fabrication of flexible TFTs, including reducing manufacturing cost, compatibility with plastic substrates, and scalability of large-area deposition [4]. Unlike conventional vacuum-based deposition methods, solution-processing techniques such as sol–gel spin-coating and inkjet printing methods employ simple and low-cost equipment, delivering higher material utilization efficiency and significantly reducing overall production expenses [5,6]. In addition, these methods can be performed under mild conditions, including low temperatures, which is essential to avoid the thermal degradation of temperature-sensitive flexible substrates such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), commonly used in flexible electronic devices [7,8]. Moreover, solution processing offers excellent versatility for the deposition of diverse materials, including organic and inorganic semiconductors and inorganic, polymer, and hybrid dielectric layers [9,10,11,12].

A fundamental component in the performance of TFTs is the gate dielectric, as it strongly impacts the operating voltage, power consumption, and device stability [13]. Though organic dielectrics meet the processing requirements for flexible TFT gate dielectrics, their inherently low dielectric constant and high operating voltage limit their exploitation for high-performance TFTs [14,15]. On the other hand, despite their excellent insulating properties, the high processing temperatures and inherent brittleness of high-k metal oxide dielectrics make their integration into flexible electronics devices challenging [16,17,18,19,20]. To overcome these challenges, the synergistic combination of both types of dielectric materials has emerged as a promising alternative for gate dielectric applications in flexible devices. Organic–inorganic hybrid dielectrics can achieve the required mechanical flexibility and low-temperature processability of polymers (organic phase), with an enhanced dielectric constant delivered by the metal oxides (inorganic phase) [21,22,23,24]. These benefits have encouraged the development of hybrid gate dielectrics for TFTs. Representative hybrid dielectric systems include polymer matrices such as polymethyl methacrylate (PMMA), polyvinyl pyrrolidone (PVP), and poly 4-vinylphenol (PVPh) blended with high-k metal oxides such as TiO₂, ZrO₂, HfO₂, and Al₂O₃ [25,26,27,28,29,30,31,32]. These hybrid nanocomposites have demonstrated enhanced dielectric properties, positioning them as highly stable and promising dielectric candidates for TFT applications [33].

Solution processing of hybrid dielectrics provides additional advantages by enabling the facile blending of multiple organic and inorganic phases into a single hybrid dielectric layer with enhanced material properties. For example, the strategic combination of PMMA and PVPh results in an organic composite material that overcomes the individual performance limitations of each polymer, leading to tunable gate dielectrics for TFTs [34]. In this blend, the non-polar and linear molecular structure of PMMA provides excellent insulating properties, and it dilutes the concentration of hydroxyl groups of PVPhs. This disrupting ion conduction pathway significantly reduces gate leakage current and increases dielectric strength compared to pure PVPh. Additionally, the incorporation of PMMA helps passivate electron trap states associated with PVPhs, leading to a dramatic reduction in interfacial trap density, and improves the charge transport dynamics in TFTs. The blended dielectric offers superior surface morphology, smoother films, more flexibility, and more pinhole-free films than pure PVPh films. Such surface features are essential for high-quality semiconductor growth and the formation of an excellent dielectric/semiconductor interface, which result in a steeper subthreshold swing and higher charge carrier mobility, and can even enable n-type or ambipolar operation in semiconductors that are typically restrained to p-type behavior on pure PVPh. Furthermore, since PVPh has one of the highest dielectric constant values (∼4.5) among the dielectric polymers, this polymer blend allows for an increase in k to values higher than those of pristine PMMA (∼3.5). This directly impacts the capacitance of the gate dielectric and therefore the transistor’s current output, which is a key factor in the device performance [35]. Therefore, the PVPh/PMMA blend constitutes an organic gate dielectric material, whose properties can contribute to the exceptional reliable device performance required for advanced flexible electronic applications.

Based on the benefits of the PVPh/PMMA blend, we report here its use as the organic phase in an organic–inorganic hybrid dielectric system incorporating zirconium dioxide (ZrO₂) as the inorganic phase for flexible TFT applications. ZrO₂ is a high-k dielectric material (~25) with a wide band gap (~5.1–5.9 eV) and excellent thermodynamic stability [36,37]. The resulting PVPh/PMMA-ZrO₂ hybrid system leverages both classes of dielectric materials, combining the mechanical flexibility, low processing temperature, and appropriate interfacial properties of the polymer phase with the high gate capacitance density, low leakage current and smooth surface morphology of the ZrO₂. Additionally, hybrid dielectric materials are compatible with a wide range of metal oxides and chalcogenide-based semiconductors and demonstrate significant electrical performance in TFTs. Recently, chalcogenide semiconductors, such as CdS, PbS, and CdSe, have gained attention as a window layer in solar cells or active layer in LEDs and TFT devices [38,39,40,41]. Among them, CdS is considered a great choice as an active layer in TFTs due to its ease of deposition through chemical bath deposition (CBD). The CBD process typically occurs at low temperatures (60–90 °C), making it highly compatible with flexible plastic substrates. Moreover, as a semiconductor, CdS inherently performs reliable n-type conductivity, capable of achieving high electron mobility (1–10 cm²/V·s) and strong electrical switching speed with on/off current ratios of up to 10⁶ [42,43,44].

In this work, we first report on the synthesis process of hybrid films and analyze their properties. The PVPh/PMMA-ZrO₂ hybrid gate dielectric was selected due to its simple and low-temperature solution process, which permits deposition on flexible PEN/ITO substrates, where ITO (Indium tin oxide) plays the role of the device’s common bottom gate [45,46]. The hybrid thin films were prepared from sol–gel precursor solutions through a spin-coating process followed by thermal annealing at a low temperature of 150 °C. To assess their dielectric performance, flexible MIM capacitors were fabricated and electrically analyzed. To further demonstrate the feasibility of PVPh/PMMA-ZrO₂ hybrid thin films as a gate dielectric layer, bottom-gate solution-processed flexible TFTs were fabricated with CdS, deposited through photo-assisted CBD at room temperature, and utilized as the semiconductor channel layer. This fully solution-processed approach significantly reduces fabrication complexity and cost while maintaining compatibility with low temperatures, marking a significant step towards scalable high-performance flexible electronics.

2. Materials and Methods

2.1. Preparation and Characterization of Hybrid Dielectric

The PVPh/PMMA-ZrO₂ hybrid dielectric layers were prepared using precursor solutions, obtained by separately mixing organic and inorganic solutions. All chemicals and reagents mentioned below were purchased from Sigma-Aldrich (St. Louis, MO, USA), unless otherwise specified. The PMMA phase was obtained through the in-situ polymerization of methyl methacrylate (MMA, MW = 100.1 g/mol, ρ = 0.936 g/mL), prepared at a monomer concentration of 0.180 M, which corresponds to the concentration of repeat units. Benzoyl peroxide was used as the initiator under magnetic stirring at 60 °C for 60 min. The PVPh solution was prepared by dissolving 10 mM PVPh (MW = 11,000 g/mol) in propylene glycol monomethyl ether acetate (PGMEA) as a solvent. Simultaneously, 1 mM of the cross-linker polymelamine-co-formaldehyde (PMF) was added to this solution to reduce the hydroxyl group concentration, and the final solution was stirred for 6 h under ambient temperature. The final organic phase of the PVPh/PMMA solution was obtained by mixing the PMMA and PVPh solutions at equal volumes (50/50 v/v%) and stirring for one hour to obtain a homogeneous solution. The inorganic ZrO₂ solution was prepared using zirconium chloride (ZrCl₄, 99.99%) as a precursor. A 0.2 M solution of ZrCl₄ in ethanol (99.99% J. T. Baker, Phillipsburg, NJ, USA) was mixed, and nitric acid (HNO₃, 65% J. T. Baker, Phillipsburg, NJ, USA) and deionized water (DI) were added sequentially to achieve a final molar ratio of 1:100:10:10. The solution was then agitated at 60 °C for 4 h to promote hydrolysis and condensation, forming the inorganic network. Finally, the hybrid precursor solution was obtained by mixing the organic and inorganic solutions in equal volumes (50/50 v/v%) and stirring for 6 h at room temperature to ensure homogenization. The precursor molar ratios in the hybrid system are PVPh:PMMA:ZrO₂ ≈ 10 mM:180 mM:200 mM, and when normalized to Zr, the molar ratio is PVPh:PMMA:ZrO₂ ≈ 0.05:0.90:1.

The deposition of PVPh/PMMA-ZrO₂ hybrid dielectric films was performed by spin-coating at 5000 rpm for 30 s onto ITO-coated PEN flexible substrates. Subsequent processing involved drying the wet-gel films at 100 °C for 5 min on a hot plate for removal of residual solvent, followed by thermal annealing at 150 °C for 3 h in air to induce cross-linking and densification. The resulting hybrid films were uniform, transparent, and adhered very well to the substrate. Their chemical bonding, optical characteristics, and surface morphology were analyzed using FTIR, UV-Vis spectroscopy, and AFM. For the evaluation of the dielectric properties, metal–insulator–metal (MIM) capacitors were assembled with hybrid layers as insulators. For this, after deposition, circular gold top contacts were evaporated onto hybrid films. Capacitance versus frequency and current versus voltage measurements were performed to obtain dielectric constant and leakage current characteristics.

2.2. Fabrication and Characterization of CdS-Based Flexible TFTs

For CdS TFT fabrication, all chemicals and reagents used for the CdS chemical bath deposition were purchased from J.T. Baker (Phillipsburg, NJ, USA), unless otherwise specified. The reaction bath for the chemical bath deposition solution (CBD) process was prepared in a 50 mL beaker through the sequential addition of 7.5 mL of 0.05 M CdCl₂ (cadmium chloride), 7.5 mL of 0.5 M C₆H₅O₇Na₃O₇.2H₂O (sodium citrate), 2.5 mL of 0.5 M KOH, 2.5 mL of a pH 10 borate buffer, and 3.75 mL of 0.5 M CS(NH₂)₂ (thiourea). The solution was diluted to make a total volume of 50 mL using DI water. The CdS semiconductor layer was deposited onto hybrid dielectric layers using the photo-assisted CBD process at room temperature for 4 h to obtain the desired film thickness [47,48]. For this, the reaction solution was irradiated with a 313 nm UV lamp during the film deposition [42]. Finally, to complete the bottom-gate flexible CdS-based TFT fabrication process, patterned Au source and drain contacts, with channel dimensions of 250 μm (width) and 80 μm (length), respectively, were evaporated through a shadow mask via thermal evaporation. The electrical response of the assembled flexible TFTs was analyzed using current versus voltage, output and transfer characteristics measured with a 4200 Keithley (Solon, OH, USA) semiconductor parameter analyzer. Figure 1 shows the schematic illustration of the CdS TFT fabrication process.

3. Results

3.1. PVPh/PMMA-ZrO₂ Hybrid Layers Characteristics

The formation of the hybrid cross-linked organic and inorganic phases at the molecular scale was corroborated by FTIR analysis. Figure 2a shows the FTIR spectra of the PVPh/PMMA-ZrO₂ hybrid dielectric film in the wavenumber range from 400 to 4000 cm⁻¹. Characteristic functional groups of the material’s organic constituents are clearly identified in the FTIR spectrum. The most intense broad band at 3350 cm⁻¹ is associated with hydroxyl (-OH) stretching vibration modes. These groups originate from the incomplete condensation of the inorganic phase during the sol–gel processing and/or from the tail of PMF molecules used for the cross-linking of the PVPh phase. The narrow band at 2930 cm⁻¹ is assigned to the asymmetric stretching vibrations of -CH₂ groups in the PVPh/PMMA copolymer [49,50]. A small shoulder at 1770 cm⁻¹, characteristic of the PMMA phase, is correlated with C=O carbonyl stretching. The presence of PVPh is confirmed by peaks at 1625 cm⁻¹ (C-C), 1340 cm⁻¹ (C-OH), and 1075 cm⁻¹ (C-O) [51]. Furthermore, the cross-linker PMF is identified by its distinctive peaks at 1536 cm⁻¹ and 1170 cm⁻¹, corresponding to aromatic C=N and branching C-N stretching vibrations, respectively [52]. Thus, the FTIR analysis confirmed the presence of all organic components and the cross-linker. Regarding the inorganic phase, the characteristic Zr-O stretching vibration, which typically appears below 700 cm⁻¹, is observed as a weak peak below 500 cm⁻¹ due to the detection limit of the instrument at low wavenumbers. This, along with the O-H signal from the incomplete condensation of the inorganic phase, provides definitive evidence of the formation of an inorganic phase in the hybrid network. Furthermore, there is another weak signal at 1030 cm⁻¹ attributed to Zr-O-C groups. This not only confirms the presence of the inorganic phase but also provides direct evidence for molecular-scale cross-linking between the zirconia network and the polymer chains, consistent with findings from similar PVPh–zirconia hybrid systems [53].

The optical properties of the hybrid films were characterized by measuring their transmission (T) and reflection (R) spectra across the 240–1600 nm wavelength range, as shown in Figure 2b. A key finding is the high transparency of the films, which display an average transmittance of approximately 86% in the visible spectrum (380–750 nm), with a corresponding average reflectance of about 8.8%. The optical transmittance goes further to the IR region. Crucially, the sum of (T + R) is close to 100%, indicating negligible light scattering and absorption losses. This optically lossless behavior macroscopically validates the formation of a well-integrated hybrid network at the microscopic scale, with no significant phase separation. Atomic force microscopy (AFM) corroborates this structural homogeneity, as shown in Figure 3a, where the 5 × 5 μm² image displays a smooth and uniform surface with a very low roughness of 0.3 nm. The structural domains in the smooth, homogeneous surface observed in the AFM image are at the nanometric scale. The height profile of the horizontal line across the surface of the hybrid film shown in Figure 3b makes the hybrid surface smoothness more evident, with maximum and minimum heights separated by less than 1 nm. These surface microscopic features of the hybrid film surface are consistent, with no phase separation. The confluence of these high-transparency, low-scattering, and smooth-surface characteristics renders these hybrid films ideally suited for use as gate dielectrics with no appreciated agglomeration and very low root-mean-square (RMS) surface roughness. An RMS surface roughness value below 1 nm is highly encouraging for creating a high-quality dielectric/semiconductor.

The dielectric properties of the PVPh/PMMA-ZrO₂ hybrid layers were characterized using current–density–voltage (I–V) and capacitance–frequency (C-f) measurements from metal–insulator–metal (MIM) capacitors. Figure 4a presents the leakage current density as a function of the applied voltage (−5 V to 5 V). The hybrid films exhibit a low leakage current density slightly below 10⁻⁷ A/cm² at the maximum voltage. The I–V characteristic of the MIM device is asymmetric, with the minimum current shifted by −2.5 V. This shift is likely due to electron traps from oxygen defects and highly polarizable OH groups, which create an internal electric field [25]. The low leakage current values demonstrate that these hybrid dielectric layers are suitable for use as gate insulators in thin-film transistor fabrication. On the other hand, Figure 4b (left y-axis, red dots) shows the C-f measurements carried out on MIM capacitors from 1 kHz to 1 Mhz at 0 V applied voltage. It is observed that there is a decreasing trend in capacitance as the frequency increases, reflecting a dependence on the temporal response of the different polarization mechanisms in the hybrid dielectric layers. From the capacitance results, the dielectric constant of the hybrid layer was determined using the relation Ci = (ε₀ k)/d, where ε₀ is the vacuum permittivity, k is the dielectric constant, d represents the dielectric layer thickness and Ci is the capacitance per unit of area. Figure 4b (right y-axis, black dots) shows the dielectric constant of the hybrid dielectric layer as a function of frequency. The dielectric constant at 1 kHz is 5.4, which is quite appropriate for gate dielectric applications. To assess the mechanical stability of the gate dielectric and ITO/PEN substrate, the MIM flexible capacitors were also characterized before bending and after 1000 bending cycles. The results are shown in Figure 5. The leakage current density remained at comparable levels after bending (Figure 5a), showing only a slight reduction and a shift in the minimum current toward more negative voltages. Moreover, capacitance versus frequency measurements (Figure 5b) revealed a moderate decrease in capacitance density at low frequency, from approximately 19.5 nF/cm² (initial state) to ~17.5 nF/cm² at 100 Hz after 1000 bending cycles, while the capacitance at high frequency (≈1 MHz) remained essentially unchanged at ~15 nF/cm². These results suggest that mechanical bending primarily affects slow polarization processes or interfacial charge trapping and may be associated with mechanically induced redistribution of trapped charge in the electrode–dielectric interface.

3.2. Electrical Response of the CdS TFTs with PVPh/PMMA-ZrO₂ Hybrid Gate Dielectric

Leveraging the favorable dielectric properties of the PVPh/PMMA-ZrO₂ hybrid thin films for gate dielectric applications, we fabricated thin-film transistors (TFTs) using solution-processed (CBD) CdS as the channel layer. Both the dielectric and semiconducting layers were deposited via solution-based methods. The devices employed a bottom-gate, top-contact structure, as illustrated in Figure 1. The thickness of the dielectric gate and semiconductor layers were 260 and 150 nm, respectively. The electrical performance of these CdS-based TFTs is presented in Figure 6. The output I_DS versus V_DS curves are shown in Figure 6a. These curves were measured with a drain voltage (V_DS) swept from 0 to 10 V at gate voltage (V_GS) steps of 2 V (2 to 10 V) and exhibit classic n-type behavior. At low drain voltages, the drain current increases linearly, followed by a clear pinch-off and saturation at higher voltages. However, a rightward shift in the linear regime is observed, a characteristic often attributed to the presence of parasitic contact resistance at the source and drain electrodes, which reduces the effective voltage across the semiconductor channel.

The corresponding transfer characteristics (I_DS-V_GS), measured in the saturation region at V_DS = 8 V, are shown in Figure 6b (left y-axis). In this curve, the drain current at low voltage (off current) is around 10⁻⁹ A, increasing at higher voltages up to values of 10⁻⁴ A (on current), which corresponds to an Ion/Ioff ratio of 10⁵. The field-effect mobility (μ) and threshold voltage (V_T) of the devices were extracted from the transfer curves (Sqrt I_DS vs. V_GS; right y-axis of Figure 6b by fitting the data in the saturation regime to the standard equation I_DS = (W/2L) μ C (V_GS − V_T)², where W and L are the channel width and length, and C is the areal capacitance of the dielectric layer. The μ and V_T values were determined from the slope and the x-intercept of the extrapolated linear fit to the data, shown as the dashed line in the plot. A set of 10 devices was measured, and the average values of μ and V_T were 79 ± 17 cm²/V·s and 4.3 ± 0.9 V, respectively. Furthermore, the subthreshold swing, SS, of the devices was also determined from the transfer curves in the saturation regime using Equation (1):

$$SS={\displaystyle \frac{d{V}_{GS}}{dlog{I}_{DS}}}$$

(1)

An average SS value of 456 mV/dec ± 158 mV/dec was obtained from the set of measured devices. Also, based on this SS value, the interface trap density was estimated using the conventional subthreshold swing model, assuming negligible depletion capacitance, which is a common approximation for thin-film transistors. The interface trap density, Dit, was estimated using the following Equation (2):

$$D_{it}\approx {\displaystyle \frac{C}{q}}\left({\displaystyle \frac{SS}{\mathrm{l}\mathrm{n}\left(10\right)kT/q}}-1\right)$$

(2)

where T is the temperature, k is the Boltzmann constant, and q is the elementary charge. The D_it estimated value was 10¹² cm⁻¹eV⁻¹. All these device parameters indicate promising performance for flexible electronics. The high mobility, in particular, is notable for a solution-processed device. However, it is important to consider that the extracted mobility value may be influenced by contact effects.

The TFTs were also subjected to cyclic bending from 0 up to 700 cycles, and their transfer characteristics were recorded after mechanical stressing. The devices retained characteristic TFT operation throughout the bending tests, as observed in Figure 7a. While a gradual degradation was observed with an increasing number of bending cycles, the devices remained electrically functional. The apparent field-effect mobility decreased from approximately 79 cm²/V·s in the initial state to about 1 cm²/V·s after 700 bending cycles, while the threshold voltage exhibited only a modest shift from ~3.7 to ~3.8 V. In addition, the electrical response of the TFTs was evaluated under different bending radii of 1.25, 0.95 and 0.6 cm, as shown in Figure 7b. As observed, stable transistor operation was maintained even at the smallest bending radius of 0.6 cm. Under this condition, the apparent mobility decreased from ~79 cm²/V·s (flat state) to ~20 cm²/V·s, while the on-state current decreased slightly but remained within the same order of magnitude. Notably, no significant threshold voltage shift was observed as a function of the bending radius. These results indicate that the ITO gate on PEN maintains electrical continuity and gate functionality during mechanical deformation, and that the hybrid dielectric/CdS TFT structure exhibits reasonable mechanical durability under repeated bending. The observed degradation is attributed to accumulated mechanical strain in the ITO/PEN substrate and at the dielectric/semiconductor interface. Further optimization of electrode materials and interfaces will be pursued in future work to improve mechanical endurance.

4. Discussion

4.1. Correlation of Hybrid Dielectric Properties and Performance

The electrical performance of the CdS-based TFTs can be attributed to the superior properties of the PVPh/PMMA-ZrO₂ hybrid gate dielectric. The optical, structural, and electrical characterizations collectively confirm the formation of a high-quality, well-integrated hybrid network. The high optical transparency (~86%) and the near-100% sum of transmittance and reflectance indicate an optically lossless film with minimal light scattering, which macroscopically suggests excellent morphological homogeneity. This is conclusively verified by AFM, which reveals an ultrasmooth surface with a root-mean-square (RMS) roughness of only 0.3 nm. This level of smoothness is critical, as it minimizes charge carrier scattering and trapping at the dielectric/semiconductor interface, which is a primary prerequisite for achieving high field-effect mobility. Furthermore, FTIR analysis provides definitive evidence of the molecular-scale integration between the organic and inorganic phases. The presence of the Zr-O-C vibration mode at 1030 cm⁻¹ is particularly significant, as it confirms covalent cross-linking between the zirconia network and the polymer chains. This cross-linked structure is fundamental in enhancing the mechanical robustness of the film and attenuating large-scale phase separation, which directly contributes to its excellent electrical integrity. The dielectric characterization further underscores the suitability of this material for TFT applications. The measured leakage current density below 10⁻⁷ A/cm² is sufficiently low to ensure that gate leakage does not compromise the switching characteristics of the TFT. The observed frequency dispersion in capacitance, a common trait in polymeric and hybrid dielectrics, is attributed to the contribution of various polarization mechanisms. The dielectric constant of 5.4 at 1 kHz is well suited for gate dielectrics, providing a strong capacitive coupling without the excessive electric fields that can lead to high leakage in very-high-k materials. The mechanical stability assessment of the flexible PVPh/PMMA-ZrO₂ hybrid dielectric capacitors demonstrated their robustness for flexible electronics. After 1000 bending cycles, the dielectric maintains a low leakage current, confirming its structural integrity and unaltered insulating properties. The accompanying minor shift in the current–voltage characteristic suggests that bending redistributes trapped charges at the electrode interface, modifying the internal electric field. Capacitance measurements reveal that bending selectively reduces low-frequency capacitance while leaving high-frequency capacitance unchanged. This indicates that mechanical stress does not damage the material’s fundamental bulk polarization but specifically impedes slower interfacial polarization mechanisms, likely by reorganizing trapped charges at interfaces. Overall, the dielectric exhibits excellent mechanical stability, with only minimal, reversible changes linked to interfacial charge dynamics, affirming its suitability for flexible thin-film transistors.

4.2. Analysis of Thin-Film Transistor Performance

The TFTs fabricated using this hybrid dielectric exhibited promising performance metrics. The high Ion/Ioff ratio of 10⁵ is a direct consequence of the low leakage current of the dielectric and the good semiconducting properties of the CdS channel, confirming the device’s excellent switching capability and potential for low-power applications. The extracted average field-effect mobility of 79 cm²/V·s is exceptionally high for a solution-processed TFT and is competitive with many devices fabricated on rigid substrates. We attribute this high mobility to two key factors: (1) the ultrasmooth interface between the hybrid dielectric and the CdS channel, which minimizes scattering centers, and (2) the high capacitance of the dielectric, which induces a high charge density in the channel at a given gate voltage. However, a critical analysis necessitates addressing the non-ideality observed in the output characteristics. The distinct rightward shift in the linear regime is a classic signature of significant parasitic contact resistance at the source/drain electrodes. This resistance causes a voltage drop that reduces the effective voltage across the channel, leading to an underestimation of the drain current in the linear region. Consequently, the standard saturation-region mobility extraction model, which does not account for the contact resistance, can overestimate the true channel mobility. Therefore, while the reported value of 79 cm²/V·s indicates outstanding performance, it likely represents an upper limit, and the actual channel mobility may be lower once contact effects are de-embedded. Furthermore, while the reported field-effect mobility (79 cm²/V·s) is relatively high for solution-processed CdS TFTs, it remains within the upper range reported for this material system in the literature. For example, Rao et al. [43] reported a mobility of 36.1 cm²/V·s in fully solution-processed CdS TFTs using a PVP-based hybrid gate dielectric, while in previous work we reported mobilities as high as 64.4 cm²/V·s in CdS TFTs employing a low-temperature Al₂O₃–GPTMS–PMMA hybrid dielectric [42]. Moreover, Weimer reported an evaporated CdS-TFT with mobilities of up to 140 cm²/Vs [54]. Thus, the extracted mobility of the CdS-based flexible devices remains representative of the high-performance regime achievable with the present material system. On the other hand, the positive, not so high, average threshold voltage of 4.3 V indicates normally off (enhancement-mode) operation, which is desirable for digital circuits to minimize power consumption in the off state. Taking as the metric of the threshold voltage variation its standard deviation, ± 0.9 V, we can say that this is acceptable, yielding values between 3.4 and 5.2 V. The origin of this positive V_T can be linked to the dielectric/semiconductor interface quality. The presence of electron traps, potentially arising from the hydroxyl groups identified in the FTIR analysis or from interface states, can pin the Fermi level and shift the V_T in the positive direction. The cyclic bending tests of the TFTs demonstrated promising mechanical durability while highlighting key degradation modes. The devices maintain full functionality throughout 700 bending cycles and down to a tight 1.2 cm radius, confirming the structural integrity of the ITO gate and the overall hybrid dielectric/CdS architecture. However, a significant, progressive degradation in performance is observed, most critically in the field-effect mobility, which drops drastically (from ~79 to ~1 cm²/V·s) over repeated bending. This suggests that accumulated mechanical strain primarily damages the charge transport pathway, likely at the dielectric/semiconductor interface or within the semiconductor layer itself. Notably, the threshold voltage remains remarkably stable under both cyclic and static bending, indicating minimal creation of new bulk traps in the dielectric or at the critical gate interface. The results therefore distinguish between two failure mechanisms: reversible strain-induced mobility reduction (seen in radius-dependent tests) and cumulative, irreversible damage from cyclic fatigue. This confirms the suitability of the design for flexible applications requiring moderate bending endurance, while clearly identifying the optimization of electrodes and interfaces as the primary path to achieving higher mechanical robustness.

5. Conclusions

This work makes an important contribution to flexible electronics by demonstrating high-performance, fully solution-processed thin-film transistors based on a novel PVPh/PMMA-ZrO₂ hybrid gate dielectric and a CdS semiconductor channel on flexible ITO/PEN substrates. The hybrid dielectric is a key innovation for achieving flexible devices, showing an ideal combination of properties, including high optical transparency, an ultrasmooth surface (0.3 nm roughness), low leakage current (<10⁻⁷ A/cm²), and a moderate dielectric constant (k~5.4), which are critical for effective gate operation. These characteristics enabled TFTs with excellent performance, notably a high Ion/Ioff ratio of 10⁵ and a large, extracted field-effect mobility of 79 cm²/V·s. However, the observed rightward shift in the output curves indicates that parasitic contact resistance is a significant factor, likely leading to an overestimation of the true channel mobility and presenting a key area for future improvement. Furthermore, the study provides a critical evaluation of mechanical robustness, showing that both the hybrid dielectric in MIM capacitors and the full TFTs retain functionality under bending stress and repeated bending, with performance degradation linked primarily to interfacial strain rather than bulk failure. Further work should focus on contact engineering through interface doping or alternative electrode metals, a detailed analysis of interface trap states to improve parameter uniformity and endurance, and the final transition of this promising material system to flexible substrates to validate its potential for next-generation, low-cost flexible electronics.