A Control Strategy for a Vienna Rectifier Under Phase-Lack Faults

Abstract

Aviation power systems require extremely high reliability. As a result, rectifiers must be capable of continuing operation during phase-lack faults, where the input voltage of one phase drops to zero. However, traditional fault-tolerant strategies often struggle to maintain effective control under these conditions. To address this issue, this paper proposes a single-phase control strategy specifically designed for the Vienna rectifier, a commonly used component in aerospace power systems. This strategy ensures a stable DC output during phase-lack faults while maintaining low total harmonic distortion and a near-unity power factor. Simulation results confirm the effectiveness of the proposed control method.

1. Introduction

With the rapid advancement of aviation technology and the continuous expansion of global transportation networks, the demand for air traffic has been steadily increasing, making the More Electric Aircraft (MEA) concept a key development trend in the aerospace field [1,2,3]. Meanwhile, both the quantity and power density of onboard electrical and electronic systems have been increasing, leading to a significant rise in the complexity of the aircraft power supply system. However, this evolution also brings new challenges [4,5,6].

The widespread adoption of power electronic converters, while improving energy utilization efficiency, inevitably causes harmonic distortions, voltage fluctuations, and phase imbalances, thereby deteriorating the overall power quality of the aircraft electrical network [7,8,9,10]. In this context, the Vienna rectifier, characterized by a high power factor, low harmonic distortion, high efficiency, and superior current quality, serves as an ideal solution for aircraft power conversion systems [11,12]. Compared with conventional diode rectifiers or three-level PWM rectifiers, the Vienna topology exhibits significant advantages in terms of the number of switching devices, the loss distribution, and thermal stress management [13,14]. It enables stable operation under stringent aerospace requirements, where high reliability and a lightweight design are equally emphasized. In particular, under harsh conditions such as high altitudes, wide-frequency variable power supply, and asymmetric load scenarios, the Vienna rectifier can still maintain excellent dynamic performance and stable voltage balance control [15,16] in airborne power systems, and high reliability has always been the primary design goal. Due to the safety-critical nature of onboard applications, when abnormal operating conditions occur—such as phase-lack faults, short circuits, grid voltage asymmetry, or line disconnections—the rectifier is required not only to maintain basic energy transmission but also to ensure balanced input currents and stable DC bus voltage [11,17].

This imposes stringent requirements on the control performance of power electronic converters. In particular, for the Vienna rectifier, which is widely used in MEA power systems, achieving a balance between fault-tolerant capability and dynamic performance under the constraints of high power density and lightweight design has become a critical challenge. In various abnormal operating conditions, a short circuit is typically easy to detect and handle due to pronounced current surges and clearly triggered protection actions [18,19]. In contrast, open-circuit and phase-lack faults exhibit more subtle characteristics, primarily affecting the performance of the rectifier rather than directly activating protective mechanisms. Notably, in practical operation, the occurrence probability of the open circuit can reach approximately 34% [20], while three-phase unbalanced conditions are also commonly observed in aircraft power systems [21,22,23]. However, research on phase-lack control remains relatively limited.

Common fault-tolerant strategies can be categorized into two primary approaches: The first aims to enhance system redundancy through hardware upgrades [18,19]. The second approach, in contrast, utilizes advanced digital control algorithms for effective fault detection and compensation [24,25,26,27,28]. In practical engineering applications, most fault-tolerant schemes favor digital control strategies. This tendency reduces the need for extensive hardware expansion and simplifies system processes. Within these digital control frameworks, modulation strategies generally fall into two key types: Space Vector Pulse-Width Modulation (SVPWM) and Carrier-based Pulse-Width Modulation (CB-PWM) [24,25]. Furthermore, research has demonstrated that fault-tolerant operations can be executed under the open-circuit conditions by adjusting the switching sequence of space vectors. Despite this, SVPWM encounters significant drawbacks in airborne power systems. Aircraft electrical networks typically operate at frequencies that are more than six times those of terrestrial grids. This requires converters capable of much higher switching frequencies. In such scenarios, the complex sector-identification and time-calculation processes inherent in SVPWM algorithms place a substantial computational load on real-time controllers. These complexities can constrain the achievable switching frequency. This compromises the effectiveness of SVPWM in high-frequency, lightweight, and reliability-critical aircraft power conversion systems. Consequently, CB-PWM has gained traction as an emergent focus in fault-tolerant control. This is due to its ease of implementation, control flexibility, and excellent adaptability to high-frequency environments. When compared to conventional SVPWM methods, CB-PWM significantly reduces both computational complexity and control delays. CB-PWM ensures exceptional current quality and stable neutral-point voltage. These benefits remain even at elevated switching frequencies. The advantages of CB-PWM position it as a superior choice for next-generation aircraft power systems [26,27,28].

In the event of the phase-lack fault, the Vienna rectifier can be regarded as an equivalent single-phase full-bridge Vienna rectifier, with the remaining two phases providing the line-to-line voltage as the input. Building on this observation, as reported in [29], the Vienna rectifier under the phase-lack scenario is treated as a single-phase topology for control design. However, because the proposed method in [29] uses SVPWM, as already discussed, it is less suited to aerospace power systems that require high switching frequencies and high reliability [30]. Based on current vector modulation, a model predictive current control strategy with an optimal modulation index was proposed, which effectively alleviates grid current distortion. Furthermore, ref. [31] introduced a model predictive direct power control method with dual-vector modulation for current-source rectifiers, mitigating power ripples. However, neither of these methods can be directly applied to voltage-source Vienna rectifiers, and both still inherit the inherent drawbacks of SVPWM.

To directly address the limitations noted above, this paper proposes a CB-PWM-based phase-lack control strategy that ensures fault-tolerant operation of the Vienna rectifier under phase-lack conditions while maintaining stable output voltage, THD, and PFC. The proposed phase-lack control strategy addresses the research gap in CB-PWM-based phase-lack control of the Vienna rectifier for aerospace applications, overcoming the computational burden of traditional SVPWM methods at high switching frequencies [32]. The third-harmonic injection method based on CB-PWM can effectively mitigate current zero-crossing distortion; however, this approach is not suitable for post-fault equivalent single-phase circuits.

The structure of this paper is organized as follows: First, the topology of the three-phase Vienna rectifier is introduced, and its operating characteristics under the phase-lack condition are analyzed in detail. Next, the proposed fault-tolerant control strategy is presented, followed by the derivation of the system’s mathematical model under fault conditions, which forms the basis for designing the corresponding controller. Finally, simulation and experiment results are provided to validate the effectiveness of the proposed control strategy.

2. Phase-Lack Analysis of Vienna Rectifiers

2.1. Basic Principle of Vienna Rectifiers

Figure 1 illustrates the circuit topology of a three-phase Vienna rectifier. The converter consists of six power switches ($S_{11},S_{12},S_{21},S_{22},S_{31},$ and $S_{32}$), two dc-link capacitors ($C_1$ and $C_2$), three input filter inductors ($L_a,L_b$, and $L_c$), and six rectifier diodes ($D_1\sim D_6$). $u_a,u_b,$ and $u_c$ are the three-phase input voltages, and $i_a,i_b,$ and $i_c$ are the three-phase input currents. The midpoint of the DC link is defined as O, and the voltages of the upper and lower capacitors are denoted as $u_{C1}$ and $u_{C2}$, respectively. A, B, and C are the nodes on the AC side. Through appropriate modulation and control strategies, the voltage balance between the two capacitors can be dynamically maintained [33].

Figure 1. Topology of the three-phase Vienna rectifier.

2.2. Phase-Lack Faults

The corresponding schematic diagram describing when a phase-lack fault occurs in phase A is shown in Figure 2.

Figure 2. Schematic diagram of a phase-A-lack fault.

The phase-lack fault causes a disruption of the current balance among the three phases, forcing $i_b$ to have the same magnitude but opposite direction as $i_c$. According to Figure 2, the current directions of phases B and C depend on the bidirectional switches $S_2$ and $S_3$, which consist of $S_{21}$, $S_{22}$, and $S_{31}$, and $S_{32}$, respectively. When the corresponding switches are turned on, the current flows along the solid lines; otherwise, it flows along the dashed lines. $S_2$ and $S_3$ have four possible switching states, namely $(0,0)$, $(0,1)$, $(1,0)$, and $(1,1)$. The voltages of phases B and C can be represented by the line voltage $u_s$. The equivalent circuit of the Vienna rectifier (ECVR) under the phase-lack condition is presented in Figure 3.

Figure 3. ECVR.

The operating states, based on the switching states of $S_2$ and $S_3$, of the ECVR during the positive and negative half-cycles of $u_s$ are illustrated in Figure 4.

Figure 4. Operating states.

During the positive half-cycle, the operating states are as follows:

• When $(s_2,s_3)=(0,0)$, $S_2$ and $S_3$ are turned off, diodes $D_2$ and $D_6$ are conducting, inductors $L_1$ and $L_2$ are discharging, capacitors $C_1$ and $C_2$ are charging, and $i_s$ is positive.
• When $(s_2,s_3)=(0,1)$, $S_3$ and $D_2$ are conducting; $L_1$ and $L_2$ are discharging; $C_1$ is charging, while $C_2$ is discharging; and $i_s$ is positive.
• When $(s_2,s_3)=(1,0)$, $S_2$ and $D_6$ are conducting; $L_1$ and $L_2$ are discharging; $C_1$ is discharging, while $C_2$ is charging; and $i_s$ is positive.
• When $(s_2,s_3)=(1,1)$, $S_2$ and $S_3$ are both conducting, diodes $D_2$ and $D_6$ are turned off, $L_1$ and $L_2$ are charging, $C_1$ and $C_2$ are discharging, and $i_s$ is positive.

During the negative half-cycle, the operating states are as follows:

• When $(s_2,s_3)=(0,0)$, $S_2$ and $S_3$ are turned off, diodes $D_1$ and $D_5$ are conducting, inductors $L_1$ and $L_2$ are discharging, capacitors $C_1$ and $C_2$ are charging, and $i_s$ is negative.
• When $(s_2,s_3)=(0,1)$, $S_3$ and $D_1$ are conducting; $L_1$ and $L_2$ are discharging; $C_1$ is discharging, while $C_2$ is charging; and $i_s$ is negative.
• When $(s_2,s_3)=(1,0)$, $S_2$ and $D_5$ are conducting; $L_1$ and $L_2$ are discharging; $C_1$ is charging, while $C_2$ is discharging; and $i_s$ is negative.
• When $(s_2,s_3)=(1,1)$, $S_2$ and $S_3$ are both conducting, diodes $D_1$ and $D_5$ are turned off, $L_1$ and $L_2$ are charging, $C_1$ and $C_2$ are discharging, and $i_s$ is negative.

Based on Figure 4, the voltage vectors of the three-phase Vienna rectifier under a phase-lack (phase A) fault are summarized in Table 1.

Table 1. Voltage space vectors of the ECVR.

Vector	$\mathbf{(}{\mathit{S}}_2,{\mathit{S}}_3\mathbf{)}$	${\mathit{u}}_{\mathit{Bo}}$	${\mathit{u}}_{\mathit{Co}}$	${\mathit{u}}_{\mathit{BC}}$
Positive half-cycle	(0, 0)	$U_{c1}$	$U_{c2}$	$U_o$
	(0, 1)	$U_{c1}$	0	$U_{c1}$
	(1, 0)	0	$U_{c2}$	$U_{c2}$
	(1, 1)	0	0	0
Negative half-cycle	(0, 0)	$-U_{c2}$	$U_{c1}$	$-U_o$
	(0, 1)	$-U_{c2}$	0	$-U_{c2}$
	(1, 0)	0	$U_{c1}$	$-U_{c1}$
	(1, 1)	0	0	0

$U_o$ represents the DC component of $u_o$. $U_{c1}$ and $U_{c2}$ denote the DC components of $u_{c1}$ and $u_{c2}$, respectively.

When $U_{C1}=U_{C2}$ and based on the previous analysis, the switching states $(s_2,s_3)=(0,1)$ and $(1,0)$ are completely symmetrical, with the inductors discharging in both cases. According to the operating principle of the boost converter, these states, together with the $(s_2,s_3)=(1,1)$ state, can be combined to construct a modulation method for the ECVR, enabling the inductors to complete a full charge–discharge cycle within a single switching period. Additionally, when $(S_2,S_3)=(0,0)$, the inductors are also in the discharging stage. Similarly, a modulation method can be constructed based on the combination of $(S_2,S_3)=(0,0)$ and $(S_2,S_3)=(1,1)$. These two modulation methods will be described in detail in the following sections.

Under normal operating conditions, the power factor $cos\phi =1$. Let the effective values of the three-phase input phase voltage and phase current be U and I, respectively. The time-domain expressions of the three-phase phase voltages are as follows:

$$\left\{\begin{array}{c}{u}_a=\sqrt{2}Ucos\omega t\hfill \\ u_b=\sqrt{2}Ucos(\omega t-{120}^{\circ })\hfill \\ u_c=\sqrt{2}Ucos(\omega t+{120}^{\circ })\hfill \end{array}\right.$$

(1)

The time-domain expressions of the three-phase phase currents are

$$\left\{\begin{array}{c}{i}_a=\sqrt{2}Icos\omega t\hfill \\ i_b=\sqrt{2}Icos(\omega t-{120}^{\circ })\hfill \\ i_c=\sqrt{2}Icos(\omega t+{120}^{\circ })\hfill \end{array}\right.$$

(2)

At this point, the total active power of the three-phase system is

$$P_3=3UI$$

(3)

After an open-phase fault occurs, the rectifier can only transmit energy through a single-phase circuit. To ensure stable power supply to the load, it is required that the power remains unchanged before and after the fault, and the unit power factor is maintained. Core Premise: After an open-phase fault, a fault-tolerant scheme using the line voltage of the remaining two phases for power supply is usually adopted (e.g., if phase a is open-circuited, the line voltage $u_{bc}$ of phases b and c is used as the single-phase input voltage $u_s$). In a symmetric three-phase system, the relationship between the effective value of the line voltage ($U_l$) and the effective value of the phase voltage (U) is

$$U_s=U_l=\sqrt{3}U$$

(4)

This formula is a basic relationship in symmetric three-phase sinusoidal circuits. By combining the power conservation condition $P_s=P_3$ (i.e., $U_s{I}_s=3UI$) and substituting $U_s=\sqrt{3}U$ into the equation, the expression for the effective value of the single-phase input current $I_s$ can be derived as follows:

$$I_s={\displaystyle \frac{3UI}{U_s}}={\displaystyle \frac{3UI}{\sqrt{3}U}}=\sqrt{3}I$$

(5)

Let the initial phase angle of the single-phase input voltage be $\theta$. Then the time-domain expressions of the ECVR is as follows:

$$\left\{\begin{array}{c}{u}_s=\sqrt{3}U·\sqrt{2}cos(\omega t+\theta )=\sqrt{6}Ucos(\omega t+\theta )\hfill \\ i_s=\sqrt{3}I·\sqrt{2}cos(\omega t+\theta )=\sqrt{6}Icos(\omega t+\theta )\hfill \end{array}\right.$$

(6)

Input power $P_{\mathrm{in}}$ and output power $P_{\mathrm{out}}$ of the ECVR are defined as follows:

$$\left\{\begin{array}{cc}\hfill P_{\mathrm{in}}& =u_{\mathrm{s}}{i}_{\mathrm{s}}=3U_{\mathrm{s}}{I}_{\mathrm{s}}+3U_{\mathrm{s}}{I}_{\mathrm{s}}cos(2\omega t+2\theta ),\hfill \\ \hfill P_{\mathrm{o}}& =U_{\mathrm{o}}{I}_{\mathrm{o}}+C_{\mathrm{o}}{U}_{\mathrm{o}}{\displaystyle \frac{d{u}_{\mathrm{o}}}{dt}}\hfill \end{array}\right.$$

(7)

where $I_o$ represents the DC components of the output current $i_{\mathrm{o}}$, with $C_o$ = $C_1{C}_2$/$(C_1+C_2)$. From (7),

$$\left\{\begin{array}{c}3U_{\mathrm{s}}{I}_{\mathrm{s}}=U_o{I}_o\hfill \\ 3U_{\mathrm{s}}{I}_{\mathrm{s}}cos\left(2\omega t\right)=C_o{U}_o{\displaystyle \frac{d{u}_o}{dt}}\hfill \end{array}\right.$$

(8)

Therefore, $u_o$ can be written as

$$u_o=U_o+{\displaystyle \frac{P_{\mathrm{o}}}{2\omega C_o{U}_o}}sin\left(2\omega t\right)$$

(9)

The amplitude of the second-harmonic component of the voltage ripple is given as

$$\Delta U_o={\displaystyle \frac{P_{\mathrm{o}}}{2\omega C_o{U}_o}}$$

(10)

3. Phase-Lack Modulation Method

Based on (10), when phase-lack fault occurs in a three-phase Vienna rectifier, the output voltage exhibit a second-order pulsation. Moreover, as the output power increases or if the circuit parameters are improperly designed, the amplitude of the output voltage’s ripple also increases. This may lead to the ripple valley falling below the peak of the input voltage. Since the Vienna rectifier inherently operates as a boost converter, such conditions may trigger unintended switching actions, thereby disturbing the input current waveform and causing significant current distortion. For instance, in Figure 4, when $(S_2,S_3)=(1,0)$ or $(0,1)$, the peak input voltage must remain lower than the voltage across $C_1$ or $C_2$ (both of which are necessarily below the output voltage), making such situations prone to occur. The schematic diagram is presented in Figure 5. $\Delta u_{C1}$ denotes the amplitude of the second-harmonic ripple of $u_{C1}$.

Figure 5. Input current distortion interval: (a) $U_{c}1<U_{B}Cmax$; (b) $U_{c}1>U_{B}Cmax$.

As illustrated in Figure 5a, the input voltage is divided into two operating intervals according to the capacitor voltage $u_{C1}$. When $u_{BC}<u_{C1}$, the system operates in interval II, corresponding to the time range $(0,t_1)$ or $(t_1,t_n/2)$. When $u_{BC}>u_{C1}$, it enters interval I, covering $(t_1,t_2)$. Within interval I, the relationship between $u_{BC}$ and $u_{C1}$ no longer satisfies the intrinsic voltage constraint of the Vienna rectifier, resulting in noticeable input current distortion. As $u_{C1}$ increases, the distortion interval gradually narrows. Once the output voltage’s ripple becomes tangent to the input voltage at $t=t_q$, the distortion region completely disappears, as depicted in Figure 5b. According to the preceding analysis, within interval II, the modulation can be implemented by alternately selecting the switching states $(S_2,S_3)=(1,1)$ and $(0,0)$, as illustrated in Figure 6. The red arrows in the figure indicate the direction of current flow, the below has the same meaning. Hereafter, this modulation method is referred to as MI for brevity.

Figure 6. Modulation method in interval I.

According to Figure 6, under the MI modulation scheme, the ECVR operates in only two distinct states: When $(S_1,S_3)=(1,1)$, $L_b$ and $L_c$ are charged. In the alternative operating state, when $(S_1,S_3)=(0,0)$, $L_b$ and $L_c$ are discharged. As a result, the operating mechanism is identical to that of a conventional boost converter. Therefore, the input voltage $u_{BC}$ must be less than the output voltage $u_o$, thus meeting the condition $u_{BC}<u_o$. As $u_o$ is also higher than $u_{C1}$ (or $u_{C2}$), interval I in Figure 5a becomes narrower, as depicted in Figure 7.

Figure 7. Input current distortion interval with MI.

It can be observed from Figure 7 that interval I occupies a shorter period than in Figure 5a. Therefore, the MII method can effectively mitigate the impact of output voltage ripples caused by a phase-lack fault on the input current, thereby improving the waveform quality of the input current under phase-lack conditions. The implementation of MI is shown in Figure 8.

Figure 8. Implementation of the MI modulation scheme.

Over several switching cycles, as displayed in Figure 8, the modulation waveform can be approximated as a straight line. The PWM signal is generated via a comparison with the carrier. When $u_m>u_C$ (the modulation signal), the PWM output is high; otherwise, it is low. As shown in Figure 6, $S_2$ and $S_3$ switch simultaneously, so their PWM signals are identical. From Figure 4, it can be seen that the modulation method composed of $(S_2,S_3)=(1,0)$ or $(0,1)$ and $(S_2,S_3)=(1,1)$ requires $u_{C1}$ (or $u_{C2})$ to be greater than $u_s$. Following this, compared with MI, this method requires a higher output voltage ($u_o$) and can therefore be applied when $u_o>u_s$, i.e., in region II. This modulation method, referred to as MII in this paper and illustrated in Figure 9, builds on the approach described above.

Figure 9. Modulation method in interval II.

By comparing Figure 9 with Figure 7, it is evident that, unlike MI, MII involves only a single switching action per cycle, which effectively reduces switching losses. Moreover, since $u_{BC}$ is lower during the inductor discharging phase, the input current ripple under MII is also diminished. Let the change in the input current during the inductor charging phase be $\Delta I_{s}c$. Using the volt-second characteristic of the inductor, $\Delta I_{s}c$ can be calculated separately for the MI and MII modes.

$$\left\{\begin{array}{cc}\hfill \Delta I_{sc}\left(\mathrm{MII}\right)& ={\displaystyle \frac{U_{C1}-U_{BC}}{D{T}_s}},\hfill \\ \hfill \Delta I_{sc}\left(\mathrm{MI}\right)& ={\displaystyle \frac{U_o-U_{BC}}{D{T}_s}}\hfill \end{array}\right.$$

(11)

The variation in the input current during the discharging stage is denoted as $\Delta I_{sd}$. Since the inductor’s current variation process is identical in both operating modes during this stage, its input current ripples are the same, as shown in (12).

$$\Delta I_{sd}\left(\mathrm{MI}\right)=\Delta I_{sd}\left(\mathrm{MII}\right)={\displaystyle \frac{U_{BC}}{(1-D)T_s}}$$

(12)

By combining (11) and (12), it can be observed that during the inductor discharge phase, the input current’s increment is larger under MI, whereas both modes exhibit identical charging increments. Consequently, the ECVR’s input current ripple is more pronounced under MI. The implementation of MI is shown in Figure 10. The modulation signal $u_m$ is compared with the carriers $u_{C2}$ and $u_{C3}$, and the resulting PWM signals are applied to $S_2$ and $S_3$, respectively.

Figure 10. Implementation of the MII modulation scheme.

In summary, when a single-phase fault occurs, The output voltage of the three-phase Vienna rectifier exhibits a double-frequency ripple, distorting the input current. The proposed modulation approach selects the appropriate modulation method based on the relative magnitudes of the input and output voltages, thereby effectively improving the quality of the input current waveform, as presented in Table 2.

Table 2. Proposed modulation strategy.

Modulation Approach	Interval	Operating Mode	Characteristic
MI	I ($u_{c1}<u_{BC}$)	$(1,1)\to (0,0)\to (1,1)$	reduce current distortion
MII	II ($u_{c1}>u_{BC}$)	$(1,1)\to (1,0)\to (1,1)\to (0,1)$	low input current ripple and low losses

4. Phase-Lack Control

4.1. Phase-Lack Mathematical Model

In Figure 9, the states $(S_2,S_3)=(1,0)$ and $(S_2,S_3)=(0,1)$ are symmetrical. Therefore, the equivalent circuit of the ECVR under MI and II is presented in Figure 11.

Figure 11. Equivalent circuits of the ECVR: (a) MI; (b) MII.

From Figure 11a, the state-space equation under MI can be expressed as

$$\left\{\begin{array}{cc}\hfill L{\displaystyle \frac{d{i}_s}{dt}}& =u_s-(1-D)u_c,\hfill \\ \hfill C{\displaystyle \frac{d{u}_c}{dt}}& =D{i}_s-{\displaystyle \frac{u_o}{R}}\hfill \end{array}\right.$$

(13)

The state-space equation under MII is given by (14) based on Figure 11b, where

$$\left\{\begin{array}{cc}\hfill L{\displaystyle \frac{d{i}_s}{dt}}& =u_s-(1-D)u_o,\hfill \\ \hfill C_o{\displaystyle \frac{d{u}_o}{dt}}& =D{i}_s-{\displaystyle \frac{u_o}{R}}\hfill \end{array}\right.$$

(14)

As derived from the previous analysis, $k_{1}C=C_o$ and $k_2{u}_c=u_o$ exhibit a linear correspondence. Hence, the control strategy can be developed solely based on (14). Then, the small-signal model of the ECVR is shown in (15).

$${\displaystyle \frac{d}{dt}}\left[\begin{array}{c}{\widehat{i}}_s\left(t\right)\\ {\widehat{u}}_o\left(t\right)\end{array}\right]=\left[\begin{array}{cc}0& -{\displaystyle \frac{1-D}{L}}\\ {\displaystyle \frac{D}{C_o}}& -{\displaystyle \frac{1}{R{C}_o}}\end{array}\right]\left[\begin{array}{c}{\widehat{i}}_s\left(t\right)\\ {\widehat{u}}_o\left(t\right)\end{array}\right]+\left[\begin{array}{cc}{\displaystyle \frac{1}{L}}& {\displaystyle \frac{U_o}{L}}\\ 0& {\displaystyle \frac{I_s}{C_o}}\end{array}\right]\left[\begin{array}{c}{\widehat{u}}_s\left(t\right)\\ \widehat{d}\left(t\right)\end{array}\right]$$

(15)

4.2. Controller Design

The Vienna rectifier is commonly regulated using a dual-loop control strategy, combining voltage and current loops based on average current control The relevant cited content has been deleted in the revised draft [34]. Based on the small-signal model in (15), the corresponding control block diagram of the ECVR is shown in Figure 12.

Figure 12. Control block diagram.

In Figure 12, $G_v$ and $G_i$ represent the voltage outer-loop and current inner-loop controllers, respectively. $u_{\mathrm{or}}$ and $i_{\mathrm{sr}}$ indicate the reference values for the output voltage and input current, respectively, while $u_L$ signifies the voltage across the inductor.

4.2.1. Inner Current Loop

The simplified control block diagram of the inner current loop is shown in Figure 13.

Figure 13. Block diagram of Inner current loop.

The inner current loop commonly employs a quasi-proportional-resonant controller. As a result, this enables zero steady-state error regulation for AC signals, as expressed in (16).

$$G_i\left(s\right)=k_{pi}+{\displaystyle \frac{2k_r{\omega }_{c}s}{s^2+2{\omega }_{c}s+{\omega }_0^2}}$$

(16)

where $k_{pi}$ is the proportional gain, $k_r$ is the resonant gain, ${\omega }_c$ represents the cutoff angular frequency, and ${\omega }_0$ denotes the resonant angular frequency corresponding to the 50 Hz grid voltage.

Let the PWM gain be unity, and let the controller parameters be set as $k_{pi}=2$, $k_r=998$, ${\omega }_c=0.5\mathrm{Hz}$, and ${\omega }_0=500\mathrm{Hz}$. Then, the open-loop Bode diagram of the inner current loop is illustrated in Figure 14.

Figure 14. Bode plot of the open-loop transfer function for the inner current loop.

In Figure 14, the current inner-loop transfer function exhibits a pronounced gain near the resonant frequency. At the crossover frequency $f_c$, the phase reaches ${91.2}^{\circ }$, yielding a phase margin of ${88.8}^{\circ }$, which is greater than the conventional stability threshold of ${45}^{\circ }$. Hence, the system is capable of maintaining stable regulation of the input current with zero steady-state error.

4.2.2. Outer Voltage Loop

Figure 15 depicts the simplified control block diagram of the outer voltage loop when the current inner loop achieving zero steady-state error regulation.

Figure 15. Outer voltage loop.

Since the controlled variable is a DC quantity, according to the internal model principle, the voltage outer loop $G_V$ can be implemented using a PI controller. From (8), the following relationship can be derived:

$${\displaystyle \frac{2\sqrt{3}{U}_{\mathrm{S}}}{U_{\mathrm{O}}}}{I}_{\mathrm{S}}=I_{\mathrm{DC}}$$

(17)

Neglecting the influence of output current disturbances, the closed-loop transfer function of the outer voltage loop is expressed as in (18).

$$\phi \left(s\right)={\displaystyle \frac{U_{\mathrm{o}}}{U_{\mathrm{or}}}}={\displaystyle \frac{k_{\mathrm{p}}s+k_{\mathrm{i}}}{DC{s}^2+k_{\mathrm{p}}s+k_{\mathrm{i}}}}$$

(18)

Here, $k_{\mathrm{p}}$ and $k_{\mathrm{i}}$ denote the proportional and integral gains of the PI controller, respectively, $D=\sqrt{3}{U}_{\mathrm{S}}/U_{\mathrm{O}}$. According to the standard second-order transfer function, the controller parameters can be obtained as

$$k_{\mathrm{p}}=2\zeta {\omega }_{n}DC,k_{\mathrm{i}}={\omega }_n^{2}DC.$$

(19)

where $\zeta$ is the damping ratio.

4.3. DC Capacitor Voltage-Balancing Control

Due to hardware tolerances and other variations, the DC capacitor voltages may become unbalanced. Therefore, the Vienna rectifier typically requires DC-link capacitor voltage-balancing control.

Let the voltage difference between $C_1$ and $C_2$ be denoted as $\Delta u$; then

$$u_{C1}-u_{C2}=\Delta u,u_{C1}+u_{C2}=U_o$$

(20)

Hence, the solution is

$$u_{C1}={\displaystyle \frac{U_o+\Delta u}{2}},u_{C2}={\displaystyle \frac{U_o-\Delta u}{2}}.$$

(21)

Therefore, by selecting $\Delta u$ as the control variable and setting its reference value to zero, we can balance $u_{c1}$ and $u_{c2}$. The implementation method is shown in (22). The control block diagram is depicted in Figure 16.

$${\displaystyle \frac{d(u_{c1}-u_{c2})}{dt}}=D{i}_s·{\displaystyle \frac{C_1-C_2}{C_1{C}_2}}-{\displaystyle \frac{u_o}{R}}·{\displaystyle \frac{C_2-C_1}{C_1{C}_2}}$$

(22)

Figure 16. Balance control loop.

Based on Figure 16, $k_c={\displaystyle \frac{C_2-C_1}{C_1{C}_2}}$.

In summary, the phase-lack control strategy of the three-phase Vienna rectifier is shown in Figure 17. The DSOGI-PLL method is employed to determine whether a phase-lack fault has occurred [35]. Based on this detection, the controller dynamically selects the appropriate control mode. A flag signal serves as the phase-lack indicator: when a phase-lack fault is detected, flag = 1, activating the fault-tolerant control scheme. Conversely, when flag = 0, the system operates under the normal three-phase $dq$ decoupling control strategy. There is no three-phase circuit under the phase-lack condition (taking phase A as an example). The voltage sampled from phase B and phase C is half of the line-to-line voltage, while the sampled voltage of phase A is zero.

$$u_{abcs}=\left[\begin{array}{c}{u}_{as}\\ u_{bs}\\ u_{cs}\end{array}\right]=\left[\begin{array}{c}0\\ {\displaystyle \frac{\sqrt{3}}{2}}{U}_m\angle \left(\theta +{\displaystyle \frac{\pi }{2}}\right)\\ {\displaystyle \frac{\sqrt{3}}{2}}{U}_m\angle \left(\theta -{\displaystyle \frac{\pi }{2}}\right)\end{array}\right]$$

(23)

where $U_m$ is the effective value of the input phase voltage. At this point, the positive and negative sequence voltage components on the d-axis are as follows:

$$u_{dp}={\displaystyle \frac{U_m}{2}},u_{dn}=-{\displaystyle \frac{U_m}{2}}$$

(24)

Figure 17. Phase-lack control strategy.

To determine a phase-lack fault, it is identified when the negative sequence component $u_{dn}$ exceeds 20 V and the positive sequence component $u_{dp}$ is less than 1.5 times $u_{dn}$ [29].

After an open-circuit fault occurs, to maintain constant output power and voltage, the system needs to switch from the normal operating condition to the fault-tolerant operating condition. However, restricted by the inherent slow response characteristic of the voltage outer loop, the dynamic transition process of the condition switch is relatively long. Therefore, it is necessary to introduce a feedforward compensation term to improve the response speed. The designed feedforward compensation term for the current inner loop is given by

$$i_{\mathrm{ff}}=(\sqrt{3}-1)I_L(u_{\mathrm{or}}-u_{\mathrm{o}})$$

(25)

where $I_L$ is the steady-state line current before the open-circuit fault, $u_{\mathrm{or}}$ denotes the reference output voltage, and $u_{\mathrm{o}}$ is the actual output voltage. When the system is stable, the output voltage deviation $u_{\mathrm{or}}-u_{\mathrm{o}}$ approaches zero, and the feedforward compensation term $i_{\mathrm{ff}}$ in (25) also tends to zero accordingly. At this point, the system can maintain stable operation by relying solely on the closed-loop control of the current inner loop.

5. Simulation

In this section, a three-phase Vienna rectifier model is established in MATLAB2016/Simulink to verify the effectiveness of the proposed phase-loss control strategy. The simulation parameters are summarized in Table 3.

Table 3. Simulation parameters.

Parameter	Symbol	Value
Input voltage	$u_{\mathrm{abc}}$	$110\sqrt{2}sin\left(1000\pi t\right)\mathrm{V}$
Inductance	$L_{\mathrm{a}},L_{\mathrm{b}},L_{\mathrm{c}}$	1 $\mathrm{mH}$
Capacitance (balanced)	$C_1=C_2$	50 $\mathsf{\mu }\mathrm{F}$
Switching frequency	$f_s$	10 $\mathrm{kHz}$
DC-link voltage	$u_o$	400 $\mathrm{V}$
Output power	$P_{\mathrm{out}}$	5000 $\mathrm{W}$

Figure 18 shows the simulation of phase-lack detection. An A-phase-lack fault occurs at $0.05\mathrm{s}$. At this moment, $u_{as}=0$, while $u_{bs}$ and $u_{cs}$ have opposite directions and are both set to 133 V. After a quarter of one fundamental period, the phase-lack detection module is triggered, and the flag signal changes from 0 to 1, indicating that the A-phase-lack fault has been successfully detected.

Figure 18. Phase-lack detection.

Figure 19 shows the simulation results for the input voltage, input current, and output voltage of the three-phase Vienna rectifier during a phase-lack fault under the proposed phase-lack control strategy. Before $t=0.05\mathrm{s}$, the Vienna rectifier operates under normal three-phase conditions, while after $t=0.05\mathrm{s}$, it enters the phase-lack state.

Figure 19. $u_{\mathrm{abc}}$, $i_{\mathrm{abc}}$, and $u_{\mathrm{o}}$ under the proposed phase-lack control strategy.

Under normal operating conditions, the three-phase currents $i_{\mathrm{abc}}$ are in phase with the corresponding voltages $u_{\mathrm{abc}}$, with a phase current amplitude of 37.2 A. The DC-link voltage $u_o$ remains nearly constant, with no low-frequency ripple observed. Under the phase-lack condition, the voltages $u_b$ and $u_c$ retain their original characteristics without any changes, while $u_a$ does not drop to zero but instead undergoes a phase shift and amplitude reduction, which are attributed to measurement-related factors. As can be seen from the enlarged view of Figure 19, the proposed phase-lack control strategy achieves an almost-zero dynamic adjustment time, exhibiting excellent control performance. After the fault occurs, the phase current $i_a$ decreases to zero, whereas $i_b$ and $i_c$ feature equal amplitudes but with opposite directions.

It can be observed from the simulation that the amplitudes of $i_b$ and $i_c$ increase to approximately $66.4\mathrm{A}$, which is about $\sqrt{3}$ times that under normal three-phase operating conditions, and the output power remains constant before and after the phase-lack fault. The output voltage presents a second-harmonic ripple with an amplitude of 78.3 V, which is in excellent agreement with the theoretical result derived from Equation (10).

Under the proposed phase-lack control strategy, the three-phase Vienna rectifier operates as a single-phase Vienna converter by using the DC-line voltage as its input after the phase-lack fault, as illustrated in Figure 20. $i_{\mathrm{s}}$ remains in phase with $u_{\mathrm{s}}$, indicating that the proposed control strategy can achieve effective power factor correction under single-phase operation.

Figure 20. $u_{\mathrm{s}}$ and $i_{\mathrm{s}}$ under the proposed phase-lack control strategy.

As shown in Figure 21, after a phase-lack fault occurs, the DC-link capacitors exhibit a voltage imbalance, that is, $u_{C1}\ne u_{C2}$. The average value of $u_{C1}$ is 239 V, with a ripple amplitude of 21.3 V, while $u_{C2}$ has an average value of 162 V and a ripple of 22.1 V. The ripple magnitudes of the two capacitors are nearly identical. When the proposed phase-lack control method is activated at $t=0.5\mathrm{s}$, the two capacitor voltages gradually converge after a short regulation period and eventually stabilize around 200 V, corresponding to half of the output voltage.

Figure 21. $u_{\mathrm{c}1}$ and $u_{\mathrm{c}2}$ under the proposed phase-lack control strategy.

When $u_{\mathrm{o}}$ is set to 200 V, the input current exhibits noticeable distortion, as depicted in Figure 22a, indicating deterioration in $i_{\mathrm{s}}$. The FFT analysis of the input current is presented in Figure 22b, where total harmonic distortion (THD) of $i_{\mathrm{s}}$ reaches 16.85%, with the third harmonic being dominant. The simulation results when MII is adopted are presented in Figure 23.

Figure 22. $i_{\mathrm{s}}$ without MI at $u_{\mathrm{o}}$ = 200 V: (a) $u_s$ and $i_s$; (b) FFT of $i_s$.

Figure 23. $i_{\mathrm{s}}$ with MI at $u_{\mathrm{o}}$ = 200 V: (a) $u_s$ and $i_s$; (b) FFT of $i_s$.

As shown in Figure 23a, when the MII control strategy is applied, the input current $i_{\mathrm{s}}$ maintains a sinusoidal waveform with negligible distortion. Meanwhile, Figure 23b illustrates that the third-harmonic component is significantly suppressed, resulting in the THD being reduced to 1.62%. Simulation results demonstrate that the proposed phase-lack control strategy can rapidly detect the phase-lack fault and smoothly transition the Vienna rectifier to single-phase operation. The strategy effectively maintains power factor correction performance and a stable DC output during faults, thereby enhancing the system’s fault tolerance and operational reliability.

6. Experiment

After completing simulation analysis and verifying its feasibility, we further perform experiments to verify and compare the simulation results. The power of the experimental platform is 5 kW, with a rated output current/voltage of 12.5 A/400 V, and the input voltage is $\sqrt{2}sin\left(1000\pi t\right)\mathrm{V}$. Table 4 lists the materials used in the experiment. It is worth noting that each powered semiconductor device consists of two devices connected in parallel to enhance current capability, whereas the remaining components are implemented as single devices.

Table 4. Experiment parameters.

Component	Model	Brand
Inductors $L_{\mathrm{a}},L_{\mathrm{b}},L_{\mathrm{c}}$	NPA092026	POCO
Capacitors $C_1=C_2$	228CB0094	KNSCHA
Diodes $D_1\sim D_6$	ASD30120P2	AnBon
MOSFETs $S_1\sim S_6$	IMZA65R027M1H	Infineon
Voltage Sensor	LV25-P	LEM
Current Sensor	LA55-P	LEM

Figure 24 presents the experimental results of $u_a$, $i_a$, and $u_o$ under the proposed phase-lack control strategy. When the phase-lack flag $\mathrm{flag}=1$, it indicates that the system has detected a fault. At $t_1$, under the proposed control strategy, the dynamic transient process of the system is almost negligible. It can be observed from the waveforms that a zero-crossing time difference exists between $u_b$ and $i_b$, denoted as $\Delta t=1.65\mathrm{ms}$. At the operating frequency of $f=500\mathrm{Hz}$, the corresponding phase difference can be calculated as

$$\Delta \phi ={360}^{\circ }\times f\times \Delta t={360}^{\circ }\times 500\times 1.65\times {10}^{-3}\approx {30}^{\circ }.$$

(26)

Figure 24. Experimental results: $u_{\mathrm{a}}$, $i_{\mathrm{a}}$, $u_{\mathrm{o}}$, and $Flag$ under the proposed phase-lack control strategy.

Therefore, the phase of $i_b$ leads that of $u_b$ by approximately ${30}^{\circ }$. Consequently, the input current $i_b$ remains in phase with the line voltage $u_{bc}$, confirming that the PFC function is maintained under the phase-lack condition. The amplitude of $i_b$ increases from 38.6 A to 65.7 A, which is approximately $\sqrt{3}$ times higher than previously described. Therefore, constant power operation is achieved under the phase-lack condition.

The experimental results of $u_{c1}$ and $u_{c2}$ are presented in Figure 25. In this experiment, the capacitances are set to $C_1=100\mathsf{\mu }\mathrm{F}$ and $C_2=50\mathsf{\mu }\mathrm{F}$. Under the proposed phase-loss control strategy, after a short transient process, $u_{c1}$ and $u_{c2}$ converge and overlap, with average values of approximately $200\mathrm{V}$. Moreover, both capacitor voltages exhibit a double-frequency ripple, which results in a second-order ripple component in the output voltage ($u_o$). After the capacitor voltages are balanced, the ripple amplitudes of $u_{c1}$ and $u_{c2}$ are $42.6\mathrm{V}$ and $53.3\mathrm{V}$, respectively. Consequently, the ripple voltage of $u_o$ is $95.9\mathrm{V}$. The discrepancy between the experimental and simulation results arises from the difference in capacitance values, since the equivalent capacitance in the simulation is $50\mathsf{\mu }\mathrm{F}$, whereas the equivalent capacitance in the experiment is 33.3 $\mathsf{\mu }\mathrm{F}$.

Figure 25. Experimental results: $u_{\mathrm{c}1}$ and $u_{\mathrm{c}2}$ under the proposed phase-lack control strategy.

Figure 26 shows the experimental results of the input current $i_b$ under MI and MII when $u_o=200\mathrm{V}$. It can be observed that, under the MII strategy, $i_{\mathrm{b}}$ exhibits noticeable distortion, whereas under the MI strategy, $i_{\mathrm{b}}$ presents a well-shaped sinusoidal waveform. In both cases, $i_{\mathrm{b}}$ remains in phase with the line voltage $u_{bc}$. The experimental results are in good agreement with the simulation results.

Figure 26. Experimental results: $i_{\mathrm{b}}$ under the MI and MI strategies when $u_{\mathrm{o}}$ = 200 V.

7. Conclusions

This paper proposes a phase-lack control strategy for the three-phase Vienna rectifier applied in aerospace power systems. The proposed strategy enables a smooth transition from three-phase operation to single-phase operation under the phase-lack conditions while maintaining low total harmonic distortion and power factor correction, as well as a stable DC voltage output in single-phase mode. However, due to the inherent characteristics of single-phase power transfer, the DC output voltage exhibits increased low-frequency ripples. Future work will focus on utilizing the idle bridge arm during phase-lack operation to mitigate this low-frequency ripple through control reconfiguration or energy compensation, thereby improving the system’s power quality and dynamic performance.