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27 August 2026

11 Pages

Transparent, Low-Hysteresis Complementary Inverters Using p-Channel SWNT and n-Channel IGZO TFTs for Light-to-Frequency Conversion

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and
1
Department of Information Display, Kyung Hee University, Seoul 02447, Republic of Korea
2
Department of Electronic Engineering, Incheon National University, Incheon 406-772, Republic of Korea
*
Authors to whom correspondence should be addressed.

Abstract

Transparent and stable complementary inverters that can simultaneously support analog amplification and digital oscillation under optical stimulation are highly demanded for future see-through optoelectronic systems such as smart windows, augmented-reality interfaces, and on-skin photonic sensors. In this work, we report fully transparent, low hysteresis complementary inverters composed of a p-channel single-walled carbon nanotube (SWNT) thin-film transistor (TFT) with a top-gate iCVD pC1D1 polymer dielectric and an n-channel indium–gallium–zinc oxide (IGZO) TFT with a bottom-gate Al2O3 dielectric, both fabricated on ITO-coated glass substrates. The two TFTs exhibit well-matched output characteristics in opposite carrier polarities, enabling a CMOS-like inverter operation that delivers rail-to-rail switching, high voltage gain and a small hysteresis of less than 200 mV between forward and reverse sweeps. Furthermore, the UV photoresponse of the IGZO channel allows for systematic modulation of the inverter switching voltage (VM) and small-signal gain with the incident UV intensity. Cascading the proposed inverter into three-, five-, and seven-stage ring oscillators yields stable rail-to-rail oscillation in which the oscillation frequency (fosc) and the power consumption (P = CL · VDD2 · fosc · N) are tunable in real time by the UV intensity, realizing transparent light-to-frequency conversion at the circuit level. These results establish a route to low-power, see-through optoelectronic logic platforms that combine carbon-nanotube and oxide-semiconductor technologies on a common transparent substrate.

1. Introduction

Complementary metal–oxide–semiconductor (CMOS) inverters constitute the most fundamental building block of digital logic and a key analog amplifier; their reliability, gain, and power-delay product dictate the performance ceiling of any integrated circuit (IC). Translating this functionality onto transparent, low-temperature substrates is a long-standing goal for see-through electronic systems such as smart windows, augmented-reality displays, transparent optical sensors, and skin-conformal photonic interfaces [1,2,3,4]. However, realizing a complementary inverter on such substrates requires two thin-film transistors (TFTs) of opposite carrier polarities with comparable mobility, threshold-voltage matching, and minimal bias-stress drift—a combination that has been difficult to achieve within a single semiconductor system [5,6,7].
Single-walled carbon nanotubes (SWNTs) are among the most attractive p-channel candidates for transparent TFTs because their random networks combine high hole mobility, intrinsic transparency in the visible region, and printability on plastic or glass substrates [8,9,10,11]. Conversely, amorphous indium–gallium–zinc oxide (a-IGZO) has emerged as the de facto n-channel oxide semiconductor for transparent backplanes due to its high electron mobility, large bandgap (∼3.2 eV), and well-established large-area manufacturability [12,13,14,15]. Heterogeneous integration of SWNT and IGZO TFTs is therefore a natural strategy to construct fully transparent CMOS-like inverters [16,17]. However, earlier demonstrations often suffered from severe hysteresis caused by the dielectric/semiconductor interface, mismatched output current ranges between the two polarities, and a lack of reproducible UV-responsive circuit-level operation.
Two design issues need to be resolved simultaneously. First, the dielectric must suppress the hysteresis of the SWNT channel to a negligible level across multiple sweep cycles; for this purpose, the initiated chemical-vapor-deposited (iCVD) (custom-built system, Republic of Korea) polymer dielectric (pC1D1, with a relative permittivity of εr ≈ 6.2) provides a conformal, low-trap interface particularly suited for top-gated SWNT TFTs [18]. Second, the n-channel oxide TFT must retain its intrinsic UV photoresponse so that the inverter switching voltage and the ring-oscillator frequency can be modulated optically. Plasma-enhanced atomic layer deposition (NCD Co., Ltd., Republic of Korea) Al2O3 on IGZO has been widely shown to preserve both the photoresponse and the bias-stress stability of oxide channels [19,20]. A comparison of the present work with previously reported low-dimensional-material- and TFT-based light-to-frequency conversion circuits is provided in the Section 3.3.
In this work, we integrate these two material systems on a common transparent ITO-coated glass substrate and demonstrate (i) low-hysteresis (<200 mV); rail-to-rail complementary inverter operation; (ii) systematic UV-induced modulation of the inverter switching voltage (VM) and small-signal gain; and (iii) three-, five-, and seven-stage ring oscillators whose oscillation frequency (fosc) and power consumption are tunable in real time by the UV intensity. The resulting circuit provides a transparent light-to-frequency conversion platform that bridges optical sensing and digital logic on the same chip, addressing a fundamental need for see-through optoelectronic ICs.

2. Materials and Methods

2.1. Substrate and Common Bottom Electrodes

Glass substrates pre-coated with patterned indium–tin oxide (ITO; sheet resistance ≈ 10 Ω/sq, thickness ≈ 150 nm) were sequentially cleaned in acetone, isopropanol, and deionized water under ultrasonication for 10 min each, followed by N2 blow-drying and a 10 min UV-ozone treatment to ensure a hydrophilic, contamination-free surface. The ITO patterns served as both the bottom gate of the IGZO TFT and the source/drain pads of the SWNT TFT.

2.2. n-Channel IGZO TFT with ALD Al2O3 Gate Dielectric (Bottom Gate)

A 30 nm Al2O3 gate dielectric was deposited at 150 °C by thermal atomic layer deposition (ALD) using trimethylaluminum and H2O precursors. A 10 nm a-IGZO active layer (In:Ga:Zn = 1:1:1 atomic ratio) was deposited by Radio-frequency (RF) magnetron sputtering (Korea Vacuum Tech., Republic of Korea) at room temperature in an Ar/O2 (9:1) atmosphere. ITO source/drain electrodes (80 nm) were sputter-deposited and patterned by lift-off; the channel was then defined with a wet etchant (HCl-based) to yield W/L = 100/20 μm. Post-deposition annealing in air at 300 °C for 1 h activated the channel.

2.3. p-Channel SWNT TFT with iCVD pC1D1 Top-Gate Dielectric

Random networks of 99–purity semiconducting SWNTs (∼1.4 nm in diameter, IsoSol-S100, Raymor Industries Inc., Boisbriand, QC, Canada) were deposited from a stable o-xylene solution by floating evaporative self-assembly onto a 3-aminopropyltriethoxysilane (APTES)-functionalized region of the ITO-patterned substrate. ITO source/drain pads (the same layer as the IGZO bottom gate) defined the channel geometry (W/L = 200/40 μm). The pC1D1 (cyclic siloxane/divinyl benzene copolymer) gate dielectric (≈250 nm, εr ≈ 6.2) was deposited by initiated chemical-vapor deposition (iCVD) at 40 °C using tert-butyl peroxide as the initiator. A 100 nm ITO top gate was then sputter-deposited through a shadow mask. The complete fabrication preserved the optical transparency of the substrate stack at >80% across the visible band.

2.4. Inverter and Ring-Oscillator Assembly

Each complementary inverter pair was wired by ITO interconnects so that the SWNT TFT acted as the pull-up (drain tied to VDD) and the IGZO TFT as the pull-down (source tied to GND), sharing a common gate node (VIN) and a common output node (VOUT) (Figure 1b). Cascaded 3-, 5-, and 7-stage ring oscillators were constructed by feeding the output of stage N back to the input of stage 1; oscillation is sustained only for odd N values (N = 3, 5, 7, …), in accordance with classical CMOS oscillator theory [21].
Figure 1. Fabrication, electrical characteristics, and CMOS inverter operation of transparent SWNT/IGZO complementary thin-film transistors (TFTs). (a) Cross-sectional schematics of the p-type SWNT top-gate and n-type IGZO bottom-gate TFTs on patterned ITO/glass. The SWNT TFT uses an iCVD pC1D1 dielectric and ITO electrodes, while the IGZO TFT uses an ALD Al2O3 dielectric and Mo source/drain electrodes. The inset shows the molecular structure of pC1D1. Each layer is color-coded according to the legend shown below the schematic. The arrow indicates the inset depicting the molecular structure of the pC1D1 high-k dielectric. (b) Schematic illustration of the complementary SWNT/IGZO CMOS inverter under ultraviolet (UV) illumination. The arrows indicate the direction of UV illumination. (c) Optical transmittance spectra of the fabricated SWNT TFTs compared with bare ITO glass substrates are also shown, demonstrating high visible transparency. The inset presents photographs of the bare ITO glass (A) and the transparent SWNT TFT array fabricated on the substrate (B). (d) Transfer characteristics of the individual SWNT and IGZO TFTs measured at V D S = ± 0.1   V . (e) Output characteristics (IDS-VDS) of the p-type SWNT and n-type IGZO TFTs, measured while sweeping VDS from 0 to ±4 V at gate-voltage steps of 1 V (VGS = 0 to ±4 V), confirming complementary conduction behavior. (f) Voltage-transfer characteristics (VTCs) and corresponding voltage gain of the complementary inverter measured at supply voltages ( V D D ) ranging from 1 to 4 V. The inset illustrates the circuit configuration of the transparent complementary inverter consisting of the SWNT p-channel TFT and IGZO n-channel TFT.

2.5. Electrical and Optical Characterization

All DC and pulsed I-V measurements were performed on a probe station equipped with a B1500A semiconductor parameter analyzer (Keysight Technologies, Santa Rosa, CA, USA). Voltage-transfer characteristics (VTC) were swept at ±50 mV/s in both forward and reverse directions to extract hysteresis. UV illumination was provided by a 365 nm LED (Mightex Systems, Pleasanton, CA, USA), whose intensity was calibrated with a Si photodiode (Mightex Systems, Pleasanton, CA, USA) and varied from dark to 90% of full power. Ring-oscillator output waveforms were captured with a 1 GHz digital oscilloscope (Tektronix, Beaverton, OR, USA), and the oscillation frequency (fosc) was extracted from the period of the fundamental peak in the FFT spectrum. Data were analyzed using OriginPro (v2018, OriginLab Corporation, Northampton, MA, USA).

3. Results and Discussion

3.1. Device Structure and Static Characteristics of the SWNT and IGZO TFTs

Figure 1a depicts the cross-sectional device structures of the two transistors used to form the complementary inverter. The IGZO TFT employs the bottom-gate configuration, with the patterned ITO serving as the gate, a 30 nm ALD-Al2O3 gate dielectric, a 10 nm IGZO channel, and ITO source/drain electrodes. The SWNT TFT adopts the top-gate configuration, in which the random SWNT network sits directly on the same ITO layer that defines the source/drain pads, and a 250-nm iCVD pC1D1 polymer dielectric (εr ≈ 6.2) is conformally coated over the network, followed by a sputtered ITO top gate. This co-planar layout allows both transistors to share a single ITO process step while still preserving full transparency of the stack across the visible band.
Figure 1b illustrates the schematic of the resulting UV-responsive complementary inverter. The drain of the SWNT TFT (pull-up) is connected to VDD, the source of the IGZO TFT (pull-down) is tied to GND, and the gates and drains are tied together to form the inverter input (VIN) and output (VOUT). The 365 nm UV illumination is delivered from the top through the transparent ITO/pC1D1/SWNT stack and is absorbed selectively by the underlying IGZO channel, generating excess electrons and shifting the n-channel turn-on voltage. This asymmetric absorption is the physical origin of the UV-tunable inverter behavior demonstrated later in Figure 2 and Figure 3.
Figure 2. UV-programmable switching characteristics of a transparent SWNT/IGZO complementary inverter. (a) Transfer characteristic of the IGZO TFT measured under different UV illumination intensities (0–90%), showing a continuous leftward shift with increasing UV intensity. (b) Voltage-transfer characteristics showing a continuous leftward shift of the switching point with increasing UV intensity while maintaining full complementary operation. (c) Extracted peak voltage gain as a function of UV intensity. (d) Scatter plot of the extracted noise margins (NML and NMH) as a function of UV illumination intensity (0–90%), demonstrating the evolution of inverter noise immunity under optical programming.
Figure 3. (a) Schematic of the ring-oscillator architecture formed by cascading N inverter stages with feedback from the output of stage (N) to the input of stage 1, where N denotes the total number of cascaded inverter stages and the ellipsis indicates the intermediate inverter stages; stable oscillation is established only when N is odd (N = 3, 5, 7, …). (b) Conceptual illustration of the transparent UV-responsive complementary integrated-circuit platform based on SWNT and IGZO TFT arrays, enabling UV-responsive light-to-frequency conversion and see-through optoelectronic applications. (c–e) Output oscillation waveforms of complementary ring oscillators consisting of (c) 3-stage, (d) 5-stage, and (e) 7-stage inverter chains measured under various UV illumination intensities. The oscillation frequency decreases with increasing inverter stage number, while UV illumination systematically modulates the oscillation dynamics. (f) Extracted oscillation frequency ( F o s c ) of the 3-, 5-, and 7-stage ring oscillators as a function of UV intensity. The maximum inverter gain ( g a i n m a x , right axis) gradually decreases with increasing UV illumination. (g) Power consumption of the 3-, 5-, and 7-stage ring oscillators under different UV illumination intensities. The power consumption increases with both UV intensity and inverter stage number according to P = C L × V D D 2 × f o s c × N .
Figure 1c shows the optical transmittance spectra of the fabricated SWNT TFTs, together with that of the bare ITO glass substrate. The transmittance of the completed SWNT TFT remains above approximately 80% throughout the visible wavelength rangeonly slightly lower than that of the bare ITO glass, confirming that the addition of the SWNT network, polymer gate dielectric, and transparent ITO gate introduces minimal optical loss. The inset photographs further compare the bare ITO glass substrate and the fabricated transparent SWNT TFT array, demonstrating the excellent optical transparency of the fabricated devices.
Figure 1d presents the transfer characteristics of the individual SWNT and IGZO TFTs measured at V D S = ± 0.1   V . The IGZO TFT exhibits typical n-type switching behavior, with the drain current increasing as the positive gate voltage is applied, whereas the SWNT TFT shows complementary p-type operation under negative gate bias. Both devices exhibit clear gate modulation with well-defined on/off switching characteristics, confirming successful realization of complementary transistor operation suitable for CMOS inverter implementation [20,22].
The output characteristics (IDS–VDS) of the individual devices are presented in Figure 1e. The IGZO TFT exhibits well-defined n-type behavior with clear linear and saturation regions, reaching ∼15 μA at VGS = +3 V, VDS = +3 V. The SWNT TFT exhibits mirrored p-type behavior, with comparable saturation-current magnitude (∼12 μA at VGS = −3 V, VDS = −3 V). Such polarity-symmetric output currents are essential for matched pull-up/pull-down strength and rail-to-rail switching of the complementary inverter.
Figure 1f presents the voltage-transfer characteristics (VTCs) and the corresponding voltage gain of the complementary inverter consisting of an n-IGZO TFT and p-SWNT TFT measured at supply voltages of VDD = 1, 2, 3, and 4 V. For each supply voltage, the input voltage (VIN) was swept from 0 V to VDD. The inverter exhibits clear rail-to-rail switching from VOUT ≈ VDD to VOUT ≈ 0 V over the entire supply voltage range. In addition, the VTC profiles are nearly identical for all VDD conditions, indicating stable switching behavior. The corresponding voltage gain remains nearly unchanged across all supply voltage conditions, with a maximum gain ranging from 4.7 to 5.3, confirming stable complementary inverter operation over a wide VDD range [21].

3.2. UV-Modulated Characteristics of the Complementary Inverter

Figure 2a presents the transfer characteristics of the IGZO TFT measured under different UV illumination intensities (dark, 10%, 30%, 50%, 70%, and 90%). As the UV intensity increases, the transfer curve continuously shifts toward lower gate voltages (leftward shift), indicating a photo-induced negative shift in the threshold voltage (VTH). This behavior originates from the photogenerated electrons in the IGZO channel under UV illumination, resulting in enhanced channel conductivity and earlier device turn-on, which is consistent with the photoresponse of conventional amorphous oxide semiconductors [23,24]. In contrast, the p-type SWNT TFT exhibits a negligible photoresponse under the same UV illumination, owing to its relatively weak absorption at 365 nm. Consequently, the UV modulation of the complementary inverter is primarily governed by the photoresponsive IGZO channel.
Figure 2b presents the voltage-transfer characteristics (VTCs) of the proposed complementary inverter measured under the same UV illumination conditions. As the UV intensity increases, the switching point gradually shifts toward lower input voltages while preserving clear rail-to-rail switching from V O U T ≈ V D D to V O U T ≈ 0 V. This behavior directly reflects the negative threshold-voltage shift observed in the IGZO TFT and demonstrates that the photo-induced electrical characteristics of the n-channel device are effectively translated into the switching characteristics of the complementary inverter.
Figure 2c summarizes the extracted peak voltage gain as a function of UV illumination intensity. The maximum gain gradually decreases with increasing UV intensity because the enhanced n-channel conduction broadens the transition region of the VTC. Nevertheless, the inverter maintains a relatively high voltage gain throughout the investigated UV range, confirming robust complementary inverter operation under optical programming.
Figure 2d presents the extracted low and high noise margins (NML and NMH) as a function of UV illumination intensity (0%, 10%, 30%, 50%, 70%, and 90%). As the UV intensity increases, NML gradually decreases, whereas NMH correspondingly increases, reflecting the continuous leftward shift of the inverter switching point under UV illumination. Despite this redistribution in the noise margins, the complementary inverter maintains sufficient noise immunity over the entire UV intensity range, confirming reliable logic operation under varying optical conditions [22,25,26].
The UV-dependent modulation of the inverter characteristics provides the fundamental operating principle for the light-to-frequency conversion circuits presented in the following section. Since the propagation delay of each inverter stage is determined by its switching characteristics, the photo-induced variation of the inverter behavior is directly translated into the oscillation frequency of the complementary ring oscillator.

3.3. Ring Oscillators and Light-to-Frequency Conversion

The corresponding circuit schematic and inverter chain are illustrated in Figure 3a. The ring oscillator is constructed by cascading an odd number (N) of identical inverter stages and connecting the output of stage N back to the input of stage 1 (Figure 3a); the well-known small-signal oscillation criterion requires odd N values (=3, 5, 7, …) to guarantee a 180° loop phase at every full cycle. Figure 3b illustrates the conceptual implementation of an array of these UV-responsive transparent inverters on a single glass substrate, providing a UV-responsive light-to-frequency conversion platform for transparent optoelectronic systems [22,25,26].
Figure 3c–e show the time-domain output waveforms of the three-stage, five-stage, and seven-stage ring oscillators measured at VDD = 5 V under different UV intensities. All three oscillators produce clean, near-rail-to-rail sinusoidal waveforms whose period increases monotonically with the number of stages, in accordance with the relation expressed as fosc = 1/(2 · N · τd), where τd is the average per-stage propagation delay. Within each oscillator, the period shortens as the UV intensity increases—a direct consequence of the UV-induced VM shift and the associated reduction in the propagation delay.
Figure 3f plots the oscillation frequency (fosc) (left axis) and the maximum inverter gain (right axis) as a function of UV intensity for the three-, five-, and seven-stage chains. The oscillation frequency decreases with increasing stage number (N) but increases with UV intensity. In contrast, the maximum gain decreases as the UV intensity increases, exhibiting an inverse trend with respect to fosc. These behaviors originate from the photo-induced increase in the IGZO conductance, which enhances carrier transport and accelerates switching, thereby increasing fosc while simultaneously reducing the small-signal gain of each inverter stage. Among the configurations, the three-stage chain provides the highest absolute fosc and the largest fractional modulation (Δf/f), making it the most attractive for light-to-frequency conversion applications requiring high sensitivity to UV intensity.
Figure 3g presents the corresponding dynamic power consumption (P) of the same oscillators. The data follow the canonical CMOS switching expression, i.e., P = CL · VDD2 · fosc · N, where CL is the per-node load capacitance. Because fosc = 1/(2Nτd), this expression reduces to P = CL · VDD2/(2τd), i.e., the dynamic power is set by the per-stage propagation delay rather than by the number of stages. The measured frequencies of 1410, 700 and 520 kHz for N = 3, 5 and 7 correspond to N · fosc products of 4.23, 3.50 and 3.64 MHz and to per-stage delays of 118, 143 and 137 ns; the three-stage chain therefore exhibits the shortest per-stage delay and the highest dynamic power, in agreement with Figure 3g. For every chain length, the power increases monotonically with the UV intensity because the photo-generated carriers in the IGZO channel shorten τd and raise fosc. Thus, the five- and seven-stage chains consume less power than the three-stage chain while offering a more linear fosc-versus-UV transfer characteristic that may be preferred when a stable, wide-range optical-to-electrical mapping is required.
Taken together, Figure 1, Figure 2 and Figure 3 establish that the proposed SWNT/IGZO inverter platform realizes a fully transparent light-to-frequency converter in which optical intensity, oscillation frequency, and power consumption are linked through a well-defined circuit relationship. This circuit-level UV transduction represents the central contribution of this work and, to the best of our knowledge, constitutes the first transparent complementary ring oscillator combining low-hysteresis DC operation with real-time UV-modulated dynamic behavior. Table 1 benchmarks the present work against the historical development of TFT-based light-to-frequency conversion circuits, ranging from early a-Si DLED architectures to low-dimensional MoS2/graphene devices and hybrid complementary circuits. Whereas several previous studies employed back-gate configurations or relied on circuit simulations, the present work experimentally demonstrates a complementary ring oscillator integrating top-gate p-SWNT and bottom-gate n-IGZO TFTs on a common transparent substrate. The fabricated 3-, 5-, and 7-stage oscillators exhibit frequencies of 1.41 MHz, 700 kHz, and 520 kHz, respectively, demonstrating reliable UV-responsive operation across different circuit stages. These results highlight the effective integration of dissimilar TFT technologies within a common top-gate circuit architecture.
Table 1. Performance comparison of low-dimensional TFT-based light-to-frequency conversion circuits (LFCs). Abbreviations: DLED = depletion load/enhancement driver; PDML = pseudo-depletion mode load; AMOG = ambipolar metal oxide graphene; LS = light shield; Lov = gate-active overlap; RO = ring oscillator. Note: Gate structure follows each report’s device; ref. [27] marked bottom-gate to contrast the top-gate novelty of this work. Source: ref. [28].

4. Conclusions

We have demonstrated fully transparent complementary inverters with a hysteresis window below 200 mV that integrate a top-gate p-channel SWNT TFT and a bottom-gate n-channel IGZO TFT on a common ITO/glass substrate. The use of an iCVD pC1D1 polymer dielectric for the SWNT channel and an ALD Al2O3 dielectric for the IGZO channel yields polarity-symmetric output characteristics, rail-to-rail VTC, and a hysteresis window below 50 mV. The asymmetric UV absorption between the two channels enables a clean, electrically read-out modulation of the inverter switching voltage (VM) and the small-signal gain. Cascading the inverter into three-, five-, and seven-stage ring oscillators yields stable rail-to-rail oscillation in which the oscillation frequency (fosc) and dynamic power consumption are tunable in real time by the incident UV intensity, following the canonical CMOS relation, i.e., P = CL · VDD2 · fosc · N. The proposed platform therefore realizes transparent light-to-frequency conversion at the circuit level, opening a viable route toward low-power, see-through optoelectronic ICs for smart windows, augmented-reality interfaces, and skin-conformal photonic sensors.

Author Contributions

Conceptualization, S.H.J.; methodology, S.C., H.B.J., H.M.K. and Y.S.L.; software, S.C.; validation, S.C., H.B.J. and S.H.J.; formal analysis, S.C. and S.H.J.; investigation, S.C., H.B.J., H.M.K. and Y.S.L.; resources, S.H.J.; data curation, S.C.; writing—original draft preparation, S.C. and S.H.J.; writing—review and editing, S.H.J.; visualization, S.C.; supervision, T.N.; funding acquisition, S.H.J.; project administration, S.H.J.; funding acquisition, S.H.J. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported by the Technology Innovation Program (RS-2025-25454815), funded by the Ministry of Trade, Industry and Energy (MOTIE, Republic of Korea) and partly supported by Incheon National University Research Grant in 2025.

Institutional Review Board Statement

Not applicable.

Data Availability Statement

The data presented in this study are available upon request from the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

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