Search Results (202)

The on-chip detection of circularly polarized light is pivotal for advancing applications in quantum optics, information processing, and spectroscopic sensing. However, conventional chiral metasurfaces often suffer from complex multilayer fabrication, material incompatibility, or modest performance, hindering their integration with photonic circuits. Here, we introduce a monolithic all-silicon metasurface that overcomes these limitations through a singular structural innovation. By strategically truncating four corners of a conventional Z-shaped meta-atom, we induce a hybridization of optical modes that profoundly enhances chiral light–matter interaction. This deliberately engineered perturbation yields a colossal circular dichroism with an extinction ratio exceeding 66 dB, a performance that surpasses existing state-of-the-art designs by approximately three orders of magnitude. Furthermore, the proposed metasurface exhibits remarkable fabrication robustness, owing to its single-layer architecture and CMOS-compatible material. We demonstrate that this exceptional metasurface can be directly integrated with a Mercury Cadmium Telluride (MCT) photodetector to form a highly efficient, compact circular polarization detector. Our work provides a simple yet powerful paradigm for creating high-performance chiral photonic devices, paving the way for their widespread adoption in integrated optoelectronics. Full article

A monolithic digital Silicon Photomultiplier (SiPM) featuring 1024 microcells with a 30-micrometer pitch and a 50% fill factor has been designed in a 110-nanometer CMOS image sensor technology. The device under consideration integrates both SPAD sensors and front-end electronics in the same substrate. It can count up to 1024 photons in less than 22 ns, while assigning timestamps to the first and last detected photons with a time resolution of less than 100 ps. A parallel counter structure combined with a fast adder tree provides photon counting in digital form with low latency, whereas a carefully balanced fast NAND tree ensures a fixed-pattern time uncertainty not exceeding 26 ps. The architecture incorporates in-pixel memory for individual cell disabling and configurable thresholding on the timing signal for noise mitigation. In order to optimize the fill factor, a part of the electronics is placed outside the array, while the most sensitive elements of the timing and counting circuits are laid out close to the sensor, in the SPAD array. A serial readout is employed to provide a single output connection per SiPM, thereby simplifying system integration. Full article

Based on monolithic microwave integrated circuit (MMIC) technology, this paper presents the design and implementation of a low-cost, highly integrated Ka-band sixteen-channel transmit/receive (T/R) module, specifically tailored to meet the application requirements of phased array antennas in airborne and spaceborne radar systems, satellite communications, and 5G/6G millimeter-wave networks. The proposed module employs an MMIC-based single-channel dual-chip discrete architecture, optimally integrating amplitude-phase multifunction chips and transmit-receive multifunction chips in terms of both fabrication process and performance characteristics, achieving a favorable balance between high performance and high-integration density. Using low-cost, low-temperature co-fired ceramic (LTCC) substrates, full-silver conductive paste, and a nickel–palladium–gold plating process, a novel “back-to-back” thin-slice packaging technique is presented to improve integration, lower manufacturing costs, and boost long-term reliability. Furthermore, the design incorporates glass insulators and a direct array interconnection scheme, which significantly minimizes transmission losses and reduces interface dimensions. The final module measures 70.3 mm × 26.2 mm × 10.9 mm and weighs only 34 g. Experimental results demonstrate a transmit output power of at least 23 dBm, a receive gain exceeding 26 dB, and a noise figure below 3.5 dB, achieving a 22.5–58% reduction in volume per channel while maintaining competitive RF performance. To improve testing effectiveness and guarantee data consistency, an automated radio frequency (RF) test system based on Python 3.11.5 was also developed. This work provides a practical technical approach for the engineering realization of Ka-band phased array systems. Full article

This article presents the design and implementation of a 6–18 GHz GaN monolithic microwave integrated circuit (MMIC) power amplifier (PA). A two-stage cascaded reactive matching network structure based on transistor stacking technology is employed to achieve circuit gain, and a multi-cell combination is used in the final stage to simultaneously achieve high power and high efficiency. For demonstration, a prototype of the proposed PA with an area of 4.5 × 3.4 mm² is fabricated in a 0.1 µm GaN-on-Si high-electron-mobility transistor (HEMT) process. The measured results of the GaN PA show a small signal gain of 25–29 dB, an output power of 40.8–42.5 dBm, and a power-added efficiency (PAE) of 27–38% in the operating frequency range of 6–18 GHz. Full article

For next-generation biomedical and biochemical sensor nodes, the analog front-end demands a direct interface with current-output sensors, extreme miniaturization, and nanowatt power consumption to enable energy autonomy. This work directly addresses these needs by presenting a comparative analysis of four minimalist, first-order, current-mode $\Delta \Sigma$ modulator ($\Delta \Sigma$M) architectures. Optimized for ultra-low-voltage operation (supply $\le 0.5$ V), the investigated topologies—including resistive, switched-capacitor, and current-reference-based cores—exploit passive integration and charge-domain feedback, eliminating the need for power-hungry active blocks. Detailed circuit-level simulations confirm that, with ad hoc techniques, it is possible to achieve stable first-order noise shaping in the deep near-threshold region, delivering up to 10-bit resolution while consuming less than 10 nW at a 0.5 V supply voltage achieving a signal bandwidth in the sub-10 hertz range. This study validates that robust $\Delta \Sigma$ conversion is feasible under extreme area and power constraints by leveraging architectural simplicity. The clear performance–complexity trade-offs outlined make these current-mode architectures ideal candidates for monolithic integration within miniaturized, energy-autonomous sensing systems. Full article

The growing demand for electric vehicles, renewable energy systems, and portable electronics has led to the widespread adoption of power conversion systems. Although advanced structures like the superjunction MOSFET have prolonged the viability of silicon in power applications, maintaining its dominance through cost efficiency, Si-based technology is ultimately constrained by its intrinsic limitations in critical electric fields. To address these constraints, research into wide bandgap semiconductors aims to minimize system footprint while maximizing efficiency. This study reviews the semiconductor landscape, demonstrating why Gallium Nitride (GaN) has emerged as the most promising technology for next-generation power applications. With a critical electric field of $3.75\mathrm{MV}/\mathrm{cm}$ ($12.5\times$ higher than Si), GaN facilitates power devices with lower conduction loss and higher frequency capability when compared to their Si counterpart. Furthermore, this paper surveys the GaN ecosystem, ranging from device modeling and packaging to monolithic ICs and switching converter implementations based on discrete transistors. While existing literature primarily focuses on discrete devices, this work addresses the critical gap regarding GaN monolithic integration. It synthesizes key challenges and achievements in the design of GaN integrated circuits, providing a comprehensive review that spans semiconductor technology, monolithic circuit architectures, and system-level applications. Reported data demonstrate monolithic stages reaching $30\mathrm{m}\Omega$ and $25\mathrm{MHz}$, exceeding Si performance limits. Additionally, the study reports on high-density hybrid implementations, such as a space-grade POL converter achieving $123.3\mathrm{kW}/\mathrm{L}$ with $90.9\%$ efficiency. Full article

This paper presents the design and implementation of the Power Stage GAIA (PSG), a high-current digital bias board developed by the Italian National Institute for Astrophysics (INAF) to extend the capabilities of the GAIA bias system. The PSG was developed within the Advanced European THz Receiver Array (AETHRA) project to support next-generation cryogenic receivers for millimeter-wave astronomy. Specifically, the AETHRA Work Package 1 (WP1) W-band downconverter integrates Monolithic Microwave Integrated Circuits (MMICs) requiring currents significantly exceeding the 50 mA limit of standard bias boards. To address these requirements, the PSG introduces a modular extension providing ten independent channels, each capable of delivering up to 500 mA with a programmable output range of 0–5 V. A key feature of the design is the adoption of a fully linear architecture based on LT1970 power amplifiers and INA225 precision sensors managed via an I²C digital interface. This approach ensures the high current capability required by modern power amplifiers while strictly avoiding the spectral noise and Radio Frequency Interference (RFI) typical of switching power supplies. Experimental validation confirms the system’s robustness and precision: the board demonstrated linear operation up to 460 mA and exceptional long-term stability, with a measured RMS voltage deviation below 50 µV. These results establish the PSG as a scalable, low-noise solution suitable for biasing high-power MMICs in future cryogenic receiver arrays. Full article

Microwave wireless power transfer (MWPT) technology has the advantages of long distance and high transmission efficiency; therefore, MWPT has many applications in aerospace, space solar power stations (SSPSs), and so on. The receiving and fixing subsystem is the core component for gathering and converting power and it is the main part of the system. If this step is both efficient and possible, the whole system will also be efficient and its success possible. This paper mainly introduces a systematic review of the key technologies, research status, and development trends of the receiving-end part in MWPT. High-performance rectifying devices are analyzed in detail, with the use of GaN Schottky barrier diodes (GaN SBDs), in addition to rectification circuits that have good rectification and impedance matching. Additionally, it compares the advantages and disadvantages of three power synthesis architectures, including RF synthesis, DC synthesis, and hybrid subarray synthesis, and proposes a strategy for optimizing power distribution through intelligent subarray partitioning. Finally, this paper looks at future development trends in receiving-end technology, including miniaturized monolithic microwave integrated circuits (MMICs) and efficient broadband reconfigurable rectification. The research presented herein offers a systematic technical reference and theoretical foundation for enhancing the performance of the receiving ends in microwave wireless power transfer systems. Full article

This work presents an advanced electro-physical model for hydrogenated amorphous silicon (a-Si:H) Junction Field Effect Transistors (JFETs) to enable the design of devices with energy-efficient analog interface building blocks for Lab-on-Chip (LoC) systems. The presence of this device can support monolithic integration with thin-film sensors and circuit-level design through a validated compact formulation. The model accurately describes the behavior of a-Si:H JFETs addressing key physical phenomena, such as the channel thickness dependence on the gate-source voltage when the channel approaches full depletion. A comprehensive framework was developed, integrating experimental data and mathematical refinements to ensure robust predictions of JFET performance across operating regimes, including the transition toward full depletion and the associated current-limiting behavior. The model was validated through a broad set of fabricated devices, demonstrating excellent agreement with experimental data in both the linear and saturation regions. Specifically, the validation was carried out at 25 °C on 15 fabricated JFET configurations (12 nominally identical devices per configuration), using the mean characteristics of 9 devices with standard-deviation error bars. In the investigated bias range, the devices operate in a sub-µA regime (up to several hundred nA), which naturally supports µW-level dissipation for low-power interfaces. This work provides a compact, experimentally validated modeling basis for the design and optimization of a-Si:H JFET-based LoC front-end/readout circuits within technology-constrained and energy-efficient operating conditions. Full article

This paper presents the electrical characterization of the on-resistance (R_ON) of on-wafer 100 V p-GaN power High-Electron-Mobility Transistors (HEMTs). This study assesses device degradation in the context of a monolithically integrated half-bridge circuit, considering both Low-Side (LS) and High-Side (HS) configurations. Since on-wafer samples have been characterized, a custom experimental setup was developed to emulate stress conditions experienced by the devices in the half-bridge circuit. A periodic signal (T = 10 µs, T_ON = 2 µs) switching from the OFF to the ON state was applied for a cumulative duration of 1000 s. Different OFF-state stress conditions were applied by varying the gate-source OFF voltage (V_GS,OFF) between 0 V and −10 V. The on-resistance exhibited a positive drift over time for devices in either the LS or the HS configuration, with the latter showing a more pronounced degradation. Measurements at higher temperatures (up to 90 °C) were carried out to characterize the dynamics of the physical mechanism behind the degradation effects. We identified hole emission from C-related acceptor traps in the buffer as the main mechanism for the observed degradation, which is present in both the HS and the LS configurations. The additional degradation observed in the HS case was attributed to the back-gating effect, stemming from the non-null body-to-source voltage. Furthermore, we found that a more negative V_GS,OFF further increases R_ON degradation, likely related to the higher electric field near the gate contact, which enhances hole emission from C-related acceptor traps. Full article

This work presents a monolithically integrated short-wavelength infrared (SWIR) image sensor based on indium arsenide (InAs) quantum dot photodiodes (QDPDs). The thin-film photodiode (TFPD) architecture enables direct integration on silicon readout integrated circuits (ROICs), eliminating wafer-to-wafer bonding and providing a scalable, RoHS-compliant alternative to lead-based colloidal quantum dot (CQD) devices. The proposed 3T pixel design incorporates dual conversion gain (DCG), enabling wide dynamic range imaging. The fabricated prototype achieves external quantum efficiencies of 28% at 1200 nm and 4.8% at 1400 nm, together with a dynamic range of 83.5 dB. A frame-based digital correlated double sampling (CDS) scheme stores the reset level in the digital domain and subtracts it after integration, thereby suppressing reset kTC noise and mitigating random telegraph signal (RTS) noise. Imaging demonstrations highlight SWIR-specific functionalities, including material discrimination, imaging through smoke, and transmission through silicon wafers. A performance comparison with previously reported SWIR pixels further confirms the competitiveness of the proposed InAs QDPD imager. These results establish InAs QDPDs as a promising platform for next-generation SWIR imaging, combining high sensitivity, extended spectral coverage, and scalable integration. Full article

Gallium Nitride (GaN) fabricated on an insulated sapphire substrate achieves a higher rated voltage of monolithic power integrated circuits compared to that fabricated on a conductive silicon substrate. In this paper, the effectiveness of isolation approaches considering substrate bias and crosstalk effects between adjacent devices in GaN-on-Sapphire monolithic power integrated circuits is investigated. It is demonstrated that the substrate bias and crosstalk effects between high-side and low-side power devices are effectively suppressed regardless of substrate termination with the implantation isolation approach. Thanks to the ultrathin buffer upon an insulated sapphire substrate, the ion implantation can also isolate the adjacent high-voltage (power) and low-voltage (logic) devices. However, a weak crosstalk effect that is caused by capacitive coupling is still observed between high-voltage devices and low-voltage devices with the implantation approach; the degradation rate is calculated to be up to 3%. Experimental results prove that a shallow trench isolation structure in the implantation region can be adopted to mitigate the crosstalk effects, to further improve the stability of integrated logic circuits and drivers under dynamic high-voltage switching conditions. Full article

The growing demand for compact, low-power infrared (IR) sensors necessitates advanced solutions for on-chip spectral selectivity, particularly for integration with Thermal Metal-Oxide-Semiconductor (TMOS) devices. This paper investigates the design and analysis of CMOS-compatible metal–insulator–metal (MIM) metamaterial absorbers tailored for selective absorption in the long-wave infrared (LWIR) region. We present a design methodology utilizing an equivalent-circuit model, which provides intuitive physical insight into the absorption mechanism and significantly reduces computational costs compared to full-wave electromagnetic simulations. An important rule in this design methodology is demonstrating how the resonance wavelength of these absorbers can be precisely tuned across the LWIR spectrum by engineering the geometric parameters of the top metallic patterns and, critically, by optimizing the dielectric substrate’s refractive index and thickness, which assist in designing small period MIM absorber units which are important in infrared thermal sensor pixels. Our results demonstrate that the resonance wavelength of these absorbers can be precisely tuned across the LWIR spectrum by engineering the geometric parameters of the top metallic patterns and by optimizing the dielectric substrate’s refractive index and thickness. Specifically, the selection of silicon as the dielectric material, owing to its high refractive index and low losses, facilitates compact designs with high-quality factors. The transmission line model provides intuitive insight into how near-perfect absorption is achieved when the absorber’s input impedance matches the free-space impedance. This work presents a new approach for the methodology of designing MIM absorbers in the mid-infrared and long-wave infrared (LWIR) regions, utilizing the intuitive insights provided by equivalent circuit modeling. This study validates a highly efficient design approach for high-performance, spectrally selective MIM absorbers for LWIR radiation, paving the way for their monolithic integration with TMOS sensors to enable miniaturized, cost-effective, and functionally enhanced IR sensing systems. Full article

Protecting sensitive electronic interfaces is critical in industrial applications, where exposure to harsh conditions and fault events is common. This paper reviews and compares circuit techniques for the design of bidirectional protection switches, highlighting key features such as analog switching, high-voltage capability, thermal shutdown, galvanic input isolation, and adjustable current limiting. Based on this review, we propose a universal architecture that combines the most suitable building blocks identified in the literature, with a focus on options that would enable monolithic integration in high-voltage silicon-on-insulator (SOI) technology and capable of delivering up to 2 A at a maximum voltage of 200 V. The proposed architecture is intended as a design guide for realizing a universal switch, rather than a fabricated implementation. To demonstrate system-level interactions, behavioral MATLAB/Simulink (R2024b) simulations are presented using generic components, which show expected functional responses but are not tied to process-specific device models. Full article

The photoelectrochemical oxidation method was utilized to directly grow a gate oxide layer and simultaneously create gate-recessed regions for fabricating GaN-based depletion-mode metal-oxide-semiconductor high-electron mobility transistors (D-mode MOSHEMTs). The LiNbO₃ gate ferroelectric layer and stacked gate oxide layers of LiNbO₃/HfO₂/Al₂O₃ were respectively deposited on the created gate-recessed regions using the photoelectrochemical etching method to fabricate the GaN-based enhancement mode MOSHEMTs (E-mode MOSHEMTs). GaN-based complementary integrated circuits were realized by monolithically integrating the D-mode MOSHEMTs and the E-mode MOSHEMTs. The performances of the inverter circuit manufactured using the integrated GaN-based complementary MOSHEMTs were measured and analyzed. Full article