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A special issue of Sensors (ISSN 1424-8220). This special issue belongs to the section "Electronic Sensors".

Deadline for manuscript submissions: 15 December 2025 | Viewed by 38901

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Special Issue Editor

Dr. De Xing Lioe

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Guest Editor

Research Institute of Electronics, Shizuoka University, 3-5-1 Johoku, Nakaku, Hamamatsu, Shizuoka 432-8011, Japan
Interests: CMOS image sensor; photodetector; image sensor readout circuits; time-resolved spectroscopy; medical and biological imaging

Special Issue Information

Dear Colleagues,

The CMOS image sensor has evolved from an image acquisition device to having sensing capabilities. Continuous innovations have seen advancements and improvements in areas including pixel size, read noise, readout speed, efficiency, time resolution, power consumption, and stacking structure. These enable various kinds of applications, such as high-dynamic-range, time-of-flight, single-photon counting, augmented reality/virtual reality, biomedical imaging, and many others. CMOS image sensors exist in a diverse variety of products in our everyday life, from consumer electronics such as mobile phones and digital cameras to automotive, security, medical, and others. These are expected to continuously grow with advanced performance and new functionalities. This Special Issue aims at highlighting the recent developments in CMOS image sensor technology and applications.

Areas of interest include, but are not limited to:

Circuit and pixel designs of CMOS image sensor;
Low noise;
High-dynamic range;
Global shutter;
High-speed imagers;
Photon-counting imagers;
Time-of-flight;
Computational and biomedical imaging;
Microscopy and spectroscopy;
Emerging applications.

Dr. De Xing Lioe
Guest Editor

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Keywords

Circuit and pixel designs of CMOS image sensor;
Low noise;
High-dynamic range;
Global shutter;
High-speed imagers;
Photon-counting imagers;
Time-of-flight;
Computational and biomedical imaging;
Microscopy and spectroscopy;
Emerging applications.

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Published Papers (10 papers)

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Research

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21 pages, 4607 KiB

Open AccessArticle

Polarization-Modulated Optical Homodyne for Time-of-Flight Imaging with Standard CMOS Sensors

by Ayaka Ebisu, Takahito Aoto and Tsuyoshi Takatani

Sensors 2025, 25(6), 1886; https://doi.org/10.3390/s25061886 - 18 Mar 2025

Viewed by 317

Abstract

Indirect time-of-flight (iToF) imaging is a widely applied technique to obtain a depth image from the phase difference of amplitude-modulated signals between emitted light and reflected light. The phase difference is computed via electrical correlation on a conventional iToF sensor. However, iToF sensors face a trade-off between spatial resolution and light collection efficiency because it is hard to downsize the circuit of the electrical correlation in a pixel. Thus, we propose a novel iToF depth imaging system based on polarization-modulated optical homodyne detection with a standard CMOS sensor. A resonant photoelastic modulator is employed to modulate the polarization state, enabling optical correlation through interaction with an analyzer. The homodyne detection enhances noise resistance and sensitivity in the phase difference estimation. Furthermore, the use of a polarization camera allows to reduce the number of measurements. We first validate the successful estimation of the phase difference in both setups with an avalanche photodiode or a CMOS sensor. The experimental results show accurate depth estimation even in challenging factors such as a low signal-to-noise ratio, temporal intensity variations, and speckle noise. The proposed system enables high-resolution iToF depth imaging using readily available image sensors. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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13 pages, 3399 KiB

Open AccessCommunication

The Design of a Low-Noise CMOS Image Sensor Using a Hybrid Single-Slope Analog-to-Digital Converter

by Hyun Seon Choo, Da-Hyeon Youn, Hyunggyu Choi, Gi Yeol Kim and Soo Youn Kim

Sensors 2024, 24(24), 8131; https://doi.org/10.3390/s24248131 - 19 Dec 2024

Viewed by 1301

Abstract

In this study, we describe a low-noise complementary metal-oxide semiconductor (CMOS) image sensor (CIS) with a 10/11-bit hybrid single-slope analog-to-digital converter (SS-ADC). The proposed hybrid SS-ADC provides a resolution of 11 bits in low-light and 10 bits in high-light. To this end, in the low-light section, the digital-correlated double sampling method using a double data rate structure was used to obtain a noise performance similar to that of the 11-bit SS-ADC under low-light conditions, while maintaining linear in-out characteristics. The CIS with the proposed 10/11-bit hybrid SS-ADC was fabricated using a 110 nm 1-poly 4-metal CIS process. The measurement results showed that dark random noise was reduced by 8% in low light when using the proposed hybrid SS-ADC, compared with the existing 10-bit ADC. Additionally, in the case of high brightness, when using a 10-bit resolution, the dynamic power consumption decreased by approximately 31%, compared to the 11-bit ADC. The total power consumption is 3.9 mW at 15 fps when the analog, pixel, and digital supply voltages are 3.3 V, 3.3 V, and 1.5 V, respectively. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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16 pages, 6770 KiB

Open AccessArticle

A 64 × 128 3D-Stacked SPAD Image Sensor for Low-Light Imaging

by Zhe Wang, Xu Yang, Na Tian, Min Liu, Ziteng Cai, Peng Feng, Runjiang Dou, Shuangming Yu, Nanjian Wu, Jian Liu and Liyuan Liu

Sensors 2024, 24(13), 4358; https://doi.org/10.3390/s24134358 - 5 Jul 2024

Cited by 3 | Viewed by 3005

Abstract

Low-light imaging capabilities are in urgent demand in many fields, such as security surveillance, night-time autonomous driving, wilderness rescue, and environmental monitoring. The excellent performance of SPAD devices gives them significant potential for applications in low-light imaging. This article presents a 64 (rows) × 128 (columns) SPAD image sensor designed for low-light imaging. The chip utilizes a three-dimensional stacking architecture and microlens technology, combined with compact gated pixel circuits designed with thick-gate MOS transistors, which further enhance the SPAD’s photosensitivity. The configurable digital control circuit allows for the adjustment of exposure time, enabling the sensor to adapt to different lighting conditions. The chip exhibits very low dark noise levels, with an average DCR of 41.5 cps at 2.4 V excess bias voltage. Additionally, it employs a denoising algorithm specifically developed for the SPAD image sensor, achieving two-dimensional grayscale imaging under 6 × 10⁻⁴ lux illumination conditions, demonstrating excellent low-light imaging capabilities. The chip designed in this paper fully leverages the performance advantages of SPAD image sensors and holds promise for applications in various fields requiring low-light imaging capabilities. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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10 pages, 4937 KiB

Open AccessArticle

Silicon Nanowire Phototransistor Arrays for CMOS Image Sensor Applications

by Hyunsung Jun, Johyeon Choi and Jinyoung Hwang

Sensors 2023, 23(24), 9824; https://doi.org/10.3390/s23249824 - 14 Dec 2023

Viewed by 2096

Abstract

This paper introduces a new design of silicon nanowire (Si NW) phototransistor (PT) arrays conceived explicitly for improved CMOS image sensor performance, and comprehensive numerical investigations clarify the characteristics of the proposed devices. Each unit within this array architecture features a top-layer vertical Si NW optimized for the maximal absorption of incoming light across the visible spectrum. This absorbed light generates carriers, efficiently injected into the emitter–base junction of an underlying npn bipolar junction transistor (BJT). This process induces proficient amplification of the output collector current. By meticulously adjusting the diameters of the NWs, the PTs are tailored to exhibit distinct absorption characteristics, thus delineating the visible spectrum’s blue, green, and red regions. This specialization ensures enriched color fidelity, a sought-after trait in imaging devices. Notably, the synergetic combination of the Si NW and the BJT augments the electrical response under illumination, boasting a quantum efficiency exceeding 10. In addition, by refining parameters like the height of the NW and gradient doping depth, the proposed PTs deliver enhanced color purity and amplified output currents. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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7 pages, 2120 KiB

Open AccessCommunication

N-Channel MOSFET Reliability Issue Induced by Visible/Near-Infrared Photons in Image Sensors

by Chun-Hsien Liu and Sheng-Di Lin

Sensors 2023, 23(23), 9586; https://doi.org/10.3390/s23239586 - 3 Dec 2023

Viewed by 1369

Abstract

Image sensors such as single-photon avalanched diode (SPAD) arrays typically adopt in-pixel quenching and readout circuits, and the under-illumination first-stage readout circuits often employs high-threshold input/output (I/O) or thick-oxide metal-oxide-semiconductor field-effect transistors (MOSFETs). We have observed reliability issues with high-threshold n-channel MOSFETs when they are exposed to strong visible light. The specific stress conditions have been applied to observe the drain current (I_d) variations as a function of gate voltage. The experimental results indicate that photo-induced hot electrons generate interface trap states, leading to I_d degradation including increased off-state current (I_off) and decreased on-state current (I_on). The increased I_off further activates parasitic bipolar junction transistors (BJT). This reliability issue can be avoided by forming an inversion layer in the channel under appropriate bias conditions or by reducing the incident photon energy. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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16 pages, 4192 KiB

Open AccessArticle

Design and Characterization of a Burst Mode 20 Mfps Low Noise CMOS Image Sensor

by Xin Yue and Eric R. Fossum

Sensors 2023, 23(14), 6356; https://doi.org/10.3390/s23146356 - 13 Jul 2023

Cited by 3 | Viewed by 3286

Abstract

This paper presents a novel ultra-high speed, high conversion-gain, low noise CMOS image sensor (CIS) based on charge-sweep transfer gates implemented in a standard 180 nm CIS process. Through the optimization of the photodiode geometry and the utilization of charge-sweep transfer gates, the proposed pixels achieve a charge transfer time of less than 10 ns without requiring any process modifications. Moreover, the gate structure significantly reduces the floating diffusion capacitance, resulting in an increased conversion gain of 183 µV/e−. This advancement enables the image sensor to achieve the lowest reported noise of 5.1 e− rms. To demonstrate the effectiveness of both optimizations, a proof-of-concept CMOS image sensor is designed, taped-out and characterized. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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22 pages, 7771 KiB

Open AccessArticle

Evaluation of Microlenses, Color Filters, and Polarizing Filters in CIS for Space Applications

by Clémentine Durnez, Cédric Virmontois, Pierre Panuel, Aubin Antonsanti, Vincent Goiffon, Magali Estribeau, Olivier Saint-Pé, Valérian Lalucaa, Erick Berdin, Franck Larnaudie, Jean-Marc Belloir, Catalin Codreanu and Ludovic Chavanne

Sensors 2023, 23(13), 5884; https://doi.org/10.3390/s23135884 - 25 Jun 2023

Cited by 3 | Viewed by 2933

Abstract

For the last two decades, the CNES optoelectronics detection department and partners have evaluated space environment effects on a large panel of CMOS image sensors (CIS) from a wide range of commercial foundries and device providers. Many environmental tests have been realized in order to provide insights into detection chain degradation in modern CIS for space applications. CIS technology has drastically improved in the last decade, reaching very high performances in terms of quantum efficiency (QE) and spectral selectivity. These improvements are obtained thanks to the introduction of various components in the pixel optical stack, such as microlenses, color filters, and polarizing filters. However, since these parts have been developed only for commercial applications suitable for on-ground environment, it is crucial to evaluate if these technologies can handle space environments for future space imaging missions. There are few results on that robustness in the literature. The objective of this article is to give an overview of CNES and partner experiments from numerous works, showing that the performance gain from the optical stack is greater than the degradation induced by the space environment. Consequently, optical stacks can be used for space missions because they are not the main contributor to the degradation in the detection chain. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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19 pages, 5599 KiB

Open AccessArticle

Resolving Multi-Path Interference in Compressive Time-of-Flight Depth Imaging with a Multi-Tap Macro-Pixel Computational CMOS Image Sensor

by Masaya Horio, Yu Feng, Tomoya Kokado, Taishi Takasawa, Keita Yasutomi, Shoji Kawahito, Takashi Komuro, Hajime Nagahara and Keiichiro Kagawa

Sensors 2022, 22(7), 2442; https://doi.org/10.3390/s22072442 - 22 Mar 2022

Cited by 8 | Viewed by 3910

Abstract

Multi-path interference causes depth errors in indirect time-of-flight (ToF) cameras. In this paper, resolving multi-path interference caused by surface reflections using a multi-tap macro-pixel computational CMOS image sensor is demonstrated. The imaging area is implemented by an array of macro-pixels composed of four subpixels embodied by a four-tap lateral electric field charge modulator (LEFM). This sensor can simultaneously acquire 16 images for different temporal shutters. This method can reproduce more than 16 images based on compressive sensing with multi-frequency shutters and sub-clock shifting. In simulations, an object was placed 16 m away from the sensor, and the depth of an interference object was varied from 1 to 32 m in 1 m steps. The two reflections were separated in two stages: coarse estimation based on a compressive sensing solver and refinement by a nonlinear search to investigate the potential of our sensor. Relative standard deviation (precision) and relative mean error (accuracy) were evaluated under the influence of photon shot noise. The proposed method was verified using a prototype multi-tap macro-pixel computational CMOS image sensor in single-path and dual-path situations. In the experiment, an acrylic plate was placed 1 m or 2 m and a mirror 9.3 m from the sensor. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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16 pages, 4470 KiB

Open AccessEditor’s ChoiceArticle

A Dual-Mode 303-Megaframes-per-Second Charge-Domain Time-Compressive Computational CMOS Image Sensor

by Keiichiro Kagawa, Masaya Horio, Anh Ngoc Pham, Thoriq Ibrahim, Shin-ichiro Okihara, Tatsuki Furuhashi, Taishi Takasawa, Keita Yasutomi, Shoji Kawahito and Hajime Nagahara

Sensors 2022, 22(5), 1953; https://doi.org/10.3390/s22051953 - 2 Mar 2022

Cited by 19 | Viewed by 6617

Abstract

An ultra-high-speed computational CMOS image sensor with a burst frame rate of 303 megaframes per second, which is the fastest among the solid-state image sensors, to our knowledge, is demonstrated. This image sensor is compatible with ordinary single-aperture lenses and can operate in dual modes, such as single-event filming mode or multi-exposure imaging mode, by reconfiguring the number of exposure cycles. To realize this frame rate, the charge modulator drivers were adequately designed to suppress the peak driving current taking advantage of the operational constraint of the multi-tap charge modulator. The pixel array is composed of macropixels with 2 × 2 4-tap subpixels. Because temporal compressive sensing is performed in the charge domain without any analog circuit, ultrafast frame rates, small pixel size, low noise, and low power consumption are achieved. In the experiments, single-event imaging of plasma emission in laser processing and multi-exposure transient imaging of light reflections to extend the depth range and to decompose multiple reflections for time-of-flight (TOF) depth imaging with a compression ratio of 8× were demonstrated. Time-resolved images similar to those obtained by the direct-type TOF were reproduced in a single shot, while the charge modulator for the indirect TOF was utilized. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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Review

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31 pages, 7519 KiB

Open AccessReview

Modeling for Single-Photon Avalanche Diodes: State-of-the-Art and Research Challenges

by Xuanyu Qian, Wei Jiang, Ahmed Elsharabasy and M. Jamal Deen

Sensors 2023, 23(7), 3412; https://doi.org/10.3390/s23073412 - 24 Mar 2023

Cited by 12 | Viewed by 8752

Abstract

With the growing importance of single-photon-counting (SPC) techniques, researchers are now designing high-performance systems based on single-photon avalanche diodes (SPADs). SPADs with high performances and low cost allow the popularity of SPC-based systems for medical and industrial applications. However, few efforts were put into the design optimization of SPADs due to limited calibrated models of the SPAD itself and its related circuits. This paper provides a perspective on improving SPAD-based system design by reviewing the development of SPAD models. First, important SPAD principles such as photon detection probability (PDP), dark count rate (DCR), afterpulsing probability (AP), and timing jitter (TJ) are discussed. Then a comprehensive discussion of various SPAD models focusing on each of the parameters is provided. Finally, important research challenges regarding the development of more advanced SPAD models are summarized, followed by the outlook for the future development of SPAD models and emerging SPAD modeling methods. Full article

(This article belongs to the Special Issue Recent Advances in CMOS Image Sensor)

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