IC Design Techniques for Power/Energy-Constrained Applications

A special issue of Chips (ISSN 2674-0729).

Deadline for manuscript submissions: 31 December 2024 | Viewed by 1282

Special Issue Editors


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Guest Editor
Department of Electrical, Electronics and Computer Engineering (DIEEI), University of Catania, 95125 Catania, CT, Italy
Interests: electronic engineering; switched capacitor AC/DC–DC converters; energy harvesting; low-power CMOS design; microelectronics
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Guest Editor
Department of Electrical, Electronic, Telecommunications Engineering and Naval Architecture (DITEN), University of Genoa, Via Opera Pia 11a, I-16145 Genoa, Italy
Interests: energy-efficient integrated circuit design; mostly-digital/synthesizable interfaces; ultra low power ICs for the Internet Of Things (IoT); ultra-low-voltage and voltage scalable ICs
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Power- and/or energy-constrained applications are critical tasks in IC design. Cases like the Internet of Things (IoT) or Implanted Medical Devices (IMDs), in many practical cases, cannot be utilized if the constituting circuits do not involve adequately scaled electronic engineering (in terms of power/voltage performance). To accomplish these challenges, design techniques for integrated circuits need particular refinements and new approaches/topologies need to be defined. Small area occupation, low design effort, and technology/design portability are among the keywords in this framework.

So, this Special Issue aims to attract reviews and original research submissions related to the design and application of ultra-low-voltage/power, analog/digital, or mixed-signal-based integrated circuits.

The topics of this Special Issue include, but are not limited to, the following:

  • Energy harvesting and power management circuits for IoT devices;
  • IC solutions for ultra-low-voltage energy and standby power consumption systems;
  • Ultra-low-power interfaces for the Internet of Things (including energy-efficient and power/voltage-scalable, analog, mixed-signal IC);
  • Inverter- and digital-based design methodologies of ultra-low power ICs;
  • Ultra-low-power/voltage ICs for instrumentation and communication applications;
  • Automated design methodology to fasten the time to market.

Dr. Andrea Ballo
Dr. Orazio Aiello
Guest Editors

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Keywords

  • low-voltage analog and digital design techniques
  • low-power low-voltage analog front-end (AFE) circuits
  • circuits for implantable and wearable devices
  • circuits for Internet of Things
  • switched capacitor converters
  • subthreshold analog and digital circuits
  • bulk-driven, inverter-based, multistage amplifiers
  • oscillators and filters
  • digitally assisted analog circuits
  • voltage and current references

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Published Papers (1 paper)

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6 pages, 278 KiB  
Brief Report
A Prediction about Radio Frequency Envelope Detectors for Implementing a 2.4 GHz Rectenna for IEEE 802.15.4 with MOS Transistors
by Leonardo Barboni
Chips 2024, 3(3), 229-234; https://doi.org/10.3390/chips3030011 - 5 Aug 2024
Viewed by 802
Abstract
This study introduces a rectenna, functioning as an RF envelope detector, utilizing a 16 nm bulk MOS transistor (metal-oxide-semiconductor field-effect transistor) for nonlinear detection. A circuit architecture is presented alongside a detailed design methodology and simulations. The detector efficiently demodulates a 2.4 GHz [...] Read more.
This study introduces a rectenna, functioning as an RF envelope detector, utilizing a 16 nm bulk MOS transistor (metal-oxide-semiconductor field-effect transistor) for nonlinear detection. A circuit architecture is presented alongside a detailed design methodology and simulations. The detector efficiently demodulates a 2.4 GHz OOK (On/Off Keying) encoded signal, comprising a 32-bit word, within 320 μs. Remarkably, the circuit operates passively, requiring no voltage supply or bias current, and functions effectively with 53 dBm input power at the antenna. This capability enables the decoding of 32-bit unsigned integer radio packets as a wakeup radio event. The effectiveness of the envelope detector is substantiated through comprehensive simulations. Full article
(This article belongs to the Special Issue IC Design Techniques for Power/Energy-Constrained Applications)
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