Open-Circuit Fault Diagnosis of Clamping Diodes in Three-Level NPC Inverters Based on Phase Current Asymmetry Index

Abstract

Three-level neutral-point-clamped (NPC) inverters are widely used in medium- and high-power drives and grid-connected applications due to their reduced device voltage stress, improved output power quality, and lower switching losses relative to conventional two-level topologies. Among the potential failure modes, clamping diode open-circuit faults are difficult to detect because the clamping diodes conduct only during the zero-voltage states, and their failure produces only subtle distortions in the phase current waveform. This paper proposes a fault diagnosis method for clamping diode open-circuit faults in three-level NPC inverters. The method is based on a current asymmetry index defined as the ratio of the per-cycle mean phase current to the per-cycle mean absolute phase current. During healthy operation, this index is approximately zero in all phases. A fault causes the index to deviate markedly from zero, while the polarity of this deviation identifies the failed diode. The method requires only phase-current measurements already available in the inverter control system. Consequently, no additional sensors, hardware modifications, or changes to inverter operation are required. Simulation results obtained for a 10 kW three-level NPC inverter demonstrate successful fault detection within approximately one to two fundamental cycles for open-circuit failures of both the upper and lower clamping diodes in all three phases.

1. Introduction

Three-level neutral-point-clamped (NPC) inverters, first introduced in [1], are widely used in medium- and high-power drive systems, renewable energy converters, and grid-connected applications. Compared with conventional two-level topologies, the three-level NPC structure offers reduced device voltage stress, lower total harmonic distortion (THD), and lower switching losses [2,3]. These advantages have led to broad adoption in motor drives, photovoltaic (PV) grid-connected systems, and high-voltage direct current (HVDC) transmission systems [4,5]. In this topology, clamping diodes connect the phase terminal to the DC-link neutral point during the zero switching state, denoted by state O, thereby producing the intermediate zero-voltage output level.

Power semiconductor faults are a primary cause of unplanned downtime in industrial power electronic systems. Fault diagnosis of NPC inverters has therefore received considerable research attention [6,7,8,9,10,11,12,13,14]. Most existing methods target open-circuit and short-circuit faults in the insulated-gate bipolar transistor (IGBT) switches. Phase current and phase voltage analysis [6,7], Park’s vector decomposition [8], observer-based estimation [9], and fault-injection strategies [10,11] have been shown to detect and localize IGBT faults under various operating conditions. Knowledge-driven and data-driven hybrid approaches [12], symmetrical-component-based methods [13], and methods developed for grid-connected converters in wind energy systems [14] have further extended fault diagnosis to a broader range of converter configurations and operating conditions. Data-driven methods, including convolutional neural networks [15], random forest classifiers [16], and lightweight networks incorporating multi-domain feature fusion [17], have achieved high classification accuracy for numerous fault types. Two-step [18] and unified fast diagnosis [19] schemes have further improved detection speed and fault coverage. These methods, however, are designed for the strong current distortion signatures of IGBT failures and have limited sensitivity to clamping diode faults.

Clamping diodes differ from IGBTs with respect to their conduction mechanisms. IGBTs are directly gated and carry current throughout their designated half-cycle, whereas clamping diodes conduct only during state O when the phase current freewheels through the neutral point. Consequently, an open-circuit clamping diode fault affects conduction only over limited angular intervals of the fundamental cycle, producing localized and relatively weak distortion in the phase current [6,20]. Standard diagnostic metrics such as the RMS current and peak amplitude change by only a small fraction of their nominal rated values, which renders conventional threshold-based detection unreliable. If it remains undetected, a clamping diode fault can cause neutral-point voltage imbalance and increase the overvoltage stress imposed on the remaining semiconductor [21,22].

Several methods have been proposed specifically for clamping diode fault diagnosis. One approach monitors the normalized mean phase current as a fault indicator and injects a reactive current component to enhance the fault signature [6]. However, such operating-point perturbation may be incompatible with unity-power-factor or maximum-power-point-tracking (MPPT) operation. Spectral analysis methods are sensitive to low-order current distortion but require additional signal processing and may be influenced by load-side harmonics. Machine learning methods that combine current, voltage, and spectral features provide broad fault coverage [15,17,21]; however, they typically require large labeled datasets and high computational resources, limiting deployment on embedded platforms. The measurement of clamping-branch current using a Rogowski coil enables fast detection but requires additional hardware [10]. A recent survey confirms that dedicated, hardware-agnostic methods for clamping diode faults remain limited [22].

This paper proposes a fault-diagnosis method for open-circuit faults in the clamping diodes of three-level NPC inverters. The method uses a current asymmetry index, denoted by $L_x$, defined as the ratio of the per-cycle mean phase current to the per-cycle mean absolute phase current. The proposed method requires neither reactive current injection, additional sensors, hardware modifications, nor alterations to the inverter control architecture are required. The main contributions of this study are as follows: (i) an analytical model describing the effects of a clamping-diode open-circuit fault on switching state O and the phase-current waveform is developed; (ii) the current-asymmetry index $L_x$ is formally defined, and its diagnostic properties are analytically derived; and (iii) simulation results obtained from a 10 kW three-level NPC inverter validate the proposed method for open-circuit faults in both the upper and lower clamping diodes of all three phases, with a detection time of approximately one to two fundamental cycles.

The remainder of this paper is organized as follows. Section 2 presents the system model and fault analysis. Section 3 introduces the proposed fault-diagnosis method based on the phase-current asymmetry index. Section 4 presents the simulation results and the corresponding discussion. Section 5 concludes the paper.

2. System Description and Fault Analysis

2.1. Three-Level NPC Inverter Topology

The system under study comprises a DC voltage source $V_{dc}$, a three-level NPC inverter, and a three-phase RL load, as shown in Figure 1. The DC-link is formed by two series-connected capacitors $C_1$ and $C_2$, each supporting approximately at $V_{dc}/2$, whose common junction defines the neutral point O. Each phase leg x ($x\in \{a,b,c\}$) consists of four series-connected IGBTs $S_{x1}$–$S_{x4}$, each equipped with an antiparallel freewheeling diode, $D_{Qx1}$–$D_{Qx4}$ and two clamping diodes $D_{x1}$ and $D_{x2}$ connecting the midpoint of the leg to the neutral point. The clamping diodes clamp the blocking voltage across each IGBT to $V_{dc}/2$.

Figure 1. Topology of the three-level NPC inverter.

Each phase leg operates in one of three switching states (P, O, or N), corresponding to the output voltage levels $+V_{dc}/2$, 0, and $-V_{dc}/2$, respectively, as listed in Table 1. In state P, $S_{x1}$ and $S_{x2}$ are ON and the phase is connected to the positive DC rail. In state N, $S_{x3}$ and $S_{x4}$ are ON and the phase is connected to the negative DC rail. In both states, the clamping diodes carry no current. In state O, $S_{x2}$ and $S_{x3}$ are ON; $D_{x1}$ conducts when $i_x>0$ and $D_{x2}$ conducts when $i_x<0$, clamping $V_{xO}=0$ V in both sub-intervals. Any open-circuit failure of a clamping diode therefore affects the inverter solely through the loss of this zero-voltage clamping function.

Table 1. Switching states of the three-level NPC inverter ($x\in \{a,b,c\}$).

State	${\mathit{S}}_{\mathit{x}1}$	${\mathit{S}}_{\mathit{x}2}$	${\mathit{S}}_{\mathit{x}3}$	${\mathit{S}}_{\mathit{x}4}$	Output Voltage ${\mathit{V}}_{\mathit{xO}}$
P	1	1	0	0	$+V_{dc}/2$
O	0	1	1	0	0
N	0	0	1	1	$-V_{dc}/2$

The phase-voltage waveform generated by the PWM switching process consists of a fundamental component and high-frequency switching harmonics. The harmonic components originate from the switching action of the power devices and are attenuated by the RL load impedance. Since the fault analysis focuses on the fundamental-frequency behavior of the phase current, the high-frequency switching components are neglected, and only the fundamental component is retained. Under sinusoidal PWM modulation, the fundamental phase voltages are:

$$\left\{\begin{array}{c}{v}_a=V_{m}sin\left({\omega }_{1}t\right)\hfill \\ v_b=V_{m}sin\left({\omega }_{1}t-{\displaystyle \frac{2\pi }{3}}\right)\hfill \\ v_c=V_{m}sin\left({\omega }_{1}t+{\displaystyle \frac{2\pi }{3}}\right)\hfill \end{array}\right.$$

(1)

where $V_m$ is the peak amplitude of the fundamental voltage and ${\omega }_1$ is the fundamental angular frequency. Under normal operation, the three switching states P, O, and N produce a balanced three-level output. State O is essential to this balance, as it generates the zero-voltage level for each phase. The effect of a clamping diode open-circuit fault on state O is analyzed in the following subsection.

2.2. Open-Circuit Fault Mechanism and Phase Current Effect

Under healthy conditions, the phase current of each leg exhibits half-wave symmetry, so its per-cycle mean value is approximately zero (Figure 2). Each phase leg x contains two clamping diodes: the upper diode $D_{x1}$, which conducts during state O when $i_x>0$, and the lower diode $D_{x2}$, which conducts during state O when $i_x<0$. An open-circuit fault in either diode eliminates one freewheeling path through the neutral point, disrupting the zero-voltage clamping function for the corresponding current polarity. This breaks the half-wave symmetry of the phase current and causes the per-cycle mean of $i_x$ to shift away from zero. The direction of the shift depends on which diode has failed.

Figure 2. Phase current waveforms under healthy conditions.

Without loss of generality, the fault mechanism is analyzed for phase A with an open-circuit fault in the upper clamping diode $D_{a1}$. When $D_{a1}$ fails, the positive-freewheeling path through the neutral point is lost. As illustrated in Figure 3, during state O with $i_a>0$, the phase current can no longer return through the neutral-point bus and is instead forced through the body diodes of $S_{a3}$ and $S_{a4}$, effectively applying $-V_{dc}/2$ across the phase inductance.

Figure 3. State O conduction paths of phase A.

The equivalent circuit for this transition is shown in Figure 4.

Figure 4. Equivalent circuit of phase A during the P-to-O transition with $D_{a1}$ open-circuited.

With initial phase current $i_a\left(0^{+}\right)>0$, the governing equation is:

$$L{\displaystyle \frac{d{i}_a}{dt}}+R{i}_a=-{\displaystyle \frac{V_{dc}}{2}}$$

(2)

Since the body diodes cease to conduct at zero current, the transient solution is:

$$i_a\left(t\right)=A{e}^{-Rt/L}$$

(3)

where the integration constant A is determined from initial phase current.

Equation (3) shows that the fault suppresses the positive-current interval of state O from a maintained freewheeling level to an exponential decay toward zero. This reduces the positive half-cycle integral while leaving the negative half-cycle unaffected, so the per-cycle mean of $i_a$ becomes negative. A fault in the lower diode $D_{a2}$ produces the symmetric effect: the negative-freewheeling interval is suppressed, and the per-cycle mean shifts to a positive value. The same mechanism applies identically to phases B and C. The resulting fault signatures for all cases are summarized in Table 2.

Table 2. Fault signatures for clamping diode open-circuit failures.

Failed Diode	Affected Interval in State O	Phase Voltage ${\mathit{v}}_{\mathit{x}}$ in State O	$\overline{{\mathit{v}}_{\mathit{x}}}$	$\overline{{\mathit{i}}_{\mathit{x}}}$
$D_{x1}$	Positive freewheeling ($i_x>0$)	Shifts toward $-V_{dc}/2$	Negative	Negative
$D_{x2}$	Negative freewheeling ($i_x<0$)	Shifts toward $+V_{dc}/2$	Positive	Positive

Table 2 shows that the sign of $\overline{i_x}$ depends only on which diode has failed. This sign relationship forms the basis of the diagnostic index proposed in Section 3.

3. Fault Diagnosis Method Based on Phase Current Asymmetry

3.1. Definition of the $L_x$ Asymmetry Index

As discussed in Section 2.2, a clamping diode open-circuit fault induces a deviation in the per-cycle mean phase current $\overline{i_x}$ while having limited impact on the overall current magnitude. The use of mean current-based indicators for fault diagnosis in NPC inverters has been reported in [6,11]. In [6], a reactive current injection is introduced to enhance fault observability; however, this approach modifies the operating point of the converter and may not be suitable for grid-connected systems operating under unity power factor or MPPT control. In [11], a fault-assumption-based strategy is applied in rectifier configurations, which is not directly transferable to inverter-side photovoltaic systems.

Conventional indicators such as RMS value or peak current are also sensitive to load and irradiance variations, which limits their robustness under variable operating conditions. Therefore, an asymmetry index that is insensitive to amplitude variations while preserving sensitivity to waveform asymmetry is required.

In this paper, the normalized phase-current asymmetry $L_x$ ($x=a,b,c$) is quantified using the following index [23]:

$$L_x={\displaystyle \frac{\overline{i_x}}{\overline{|i_x|}}},x=a,b,c$$

(4)

where the per-cycle mean and absolute mean values are defined as:

$$\overline{i_x}={\displaystyle \frac{1}{T}}{\int }_0^T{i}_x\left(t\right)dt,\overline{|i_x|}={\displaystyle \frac{1}{T}}{\int }_0^T\left|i_x\left(t\right)\right|dt$$

(5)

The normalization by $\overline{|i_x|}$ ensures that $L_x$ is bounded within $[-1,1]$ and independent of the current amplitude. Under healthy conditions, the phase current exhibits half-wave symmetry, resulting in $\overline{i_x}\approx 0$ and thus $L_x\approx 0$. When a clamping diode open-circuit fault occurs, the loss of one freewheeling path introduces a bias in one half-cycle, causing a non-zero value of $L_x$. The rate of change of $L_x$ is additionally evaluated to characterize the transient evolution of the asymmetry following a clamping-diode fault. The sign of $L_x$ indicates whether the upper or lower clamping diode is affected, as analyzed in Section 2.2.

3.2. Fault Diagnosis Procedure

The fault diagnosis procedure consists of three sequential steps, as illustrated in the flowchart of Figure 5.

Figure 5. Flowchart of the proposed fault diagnosis algorithm based on the $L_x$ asymmetry index.

Step 1.

Computation of the Asymmetry Index.

For each phase x, the asymmetry index $L_x$ is computed at the end of every fundamental period according to Equations (4) and (5). The calculation requires only the phase current $i_x$, which is readily available from the existing inverter control sensors.

Step 2.

Transient Suppression via Slope Monitoring.

Upon the occurrence of a fault, the asymmetry index $L_x$ undergoes a transient excursion prior to settling to its steady-state post-fault value. To prevent false alarms during this transient period, the algorithm evaluates the magnitude of the slope of $L_x$. A large slope indicates that the signal has not yet stabilized; under this condition, the diagnostic output is suppressed. Once the slope falls below a predefined threshold signifying that the signal has converged, the algorithm proceeds to the subsequent comparison stage. This approach effectively distinguishes transient disturbances from genuine faults, thereby improving detection robustness.

Step 3.

Threshold Comparison and Fault Declaration.

After the signal has stabilized, the asymmetry index $L_x$ is compared against a predefined positive threshold $L_{th}$ as follows:

–

$|L_x|<L_{th}$: no open-circuit fault is detected in the clamping diodes of phase x.

–

$L_x<-L_{th}$: open-circuit fault of the upper clamping diode $D_{x1}$ in phase x.

–

$L_x>+L_{th}$: open-circuit fault of the lower clamping diode $D_{x2}$ in phase x.

The diagnostic result is then output, which completes the procedure for the current evaluation cycle.

The proposed method requires no additional sensors, no hardware modifications, and no perturbation of the nominal operating point. As all computations involve only per-cycle averaging and a simple slope evaluation, the algorithm is well suited for direct implementation on standard digital signal processor (DSP) or field-programmable gate array (FPGA) platforms commonly employed in inverter control systems.

4. Simulation Results and Discussion

4.1. Simulation Setup

Simulations were performed in MATLAB/Simulink R2021 to verify the proposed diagnostic method. The three-level NPC inverter was modeled with ideal switches and sinusoidal PWM with a triangular carrier. The system was operated under stable steady-state conditions before a clamping diode open-circuit fault was introduced at $t=0.5$ s. The control strategy was kept unchanged after the fault to isolate its effects on the phase current and on $L_x$. The simulation parameters are listed in Table 3.

Table 3. Simulation parameters.

Parameter	Value	Unit
DC-link voltage, $V_{dc}$	500	V
Load resistance, R	6	$\mathsf{\Omega }$
Load inductance, L	14	mH
Switching frequency, $f_{sw}$	5	kHz
Fundamental frequency, $f_1$	50	Hz
Load power, P	10	kW

Table 3 lists the electrical parameters of the simulated system, corresponding to a typical 10 kW medium-voltage drive. These parameters define the baseline operating condition used to evaluate all fault cases discussed in the following subsections.

4.2. Upper Clamping Diode Fault: $D_{a1}$ Open-Circuit

Figure 6 presents the phase A current waveform and the asymmetry index $L_a$ following an open-circuit fault of $D_{a1}$ at $t=0.5$ s. Prior to the fault, $L_a$ remains consistently close to zero, confirming half-wave symmetric operation. At fault onset, $L_a$ decreases rapidly and converges to a stable negative value within approximately 1.5 fundamental cycles, clearly exceeding the negative threshold $-L_{th}$. The large rate of change $|{\dot{L}}_a|$ immediately following the fault activates the rate-based detection at Step 2, while the sustained threshold crossing over $n_c$ cycles provides the definitive fault declaration at Step 3. The negative sign of $L_a$ unambiguously identifies the upper clamping diode on phase A as the failed element, consistent with the theoretical predictions in Table 2.

Figure 6. Phase A current waveform (top) and asymmetry index $L_a$ (bottom) upon open-circuit fault of upper clamping diode $D_{a1}$ at $t=0.5$ s.

4.3. Lower Clamping Diode Fault: $D_{a2}$ Open-Circuit

Figure 7 presents the results for an open-circuit fault of the lower clamping diode $D_{a2}$. In this case, $L_a$ increases to a stable positive value within a comparable convergence time, consistent with the suppression of the negative-freewheeling interval established in Section 2.2. The positive sign of $L_a$ correctly identifies $D_{a2}$ as the failed element. The symmetry between Figure 6 and Figure 7 confirms the validity of the analytical fault signature model.

Figure 7. Phase A current waveform (top) and asymmetry index $L_a$ (bottom) upon open-circuit fault of lower clamping diode $D_{a2}$ at $t=0.5$ s.

4.4. Generalization to All Three Phases

Figure 8 presents the asymmetry indices $L_a$, $L_b$, and $L_c$ when an open-circuit fault is introduced on the upper clamping diode of phase A ($D_{a1}$) at $t=0.5$ s. Prior to the fault, all three indices remain near zero. Following the fault, $L_a$ departs toward a stable negative value while $L_b$ and $L_c$ remain unaffected. The faulted phase and the position of the failed diode are thus unambiguously identified by the sign and location of the deviation. These results confirm correct single-phase localization with a detection time of approximately 1–2 fundamental cycles across all tested fault scenarios.

Figure 8. Asymmetry indices $L_a$, $L_b$, and $L_c$ upon open-circuit fault of upper clamping diode $D_{a1}$ (phase A) at $t=0.5$ s; only $L_a$ deviates, confirming unambiguous single-phase fault localization.

Figure 9 presents the response of $L_x$ to an open-circuit fault of the upper IGBT $S_{a1}$ under identical operating conditions. Although $L_a$ also deviates from zero, its steady-state magnitude and initial slope $|{\dot{L}}_a|$ are both noticeably larger than those observed for the $D_{a1}$ fault. This difference suggests that clamping diode and IGBT open-circuit faults produce distinguishable $L_x$ asymmetry index signatures; however, a rigorous discrimination criterion is beyond the scope of the present work.

Figure 9. Asymmetry indices $L_a$, $L_b$, and $L_c$ upon open-circuit fault of upper IGBT $S_{a1}$ (phase A) at $t=0.5$ s.

It is also noted that the steady-state value of $L_x$ is dependent on the load resistance and inductance. As a result, the detection threshold must be adjusted according to the operating load condition: for each load level, a corresponding threshold value of $L_x$ is determined through simulation. Figure 10 shows the variation of $L_a$ under open-circuit fault of $D_{a1}$ for different load conditions, confirming that each load level yields a distinct steady-state value of the asymmetry index. Both fault-type discrimination between clamping diodes and IGBTs, and load-adaptive threshold selection, are reserved for future investigation.

Figure 10. Steady-state value of $L_a$ under open-circuit fault of upper clamping diode $D_{a1}$ for different load conditions.

5. Conclusions

This paper has proposed a clamping diode open-circuit fault diagnosis method for three-level NPC inverters based on a current asymmetry index $L_x$, defined as the ratio of the per-cycle mean phase current to the per-cycle mean of its absolute value. The index remains near zero under healthy conditions and shifts to a non-zero value upon a fault, with its sign identifying the failed diode. The method uses only the phase currents already available in the control system, requiring no additional sensors or hardware modifications. Simulation results for a 10 kW three-level NPC inverter confirm detection and localization of both upper and lower clamping diode open-circuit faults within approximately 1–2 fundamental cycles for all three phases, in agreement with the analytical fault signature model.

Future work will address two limitations: the steady-state value of $L_x$ is load-dependent, motivating a load-adaptive threshold scheme, and IGBT open-circuit faults also deviate $L_x$ from zero, motivating a dedicated criterion to discriminate clamping diode faults from IGBT faults.