Systematic Synthesis and Optimization of Reversible Quantum Circuits via MINLP, Toffoli Permutation, and Local Search

Abstract

The synthesis of efficient reversible logic circuits is critical for fault-tolerant quantum computing (FTQC). The primary motivation of this work is to overcome the inherent disadvantages of existing synthesis techniques: approximate heuristic methods often miss optimal solutions, while pure exact computational methods suffer from combinatorial explosion on deep circuits. While the strict NCT library (NOT, CNOT, Toffoli) is often preferred due to the high cost of distilling non-Clifford states required for arbitrary gates, standard physical implementations frequently utilize the broader NCV library (NOT, CNOT, V, V-dagger), requiring the decomposition of Toffoli gates into five elementary operations. To bridge this gap, this paper presents a unified, highly scalable methodology for the optimal design of reversible circuits across both libraries. First, a Mixed-Integer Non-Linear Programming (MINLP) formulation, linearized for the high-performance IBM ILOG CPLEX solver, is introduced to automate the exact generation of globally optimal strict NCT topologies. Second, a systematic four-phase optimization framework is proposed to reduce NCV costs. By replacing Toffoli gates with specific NCV decompositions, permuting control lines to match subsequent linear gates, and applying exact local searches via an extended MINLP solver on bounded sliding windows, significant gate cancellations are achieved. Applying this methodology to prominent primitives (MIG, SAYEM, URG, TSG, and MKG), we match global NCT optimality constraints and achieve highly optimized NCV Quantum Costs of 7, 14, and 12 for the MIG, TSG, and MKG gates, respectively, establishing best-known upper bounds that significantly outperform heuristic literature benchmarks.

1. Introduction

Reversible computing eliminates energy dissipation due to information loss [1] and provides the fundamental mathematical framework necessary for quantum algorithm design and secure quantum cryptography networks, such as mutual authentication schemes in smart grids [2]. A critical challenge in quantum design automation is the synthesis of efficient logic gates. While heuristic approaches exist, they inherently struggle to identify global optimums, particularly under the rigid constraints of Fault-Tolerant Quantum Computing (FTQC).

In FTQC, the Strict NCT Library (comprising NOT, CNOT, and Toffoli gates) is frequently prioritized over the physically broader NCV library (which adds the V and $V^{†}$ gates). This preference arises because Toffoli gates can be reliably implemented via magic state distillation, whereas the arbitrary relative phases of isolated V-gates often incur prohibitive hardware overheads. In modern fault-tolerant analysis, resources are typically measured via T-count and T-depth. However, for baseline hardware comparisons, structural topology reductions, and historical continuity, the physical implementation community heavily evaluates circuits using the generalized NCV Quantum Cost (QC) metric [3], where a single Toffoli gate decomposes to a baseline cost of 5. Furthermore, mapping these optimized topological gate protocols to realistic physical platforms and complex fermionic models [4] remains a critical next step, demonstrating the ongoing need to minimize physical gate costs prior to hardware-specific transpilation.

Reversible logic synthesis has been extensively studied. Early foundational work demonstrated that universal computation is achievable using single-qubit gates and CNOTs [5]. Subsequent optimization strategies relied heavily on template-based rewriting [6], which utilizes static, predefined rules to reduce gate counts. More recently, the focus has shifted toward automated exact synthesis, leveraging Boolean Satisfiability (SAT) [7] and Mixed-Integer Programming (MIP) [8], alongside robust benchmarking infrastructures like RevLib [9]. However, pure exact methods face severe scalability limitations; the combinatorial explosion of the search space renders the global synthesis of deep primitives (e.g., 10–15 gates) computationally intractable for standard solvers.

Furthermore, traditional NCV substitutions miss crucial optimization opportunities at the boundaries between non-linear (Toffoli) and linear (CNOT) stages. To overcome these limitations, we propose a hybrid structural-optimization approach that scales efficiently while bridging the NCT and NCV libraries.

The contributions of this paper are threefold:

• We introduce an exact MINLP-based synthesis methodology, linearized for rapid execution in CPLEX. This automates the generation of globally optimal strict NCT topologies for complex target Truth Tables in seconds.
• We introduce a new four-phase NCV optimization framework. By applying structural rules (Toffoli permutation and boundary cancellation) followed by localized exact solver passes on sliding windows, we dynamically generate highly optimized NCV configurations while bypassing the combinatorial explosion of global synthesis.
• We establish new best-known upper bounds, achieving strictly valid NCV costs for the complex MKG and TSG gates that significantly outperform existing heuristic benchmarks.

This manuscript represents a comprehensive synthesis and expansion of two previously posted preprints by the author [10,11].

2. Phase 1: Automated Synthesis in the Strict NCT Library

The first phase of our methodology is to generate a globally optimal circuit topology within the Strict NCT Library. We model the reversible circuit as a grid of N horizontal lines (qubits) and M vertical stages (time steps). The problem is formulated as a minimization of gate count subject to Boolean logic constraints mapped into the algebraic domain.

2.1. Sets, Indices, and Decision Variables

Let $n\in \{1\dots N\}$ be the set of circuit lines, $m\in \{1\dots M\}$ the set of vertical stages, and $k\in \{0\dots 2^N-1\}$ the set of all possible input Truth Table combinations. We define the following binary variables:

• $T_{n,m}$: Equal to 1 if line n is the Target of a gate at stage m.
• $C_{n,m}$: Equal to 1 if line n is a Control for the gate at stage m.
• $X_{n,m}^k$: The state (0 or 1) of line n at stage m for truth table row k.
• $P_m^k$: An auxiliary variable representing the value of the “Control Product” (AND logic) at stage m for row k.

2.2. Objective Function and Constraints

The objective is to minimize the total number of gates. Since a gate exists at stage m if any line is a target, we minimize:

$$\mathrm{Minimize} Z=\sum _{n,m}{T}_{n,m}$$

(1)

The Boolean logic is implemented using algebraic equations suitable for MINLP solvers.

1. 

Logic Propagation (XOR Update): If line n is a target ($T_{n,m}=1$), its value flips based on the control product $P_m^k$. In the text, we represent this logical operation using the Boolean XOR operator (⊕). However, in the arithmetic engine of the GAMS solver, this is explicitly evaluated using the algebraic expansion $a+b-2ab$:

$$X_{n,m}^k=(1-T_{n,m})X_{n,m-1}^k+T_{n,m}(X_{n,m-1}^k\oplus P_m^k)$$

(2)

2. 

Control Logic (AND Product): The control product $P_m^k$ is 1 if and only if all active control lines are 1. We model this as:

$$P_m^k=\prod _n(1-C_{n,m}+C_{n,m}{X}_{n,m-1}^k)$$

(3)

We must also prevent the simultaneous assignment of target and control at the same node:

$$T_{n,m}·C_{n,m}=0$$

(4)

3. 

Boundary Conditions:

-

$X_{n,0}^k={\mathrm{Input}}_n^k$ (Initialization).

-

$X_{n,M}^k={\mathrm{TargetOutput}}_n^k$ (The desired Truth Table).

2.3. Illustrative Example

To illustrate the method, consider a synthesis target mapping inputs $(A,B,C)$ to $(A,C^{\prime },B^{\prime })$. This represents a swap with inversion. For simplicity, only NOT and CNOT gates are considered. The solver searches for the binary values of $T_{n,m}$ and $C_{n,m}$ that satisfy the boundary conditions with minimum Z.

The inputs A, B, and C are defined as A = F0, B = CC, C = AA (hexadecimal numbers) in order to form the $X_{n,m}^k$ states. The desired outputs are P = F0 (i.e., $P=A$), Q = 55 (i.e., the complement of C), and R = 33 (i.e., the complement of B). Although we defined a circuit depth of 7 gates, the optimal result was a 4-gate circuit with the sequence: CNOT(2 → 3), NOT(2), CNOT(3 → 2), CNOT(2 → 3). The full GAMS code is provided in Appendix A.

3. The Extended MINLP Solver for NCV Optimization

To perform local optimization in the NCV domain, we developed an extended MINLP solver. Instead of simulating the full quantum state vector via resource-intensive matrix multiplication, our proposed methodology embeds the quantum state into a highly efficient, one-dimensional algebraic space, subject to the conditions that the circuit starts in a basis state, control lines are restricted to $\{0,1\}$, and the output is a basis state with zero phase.

Moreover, the basis states should be mapped to the complex domain as:

$$|0⟩\to 0, |1⟩\to 1.$$

3.1. Mathematical Foundation and the Amplitude Invariant

In standard quantum mechanics, a single-qubit state is defined by a two-dimensional vector $|\psi ⟩=\alpha |0⟩+\beta |1⟩$, subject to the normalization constraint ${\left|\alpha \right|}^2+{\left|\beta \right|}^2=1$. Because reversible circuits are initialized in computational basis states, the initial sum of the complex amplitudes is strictly $\alpha +\beta =1$.

The mathematical foundation of our scalar embedding relies on a specific invariant of the NCV gate matrices. The $2\times 2$ unitary matrices representing the target operations (X, V, and $V^{†}$) are uniquely structured such that the sum of the elements in any of their rows or columns always equals 1. This guarantees that the sum of the elements in the target’s output column vector always remains 1. For example, applying the V gate matrix to an arbitrary target state yields:

$$V\left[\begin{array}{c}\alpha \\ \beta \end{array}\right]={\displaystyle \frac{1}{2}}\left[\begin{array}{cc}1+j& 1-j\\ 1-j& 1+j\end{array}\right]\left[\begin{array}{c}\alpha \\ \beta \end{array}\right]=\left[\begin{array}{c}{\alpha }^{\prime }\\ {\beta }^{\prime }\end{array}\right]$$

Summing the resulting target output elements gives:

$${\alpha }^{\prime }+{\beta }^{\prime }=\left({\displaystyle \frac{1+j}{2}}+{\displaystyle \frac{1-j}{2}}\right)\alpha +\left({\displaystyle \frac{1-j}{2}}+{\displaystyle \frac{1+j}{2}}\right)\beta =\alpha +\beta$$

Because this invariant property ($\alpha +\beta =1$) is permanently preserved throughout the circuit’s evolution, it is mathematically redundant to track both variables. The two-dimensional state vector can be rigorously reduced to a single complex scalar tracking only the $|1⟩$ amplitude: $t=\beta$. The remaining amplitude is deterministically constrained as $\alpha =1-t$. Consequently, for any sequence of NCV operations, the full state vector can be perfectly reconstructed via the relation:

$$|\psi ⟩=(1-t\left)\right|0⟩+t|1⟩$$

(5)

Because quantum states must remain normalized, the probabilities must sum to 1. For instance, if evaluating $V|0⟩$ yields $t={\displaystyle \frac{1-j}{2}}$, the probability of measuring $|1⟩$ is ${\left|t\right|}^2=0.5$, and the probability of measuring $|0⟩$ is ${|1-t|}^2=0.5$, confirming that the total probability remains exactly 1.

3.2. Algebraic Gate Transformations and Control Logic

Within the NCV library, information propagates through the complex scalar $t\in \mathbb{C}$ (encoded in the solver as two real-valued variables, $t_{in}=u+jv$) using the following derived algebraic transformations:

$$\begin{array}{cc}\hfill X\left(t_{in}\right)& =1-t_{in}\hfill \end{array}$$

(6)

$$\begin{array}{cc}\hfill V\left(t_{in}\right)& ={\displaystyle \frac{1-j}{2}}+j{t}_{in}\hfill \end{array}$$

(7)

$$\begin{array}{cc}\hfill V^{†}\left(t_{in}\right)& ={\displaystyle \frac{1+j}{2}}-j{t}_{in}\hfill \end{array}$$

(8)

If the input to a target qubit is $t_{in}$, the effect of a control qubit c is modeled as a linear algorithmic update:

$$t_{out}=(1-c) t_{in}+c y\left(t_{in}\right),$$

(9)

where $c\in \{0,1\}$ is the strictly binary control value, and $y\left(t_{in}\right)$ is the corresponding complex output of the active gate from Equations (6)–(8). By substituting the complex definitions, we extract the explicit real-valued propagation formulas for the MINLP solver ($t_{out}=u_{out}+j{v}_{out}$):

$$u_{out}=\Re \left((1-c)t_{in}+c y\left(t_{in}\right)\right), v_{out}=\Im \left((1-c)t_{in}+c y\left(t_{in}\right)\right).$$

(10)

Important constraints dictate that all inputs and outputs of the sub-circuit must return to computational basis states, meaning their imaginary parts must be 0 ($v=0$). Furthermore, control lines must be strictly binary. This is accomplished by adding explicit bounds to the solver that mathematically force all active controls to be exactly 0 or 1.

The validity of this continuous embedding is verified by demonstrating that the algebraic functions preserve the discrete group structure of the NCV library. For instance, applying two consecutive V gates algebraically yields the Pauli-X transformation:

$$\begin{array}{cc}\hfill V\left(V\left(t_{in}\right)\right)& ={\displaystyle \frac{1-j}{2}}+j\left({\displaystyle \frac{1-j}{2}}+j{t}_{in}\right)={\displaystyle \frac{1-j}{2}}+{\displaystyle \frac{j+1}{2}}-t_{in}=1-t_{in}=X\left(t_{in}\right)\hfill \end{array}$$

Similarly, two consecutive $V^{†}$ gates yield $X\left(t_{in}\right)$:

$$\begin{array}{cc}\hfill V^{†}\left(V^{†}\left(t_{in}\right)\right)& ={\displaystyle \frac{1+j}{2}}-j\left({\displaystyle \frac{1+j}{2}}-j{t}_{in}\right)={\displaystyle \frac{1+j}{2}}-{\displaystyle \frac{j-1}{2}}-t_{in}=1-t_{in}=X\left(t_{in}\right)\hfill \end{array}$$

Furthermore, the inverse identity property $V^{†}\left(V\left(t_{in}\right)\right)=I\left(t_{in}\right)=t_{in}$ is strictly maintained:

$$\begin{array}{cc}\hfill V^{†}\left(V\left(t_{in}\right)\right)& ={\displaystyle \frac{1+j}{2}}-j\left({\displaystyle \frac{1-j}{2}}+j{t}_{in}\right)={\displaystyle \frac{1+j}{2}}-{\displaystyle \frac{j+1}{2}}+t_{in}=t_{in}\hfill \end{array}$$

3.3. Scope and Linearity of the Scalar Embedding

To explicitly prove that no quantum information is lost in this scalar reduction, we verified our information propagation against the classical density/state-vector matrix methodology. An exhaustive verification requires testing all 4 possible active target gates within the NCV library ($I,X,V,V^{†}$) against all 4 possible input state combinations of a controlled two-qubit interaction ($|c,t_{in}⟩\in \left\{\right|00⟩,|01⟩,|10⟩,|11⟩\}$).

To illustrate this, Table 1 demonstrates the exhaustive verification for the Controlled-V gate. In the classical methodology, the target state is calculated via standard $2\times 2$ unitary matrix multiplication. In our proposed methodology, the target state is calculated purely via the scalar algorithmic update $t_{out}=(1-c)t_{in}+c·V\left(t_{in}\right)$ derived from Equation (7), and the final state vector is reconstructed via Equation (5).

Table 1. Explicit Verification of the Controlled-V Gate (including Superposed Targets).

Input		Classical Matrix Method	Proposed Algebraic Method
$\mathbf{|}\mathit{c}\mathbf{⟩}$	$\mathbf{|}{\mathit{t}}_{\mathit{in}}\mathbf{⟩}$	Target Output State	Scalar Update (${\mathit{t}}_{\mathit{out}}$)	Reconstructed State $\mathbf{(}\mathbf{1}\mathbf{-}{\mathit{t}}_{\mathit{out}}\mathbf{)}\mathbf{|}\mathbf{0}\mathbf{⟩}\mathbf{+}{\mathit{t}}_{\mathit{out}}\mathbf{|}\mathbf{1}\mathbf{⟩}$
$|0⟩$	$|0⟩$	$|0⟩$	$(1-0)0+0=0$	$1|0⟩+0|1⟩=|0⟩$
$|0⟩$	$|1⟩$	$|1⟩$	$(1-0)1+0=1$	$0|0⟩+1|1⟩=|1⟩$
$|1⟩$	$|0⟩$	${\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$	$V\left(0\right)={\displaystyle \frac{1-j}{2}}$	$\left(1-{\displaystyle \frac{1-j}{2}}\right)|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩={\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$
$|1⟩$	$|1⟩$	${\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$	$V\left(1\right)={\displaystyle \frac{1+j}{2}}$	$\left(1-{\displaystyle \frac{1+j}{2}}\right)|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩={\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$
$|0⟩$	${\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$	${\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$	$(1-0){\displaystyle \frac{1-j}{2}}+0={\displaystyle \frac{1-j}{2}}$	$\left(1-{\displaystyle \frac{1-j}{2}}\right)|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩={\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$
$|1⟩$	${\displaystyle \frac{1+j}{2}}|0⟩+{\displaystyle \frac{1-j}{2}}|1⟩$	$|1⟩$	$V\left({\displaystyle \frac{1-j}{2}}\right)=1$	$(1-1)|0⟩+1|1⟩=|1⟩$
$|0⟩$	${\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$	${\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$	$(1-0){\displaystyle \frac{1+j}{2}}+0={\displaystyle \frac{1+j}{2}}$	$\left(1-{\displaystyle \frac{1+j}{2}}\right)|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩={\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$
$|1⟩$	${\displaystyle \frac{1-j}{2}}|0⟩+{\displaystyle \frac{1+j}{2}}|1⟩$	$|0⟩$	$V\left({\displaystyle \frac{1+j}{2}}\right)=0$	$(1-0)|0⟩+0|1⟩=|0⟩$

As shown in Table 1, the complex scalar $t_{out}$ perfectly tracks the amplitude of the $|1⟩$ state, and $(1-t_{out})$ perfectly tracks the amplitude of the $|0⟩$ state. Applying this exact verification to the remaining active operations ($I,X,V^{†}$) confirms that the scalar MINLP formulation is entirely mathematically equivalent to classical matrix propagation, while reducing the severe combinatorial memory overhead associated with simulating full density matrices. It is noted that the four target output states, indicated in the eight rows of the table, are the only possible ones in all stages originating from basis inputs.

While Table 1 explicitly covers basis-state inputs, this verification applies to superposed target states via the strict linearity of the update rule. During mid-circuit evaluation, the target lines reliably occupy one of four explicitly reachable superposed values: $t\in \{0,1,{\displaystyle \frac{1-j}{2}},{\displaystyle \frac{1+j}{2}}\}$. Considering each of these values with each NCV gate, we can prove the correctness of the information propagation.

It is, however, vital to clearly define the absolute mathematical boundaries of this scalar approach. The reduction $|\psi ⟩\to t$ is valid only under the following strict side conditions: (i) all control lines must remain in computational basis states ($c\in \{0,1\}$) throughout the evaluation window, (ii) the window’s inputs and outputs must be basis states, and (iii) the relative phase across the window must vanish. Consequently, this formulation excludes a nontrivial class of NCV circuits, specifically those in which a qubit placed in superposition subsequently acts as a control, creating entanglement that cannot be factored into independent scalar variables. We acknowledge that our localized Phase 4 windows may therefor miss certain candidate NCV reductions that rely on intermediate entanglement. However, because our sliding windows operate strictly upon topologies generated by the NCT solver (where controls are classically defined), these conditions are naturally satisfied. Therefore, the scalar MINLP formulation is entirely mathematically equivalent to classical matrix propagation strictly within this restricted class of classically controlled sub-circuits.

4. The Four-Phase NCV Optimization Framework

Building upon the exact NCT topologies, we apply the following phases:

Phase 1: Automated NCT Synthesis. The base topology is generated using the solver from Section 2, ensuring the globally minimum number of Toffoli gates positioned optimally relative to linear gates. It is noted here that this solver can find many equivalent solutions, which provides critical flexibility for the subsequent steps of this hybrid method.

It should be noted that various alternative quantum decompositions of logic gates exist in the literature, each tailored to specific physical constraints and error-correction codes. For instance, while the NCV library is utilized here to minimize the standard Quantum Cost (QC) metric, modern fault-tolerant schemes typically decompose the Toffoli gate using the Clifford+T library, requiring a T-count of 7 and a T-depth of 3. Furthermore, even within the NCV library, alternative decompositions exist that prioritize nearest-neighbor physical topologies or differing relative phases. The specific 5-gate NCV decomposition shown in Figure 1 was selected because it represents the established QC baseline and natively exposes the trailing CNOT gate required for our cancellation rules. By utilizing this specific NCV Toffoli topology within our hybrid methodology, we successfully achieved better results and lower overall quantum costs compared to alternative decompositions.

The algorithm scans the NCT circuit for the pattern: $\mathrm{Toffoli}(x,y\to z)$ followed (or ending) by $\mathrm{CNOT}(x\to y)$. By assigning the internal Toffoli controls $C_1=x,C_2=y$, the final internal CNOT cancels with the external CNOT ($X·X=I$), reducing the Toffoli cost from 5 to 4 and the overall gate count by 2.

Figure 1. The specific Toffoli decomposition used in Phase 2 ($C_1,C_2\to T$), where $C_1,C_2$ represent control qubits and T represents the target qubit. Note the final gate is $\mathrm{CNOT}(C_1\to C_2)$.

Figure 1. The specific Toffoli decomposition used in Phase 2 ($C_1,C_2\to T$), where $C_1,C_2$ represent control qubits and T represents the target qubit. Note the final gate is $\mathrm{CNOT}(C_1\to C_2)$.

Phase 3: Local Optimization 1. After Phase 2, we define a sliding window around the merged areas containing only CNOT gates. We feed this sub-circuit back into the Phase 1 solver to identify exact non-standard reductions that static template matching routinely misses.

Phase 4: Local Optimization 2. We define a sliding window containing V-gates and CNOTs. We feed this into the Extended MINLP solver (Section 3). The number of gates in this window is intentionally limited to 5–6. While exact synthesis could theoretically evaluate larger windows, evaluating a sliding window of a length less than 7 executes in under 50 s using the linearized CPLEX formulation (e.g., just 20 s for a 6-gate window). Expanding to a 7-gate window increases the CPLEX execution time to 724 s, and expanding the window to 8 gates increases the execution time to several hours without guaranteeing proportional cost reductions. Thus, 5–6 gates establishes the empirical boundary for robust tractability. The procedure can be repeated from Phase 1, with alternate implementations generated by the NCT solver.

It is noted that the globally optimal NCV realization need not factor through an NCT topology.

5. Experimental Results

5.1. Phase 1 Output: Strict NCT Benchmark Results

We applied the Phase 1 methodology to standard reversible primitives: MIG [12], SAYEM [13], URG [14], TSG [15], and MKG [16]. The program successfully converged to globally optimal topologies. For parity-preserving gates (MIG, SAYEM), 1-Toffoli solutions were found (Figure 2). For complex degree-3 primitives (TSG, MKG), optimal 2-Toffoli solutions were generated (Figure 3).

Figure 2. Optimal 1-Toffoli realizations generated by the automated NCT synthesis (Phase 1). The target logic functions are defined as: (a) MIG: $P=A$, $Q=A\oplus B$, $R=AB\oplus C$, $S=A{B}^{\prime }\oplus D$; (b) SAYEM: $P=A$, $Q=A^{\prime }B\oplus AC$, $R=Q\oplus D$, $S=(AB\oplus A^{\prime }C)\oplus D$; (c) URG: $P=(A\vee B)\oplus C$, $Q=B$, $R=AB\oplus C$.

Figure 3. Optimal 2-Toffoli realizations generated for the complex TSG and MKG gates. The target logic functions are defined as: (a) TSG: $P=A$, $Q=A^{\prime }{C}^{\prime }\oplus B^{\prime }$, $R=(A^{\prime }{C}^{\prime }\oplus B^{\prime })\oplus D$, $S=(A^{\prime }{C}^{\prime }\oplus B^{\prime })D\oplus (AB\oplus C)$; (b) MKG: $P=A$, $Q=C$, $R=(A^{\prime }{D}^{\prime }\oplus B^{\prime })\oplus C$, $S=(A^{\prime }{D}^{\prime }\oplus B^{\prime })C\oplus (AB\oplus D)$.

5.2. Computational Performance and Scalability

To explicitly evaluate the scalability and tractability of our framework, the baseline MINLP model was mathematically linearized into a Mixed-Integer Linear Program (MIP) and executed using the IBM ILOG CPLEX solver. The depth bound (M) is determined iteratively or evaluated via strict variable constraints ($z.lo=z.up$) to prove global optimality against known heuristic limits. Alternatively, we can allow the solver to find the optimal value of the objective variable z by adjusting the bounds z.lo and z.up. Table 2 details the rapid CPU execution times achieved for each primitive.

Table 2. Phase 1 CPLEX Execution Times for Global NCT Synthesis.

Primitive	Qubit Width	Target NCT Cost (z)	Execution Time (s)
URG	3	7	0.02
SAYEM	4	9	0.73
MIG	4	9	1.63
MKG	4	16	8.17
TSG	4	17	150.17

As demonstrated, the linearized algebraic framework completely avoids the severe combinatorial explosion characteristic of traditional exact synthesis. It successfully processed the highly complex 4-qubit TSG gate in just 150.17 s on standard commercial hardware (AMD Ryzen 5 7530U, 2.00 GHz, 16 GB RAM).

5.3. Phases 2–4: Optimized NCV Circuits

Applying the full 4-phase framework to the generated NCT base structures yields massive NCV improvements (Figure 4). It should be explicitly noted that while Phase 1 is globally optimal in the NCT domain, Phases 3 and 4 execute exact local searches over bounded NCV windows, establishing best-known upper bounds rather than global NCV limits.

Figure 4. Final optimized NCV decompositions generated by the 4-phase framework.

MIG Gate: The sequence $\mathrm{Toffoli}(1,2\to 3)$ followed by $\mathrm{CNOT}(1\to 2)$ allows for perfect cancellation via Phase 2, reducing the base cost from 9 down to 7. To mathematically prove the global NCV optimality of this result, we evaluated the entire circuit as a single 7-gate window using the Phase 4 solver. The solver verified that no solution exists for fewer than 7 gates (returning an infeasible status). This exact NCV-level search required 8687 s of execution time using the baseline MINLP solver (which drastically reduces to just 724 s when executing the linearized CPLEX formulation), rigorously proving that the NCV cost of 7 is globally optimal.

TSG Gate: Phase 2 allows perfect cancellation after permuting lines 1 and 2 of the second Toffoli gate. Phase 3 optimized the linear block consisting of the last CNOT of the first Toffoli and the subsequent five CNOT gates down to 5 gates (cost reduction of 1). Total reduction: 3. Final NCV Upper Bound: 14.

MKG Gate: Phase 2 reduces the cost by 2 by merging the first two gates. Phase 3 reduces a linear block by 1. Phase 4 compresses the resulting first 6-gate mixed V/CNOT block down to 5 gates, which required an execution time of 1800 s in the baseline solver (and just 20 s using the linearized CPLEX formulation). Total reduction: 4. Final NCV Upper Bound: 12.

6. Comparative Analysis

6.1. Comparison of Methodologies

Existing methodologies for reversible circuit optimization generally fall into scalable heuristics (such as template matching) and exact synthesis algorithms. Template matching [6] relies on a static library of predefined circuit identities. While computationally efficient, it inherently struggles to identify non-standard, cross-boundary cancellations—especially when transitioning from high-level NCT representations to physical NCV implementations. Conversely, pure exact synthesis guarantees global optimality but suffers from extreme combinatorial explosion [7,8]. Even when linearized in high-performance solvers, the global exact synthesis deployed in Phase 1 typically hits practical exponential limits around $N=4$ to 5 qubits with depths of $M\approx 15-20$. Indeed, the largest instance solved to proven global optimality in our Phase 1 evaluation is the 4-qubit TSG gate at depth $M=17$, which approaches this practical tractability boundary.

The proposed four-phase framework bridges this gap by aligning with the modern philosophy of window-based (peephole) optimization, explicitly formulated through a novel algebraic MINLP lens. By delegating the global topology search entirely to the Strict NCT library (Phase 1), the algorithmic branching factor is drastically reduced compared to performing global searches directly in the broader NCV domain. We then exploit the flexibility of the solver to produce equivalent NCT structures that expose advantageous gate boundaries. Finally, we apply exact optimization locally, using small, bounded sliding windows in the NCV domain (Phases 3 and 4). This architecture achieves near-exact optimization for deep circuits, successfully generating competitive NCV upper bounds (e.g., 14 for the TSG gate and 12 for the MKG gate) while maintaining entirely tractable computation times. To the best of our knowledge, there are no better solutions for these specific circuits reported in the literature.

6.2. Comparison of Quantum Costs and Physical Validity

Table 3 presents a comprehensive numerical comparison of our results against standard literature benchmarks. By implicitly comparing our generated circuits against established baseline topologies documented in heuristic catalogs (e.g., Surekha [3]), we demonstrate significant cost reductions while strictly enforcing physical validity.

Table 3. Comparison of Optimal Realizations vs. Literature Benchmarks.

Target Primitive		Strict NCT Library			NCV Library
Name	Function Type	Toffoli Count	Gate Count	NCT Cost	Standard NCV Cost [3]	Proposed NCV Bound
MIG	Parity-Preserving	1	5	9	7	7 (Optimal)
SAYEM	Parity-Preserving	1	5	9	7 1	9 (Rigorous Limit)
URG	Universal ($3\times 3$)	1	3	7	7	7
TSG	General ($D\ne 0$)	2	9	17	17	14 (17.6% Red.)
MKG	General	2	8	16	17	12 (29.4% Red.)

¹ Denotes a theoretically disputed heuristic cost, as discussed in the text.

A prominent example of this distinction is the parity-preserving SAYEM gate. Heuristic literature frequently cites an NCV cost of 7 for the SAYEM gate by manually mapping it to an unoptimized Fredkin–Feynman cascade. However, establishing true NCV costs via manual cascading often relies on relaxed physical assumptions, such as permitting output permutations (i.e., allowing the final variables to be routed to different physical pins than strictly defined) or omitting phase-correction overhead. When strictly enforcing exact pin-to-pin correspondence and zero-phase boundaries, our exact synthesis establishes the optimal topology at exactly 1 Toffoli and 4 CNOTs. This establishes a rigorous, routing-correct NCV Upper Bound of 9, derived strictly from the optimal NCT topology, rather than a proven global NCV minimum.

Furthermore, for simpler primitives such as the URG gate, Phase 1 alone is sufficient to identify the absolute optimal topology. For the highly complex MKG and TSG gates, our proposed framework successfully yields NCV upper bounds of 12 and 14, respectively, significantly outperforming best-known designs.

7. Conclusions

This paper presented a generalized computational synthesis framework bridging the gap between FTQC-compliant high-level synthesis (NCT) and physical implementation optimization (NCV). By extending this optimization to the NCV library via a combination of Toffoli permutation, gate cancellation, and complex-valued local search, we achieved highly optimized NCV costs of 7 for MIG, 14 for TSG, and 12 for MKG, significantly improving upon widely cited benchmarks.