A Review of Formal Methods in Quantum-Circuit Verification

Abstract

Quantum computing exploits the principles of quantum mechanics to perform computation. Information is stored in qubits and processed with a sequence of quantum gates arranged as circuits. Verifying the correctness of quantum circuits is becoming essential as hardware scales in qubit count and architectural complexity. Traditional testing and naive simulation do not scale and quickly become computationally infeasible because the state space grows exponentially. This creates a strong need for more powerful and scalable verification techniques. Formal methods offer a viable solution by providing mathematically rigorous and scalable verification techniques that address these scalability challenges through abstraction, symbolic reasoning, and probabilistic guarantees. This study examines how formal methods are applied to quantum-circuit verification. Specifically, four families of formal techniques: barrier certificates, abstract interpretation, model checking, and theorem proving are examined, along with the theoretical foundations and practical applications of these techniques. Finally, the study highlights open challenges and identifies promising directions for future research. An extensive set of references is included to support further study and exploration.

1. Introduction

Quantum computing promises algorithmic advantages for select problems by exploiting superposition, interference, and entanglement. The field has advanced rapidly in recent years [1,2,3,4,5,6]. Progress has been driven by key contributions from industry and academia. Quantum processors are becoming more realistic, and error-correction techniques are steadily improving [7,8,9,10,11].

Major technology companies have played a key role in this progress. Google, IBM, and Amazon have significantly improved their quantum hardware platforms. They have also experimentally demonstrated the effectiveness of modern quantum-error-correction codes [12,13,14].

Microsoft has taken a different approach by focusing on topological quantum computing. Their work demonstrates architectures that promise more robust qubits and gate operations [15].

Together, these advances help quantum computing transition beyond the Noisy Intermediate Scale Quantum (NISQ) era. They point toward quantum architectures capable of reliable and fault-tolerant computation. The goal of fault-tolerant quantum computing is thus being realized.

As experimental platforms grow in qubit count and circuit depth, ensuring that implemented circuits preserve intended semantics becomes increasingly important for both research and deployment. Correct execution of quantum algorithms is a critical concern. Quantum circuits are the primary abstraction for describing quantum algorithms. Thus, their correctness verification is critical and urgent.

Verifying quantum systems is fundamentally difficult. Most quantum processes cannot be efficiently simulated on classical computers due to their complexity and state space explosion. As a result, many traditional verification techniques do not scale as qubit count increases. Empirical testing alone is not sufficient to validate quantum behavior due to differences in the behavior of quantum systems (superposition, entanglement, measurement) from classical circuits. Such testing provides limited coverage and weak correctness guarantees. For these reasons, alternative verification approaches are necessary.

Formal verification provides a rigorous way to validate complex systems. It uses mathematical reasoning and proofs to ensure design correctness. Unlike traditional testing, formal verification explores the entire design space. It does not rely solely on sampled behaviors. This makes it possible to detect subtle corner case bugs that testing may miss. Because of these strong guarantees, formal verification is widely used in safety and reliability-critical domains. These include software systems, hardware design, and VLSI design verification [16,17,18].

Formal methods are also applied to quantum-circuit verification. Formal methods are not a single replacement for testing or simulation, but a set of complementary tools that provide strong guarantees when their modeling assumptions and abstractions are explicit [19,20].

Why formal methods for quantum circuits? Two practical observations motivate this choice. First, classical test and sampling methods cannot exhaustively explore the $2^n$-dimensional state space of an n-qubit system, as qubit count increases. Second, the algebraic structure of quantum gates (unitarity, reversibility, and linearity) and their many domain uses (e.g., compiler transformations, error correction) admit symbolic and/or algebraic encodings that formal tools can exploit. Taken together, these points make formal methods both relevant and tractable if the verification problem is posed with suitable abstractions.

Table 1 compares the four formal methods discussed in this study. It looks at their computational complexity, level of automation, and soundness guarantees.

Table 1. Comparative outlook of formal methods.

Method	Complexity	Automation	Soundness
Barrier Certificates	Polynomial in circuit depth; convex optimization; scales with polynomial degree	High	Complete for existence proofs; probabilistic with scenario approach
Abstract Interpretation	Polynomial in circuit size for fixed abstract domains; exponential in precision	High	Sound by construction; may produce false positives
Model Checking	Exponential in worst case; symbolic methods achieve polynomial for structured circuits	Medium (requires state encoding)	Complete for finite state models
Theorem Proving	User-guided; proof complexity depends on automation	Low (interactive)	Highest assurance (machine-checked)

Table 2 compares the different techniques in terms of scalability, common use cases, and the current state of tool support.

Table 2. Scalability, use cases, and tool support of various formal methods.

Method	Scalability	Typical Use Cases	Tool Support
Barrier Certificates	Good for structured & continuous; Demonstrated up to 30 qubits; limited by non-Clifford gates	Safety/reachability	Early stage; prototype (MATLAB, Python implementations); no production tools
Abstract Interpretation	Very good; Hundreds of qubits for Clifford-dominated circuits; degrades with entanglement	Robustness, variational quantum circuits	Early stage; research prototypes; QVerify for VQCs
Model Checking	Variable; 20–30 qubits with BDDs; tensor decision diagrams improve scalability	Temporal, discrete protocols	Early stage; prototype (QMC, AutoQ); emerging integration with quantum SDKs
Theorem Proving	poor; Verified small-to-medium algorithms (Shor’s, QPE)	semantic preservation, compiler proofs	Early stage; prototype (Coq/Qwire, Isabelle/HOL, Giallar)

This work presents a concise study of formal methods for quantum-circuit verification. Specifically, four families of formal techniques: barrier certificates, abstract interpretation, model checking, and theorem proving. It covers both the theoretical foundations and practical applications of these techniques. The study examines several key approaches. These include barrier certificates, abstract interpretation, model checking, and theorem proving. It compares their strengths and limitations in a systematic manner. Finally, it highlights promising research directions for addressing the verification challenges posed by increasingly complex quantum systems. Unless stated otherwise, all guarantees discussed in this study are conditional on the chosen model, abstraction, and specification, and do not remove worst-case exponential complexity.

As shown in Table 1 and Table 2, each method has its own strengths. Barrier certificates are efficient for safety checks using convex optimization. Abstract interpretation gives automatic analysis with sound approximations. Model checking provides full verification for finite-state models. Theorem proving offers the strongest assurance with machine-checked proofs. The best choice depends on the task, available resources, and the level of assurance required. Each method is explained in detail in the following sections.

2. Background

This section introduces the background needed to understand qubits and quantum circuits. It also presents the general formal verification techniques used in verification.

2.1. Qubits & Quantum Circuits

Quantum circuits are fundamentally different from classical circuits. This difference arises from the unique properties of quantum information. Classical bits can take only one of two definite values, 0 or 1. In contrast, quantum bits, or qubits, can exist in superpositions of basis states. Qubit states are described using complex-valued probability amplitudes [21,22].

A single-qubit state is written as

$$|\psi ⟩=\alpha |0⟩+\beta |1⟩,$$

(1)

where $|\psi ⟩$ represents the quantum state. The vectors $|0⟩$ and $|1⟩$ form the computational basis. The coefficients $\alpha$ and $\beta$ are complex numbers. The squared magnitudes of these coefficients determine measurement outcomes. Specifically, ${\left|\alpha \right|}^2$ and ${\left|\beta \right|}^2$ give the probabilities of measuring $|0⟩$ and $|1⟩$. These probabilities must sum to one, which leads to the normalization condition

$${\left|\alpha \right|}^2+{\left|\beta \right|}^2=1.$$

(2)

The computational basis vectors are defined as

$$|0⟩=\left[\begin{array}{c}1\\ 0\end{array}\right],|1⟩=\left[\begin{array}{c}0\\ 1\end{array}\right].$$

(3)

Similarly, the state of an n-qubit quantum system, denoted by $|\psi ⟩$, is described using $2^n$ complex probability amplitudes. The state can be written as

$$|\psi ⟩=\sum _{x\in {\{0,1\}}^n}{c}_x|x⟩.$$

(4)

Each basis state $|x⟩$ has an associated amplitude $c_x$. The probability of measuring the system in state x is given by

$$p_x={\left|c_x\right|}^2.$$

(5)

All measurement probabilities must sum to one. This normalization condition is expressed as

$$\sum _{x\in {\{0,1\}}^n}{\left|c_x\right|}^2=1.$$

(6)

Qubits can also become entangled. Entanglement creates non-classical correlations that cannot be reproduced by any classical system. These properties allow quantum algorithms to outperform classical algorithms for certain tasks. At the same time, they introduce significant challenges for verifying quantum circuits.

A quantum circuit is represented as a sequence of quantum gates acting on a set of qubits [21]. Each gate applies a unitary transformation to the qubits. Common single-qubit gates include the Pauli operators (X, Y, Z), the Hadamard gate, and various phase gates. Multi-qubit gates, such as the CNOT (controlled-NOT) gate, can create entanglement between qubits.

Verification of quantum circuits is challenging because the state space grows exponentially with the number of qubits. An n-qubit system occupies a Hilbert space of dimension $2^n$, making classical simulation not feasible for large circuits.

2.2. Formal Verification Principles

As introduced in Section 1, formal verification involves mathematically proving or disproving that a system meets a formal specification. Unlike testing, which checks only a finite set of inputs or execution paths, formal methods reason about the entire state space and all possible evolutions of a system. This allows them to guarantee correctness, safety, or compliance with specifications for every possible input, timing, or quantum state, and not just the cases tested. In other words, formal methods provide mathematical certainty, while testing can only show that errors are absent in the scenarios that were actually checked.

Formal verification approaches can be grouped into three main categories:

1.

Deductive verification: Proving correctness properties using mathematical proof systems.

2.

Model checking: Verifying finite state systems against temporal logic specifications.

3.

Abstract interpretation: Analyzing system behavior using sound semantic approximations.

In quantum systems, formal verification faces unique challenges. These arise from superposition, entanglement, measurement, and decoherence. Classical methods must be carefully adapted to be employed for quantum-circuit verification. They need to handle the quantum effects while staying computationally feasible.

3. Barrier Certificates

This section introduces barrier certificates, an important method used to verify quantum circuits. They come from classical dynamical systems theory, where they separate safe and unsafe regions [23]. Recent research has also found links between quantum entanglement and nonlinear dynamics, which motivates using barrier certificates in quantum verification [24].

3.1. Foundations

Barrier certificates are an effective method for verifying safety properties of dynamical systems [23]. They guarantee that system trajectories never reach unsafe or undesirable states. More recently, barrier certificates have been extended to the verification of quantum circuits [23,24,25,26]. A barrier certificate captures all possible executions of a system using a single real-valued function. This function separates safe regions from unsafe regions of the state space.

Formally, a barrier certificate for a quantum system is defined as a function $B:\mathcal{H}\to \mathbb{R}$ defined on the Hilbert space $\mathcal{H}$. It must satisfy three main conditions:

$$1.\mathrm{Initial}\mathrm{state}\mathrm{condition}:\forall |{\psi }_0⟩\in \mathcal{I},B\left(\right|{\psi }_0⟩)\le 0,$$

(7)

$$2.\mathrm{Unsafe}\mathrm{state}\mathrm{condition}:\forall |{\psi }_u⟩\in \mathcal{U},B\left(\right|{\psi }_u⟩)>0,$$

(8)

$$\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em} 3.\mathrm{Decrement}\mathrm{condition}:\forall |\psi ⟩\in \mathcal{H},\forall U\in \mathcal{G},B(U|\psi ⟩)-B\left(\right|\psi ⟩)\le 0,$$

(9)

where $\mathcal{I}\subseteq \mathcal{H}$ is the set of initial states, $\mathcal{U}\subseteq \mathcal{H}$ is the set of unsafe states, and $\mathcal{G}$ is the set of unitary transformations corresponding to quantum gates. The decrement condition ensures that B is non-increasing under circuit evolution, guaranteeing that trajectories starting from $\mathcal{I}$ never enter $\mathcal{U}$. This means that the trajectories starting from any initial state never enter the unsafe region at any given time step. The existence of such a barrier certificate guarantees safety over an unbounded time horizon. This approach avoids explicit state or time enumeration and therefore mitigates the state space explosion problem to some extent.

Quantum circuits can be viewed as dynamical systems, which makes barrier certificates well-suited for their verification. An n-qubit state $|\psi ⟩$ resides in ${\mathbb{C}}^{2^n}$ and satisfies the normalization condition ${\sum }_i{\left|{\psi }_i\right|}^2=1$$⟨\psi |\psi ⟩=1$. Each quantum gate acts as a unitary linear transformation, producing a trajectory in the state space [26]. Safety and correctness properties can be expressed as polynomial or semi-algebraic constraints on the amplitudes. These include properties such as bounds on measurement probabilities and the preservation of logical subspaces. This algebraic structure naturally aligns with polynomial barrier certificates and sum-of-squares reasoning.

3.2. Connection to Nonlinear Dynamics and Entanglement

Barrier certificates for quantum systems can be better understood by comparing quantum entanglement to non-linear dynamics [27]. Chaotic systems are highly sensitive to small changes, and highly entangled quantum states also show complex correlations that make verification harder. Recent work shows that entanglement in quantum circuits can be viewed as a form of dynamical instability [28].

This connection has important implications for barrier-certificate synthesis. When entanglement grows quickly, the barrier function usually needs to be more complex. Circuits with high entanglement often need higher-degree or exponential barriers, while circuits with low entanglement (circuits that preserve stabilizer structure) can use simpler polynomial barriers.

In this view, the barrier conditions (Equations (7)–(9)) act like a boundary between stable and unstable regions in the quantum state space. The barrier function B works like a Lyapunov function, helping ensure the system stays in a safe region. This connection brings ideas from classical dynamical systems into quantum verification and helps guide the choice of barrier functions based on the expected entanglement structure.

3.3. Scenario-Based Approach

A key advancement in barrier certificate synthesis for quantum circuits is the scenario-based approach [24,29,30]. Scenario-based synthesis uses sampled trajectories over both finite and infinite time horizons to construct barrier certificates. It explicitly accounts for uncertainties in initial states and system dynamics. These features make it well-suited for noisy quantum systems, where exact knowledge of all parameters is often impossible.

This approach converts the verification problem into a convex optimization problem using sampled constraints. The resulting guarantee is probabilistic rather than absolute. This means that it is guaranteed to hold on unseen cases up to a user-chosen failure level. The designer selects a target violation probability $\epsilon$ and a confidence level $1-\beta$. The number of scenarios N is then chosen so that the synthesized certificate violates the property with probability at most $\epsilon$, with confidence at least $\beta$. Larger values of N reduce the failure probability but increase computational cost. Concretely, the method can ensure correctness with a confidence level of at least $1-\beta$ (e.g., $\beta ={10}^{-6}$), provided enough independent samples are used, typically scaling as $O(1/\beta )$ [29]. However, this guarantee depends on the sampling assumptions and may not detect rare violations.

The method offers several practical benefits for quantum-circuit verification:

1.

Supports the continuous state spaces inherent to quantum systems.

2.

Handles uncertain dynamics caused by quantum noise and device imperfections.

3.

Provides probabilistic guarantees of correctness.

4.

Works for both finite and infinite time horizons.

3.4. Application

Barrier certificates have been applied to verify the behavior of quantum systems. For example, in [26], the notion of barrier certificate is extended to complex variables, and the verification of Hadamard, phase, and controlled-not operations is elucidated. Grover’s search algorithm verification with up to 30 qubits is demonstrated in [24]. Researchers have tested various classes of barrier certificates, such as polynomial, exponential, and rational functions. This helps determine the most effective type for each application. Table 3 summarizes these barrier certificate types. It highlights their strengths, limitations, and typical use cases.

Table 3. Barrier certificates and their applications.

Barrier Certificate Type	Strengths	Limitations	Ideal Use Cases
Polynomial	Efficient synthesis, scalability	Limited expressiveness	Linear and mildly nonlinear systems
Exponential	Handles exponential dynamics	Numerical stability issues	Systems with exponential convergence
Rational	High expressiveness	Complex optimization	Highly nonlinear systems
Scenario-based	Handles uncertainty, probabilistic guarantees	Sampling may miss rare cases	Noisy quantum systems

To verify a quantum circuit using barrier certificates, the circuit is first encoded as a discrete-time complex dynamical system. Polynomial descriptions of the initial and unsafe sets are also defined. Next, a barrier function template is chosen based on the expected entanglement structure and circuit characteristics. This is usually a real-valued polynomial in the real and imaginary parts of the quantum state. Verification conditions are then imposed to ensure that the initial and unsafe regions are separated and that the barrier does not increase along any gate-induced transition. These conditions can be solved using Hermitian sum-of-squares optimization to provide exact guarantees [26]. Scenario-based optimization combined with SMT solving can improve scalability [24]. Once the barrier certificate is synthesized and formally validated, it provides a sound and global correctness proof for the quantum circuit.

Case studies indicate that the choice of barrier function greatly affects both the efficiency and effectiveness of verification (Table 3). For many quantum circuits, polynomial barrier certificates offer a good balance between expressiveness and computational efficiency. More complex barrier functions may be needed for circuits with highly non-linear dynamics.

4. Abstract Interpretation

This section provides an overview of how abstract interpretation is applied to the formal verification of quantum circuits. Abstract interpretation is a static analysis technique that verifies program properties by computing sound over-approximations of program semantics in an abstract domain [31]. In quantum-circuit verification, abstract interpretation is useful because it avoids explicitly enumerating the exponentially large Hilbert space. Instead of tracking exact quantum states, it reasons over abstract representations, such as projection subspaces, stabilizers, or interval bounds on amplitudes [32]. Quantum circuits consist of structured, sequential unitary transformations. This makes them well-suited to abstract interpretations. This allows abstract transformers to be defined compositionally for each quantum gate.

Verification using abstract interpretation involves defining an abstract domain and a mapping to the original state space, implementing abstract gate semantics that conservatively approximate unitary evolution, and checking properties on the abstract states. This approach guarantees soundness and, for specific abstract domains (e.g., interval domains for reachability) and property types (e.g., robustness), can achieve polynomial time scalability. This behavior holds only for properties expressible in the chosen abstract domain. The abstraction compresses the quantum state and does not represent the full Hilbert space. As a result, polynomial complexity applies to abstract operations rather than to concrete-state simulation. For example, tuple-of-projections abstractions have been used to verify assertions on benchmark circuits with hundreds of qubits that are infeasible to simulate directly [32]. However, this scalability comes with precision trade-offs. The analysis may produce over-approximations that lead to false positives, and its applicability depends on the circuit structure and the chosen abstraction.

4.1. Semantic Framework

Abstract interpretation provides a theoretical framework for approximating the semantics of computational systems. It enables static analysis of program properties [32,33,34,35,36,37]. Recent work has extended this approach to variational quantum circuits (VQCs) [38,39]. VQCs form the basis of many quantum machine learning algorithms. Similar to classical deep neural networks, VQCs are vulnerable to adversarial inputs. Small deviations or perturbations in the input can cause incorrect outputs or predictions.

Assolini et al. [38] propose a semantic framework based on abstract interpretation for verifying VQCs. Their approach explicitly handles quantum-specific properties, such as state normalization. Normalization introduces dependencies between variables, which complicates traditional verification methods. This framework provides a formal way to define the verification problem for VQCs. It also offers tools to analyze the computational complexity of the verification process.

4.2. Interval-Based Reachability

Interval-based reachability analysis is a key technique in the abstract interpretation of quantum circuits. It computes over approximations of the reachable states at each layer of the quantum circuit [38,40,41,42]. This method propagates interval bounds through the layers of the circuit. In doing so, it provides formal guarantees about circuit behavior. However, quantum effects such as superposition and entanglement create dependencies between variables. These dependencies make interval analysis more challenging.

To address these challenges, researchers have developed enhanced abstraction techniques. These techniques explicitly track dependencies between variables. However, this added precision comes with a higher computational cost [43]. Finding the right balance between precision and efficiency remains an active research problem in quantum abstract interpretation.

4.3. Verification of Robustness Properties

Abstract interpretation is quite effective for verifying robustness properties of VQCs. It can be used to study how adverse perturbations affect circuit behavior. These techniques analyze how small changes in the input state influence the final measurement probabilities. In doing so, they provide formal robustness certificates. These certificates are similar to those used for classical neural networks [44,45,46,47,48]. The verification process typically follows four main steps:

1.

Defining a perturbation model for the input states.

2.

Propagating these perturbations through the quantum circuit using abstract domains.

3.

Computing bounds on the output measurement probabilities.

4.

Checking that classification decisions remain stable within the allowed perturbation range.

This methodology has been tested on standard verification benchmarks. The results show its potential for certifying the reliability of quantum machine learning models [49]. This makes it specifically important for safety-critical applications [50,51,52,53].

5. Model Checking

Model checking is a formal verification technique that systematically explores all possible states of a system. In quantum-circuit verification, it checks whether a circuit satisfies specified temporal-logic properties. Model checking is valuable because it provides complete, counterexample-driven verification for finite or symbolically representable quantum systems [54,55]. Quantum circuits can be modeled as finite-state transition systems or quantum Markov chains. This is done by discretizing their evolution or focusing on basis states and measurement outcomes. This structure allows the use of temporal logics, including probabilistic extensions, to specify correctness, safety, or termination properties. This approach has been the subject of extensive research [56,57,58,59,60,61,62,63,64].

For quantum circuits, model checking typically follows three main steps:

1.

Encoding the quantum circuit as a finite-state model.

2.

Expressing the desired properties using suitable temporal logics.

3.

Checking these properties against the encoded model.

Early work in this area verified quantum circuits by mapping them to quantum Markov chains. These models were then analyzed using model checking [55]. Other approaches extended probabilistic model checking. They account for the inherent randomness of quantum measurements and decoherence [65].

5.1. Symbolic Techniques and SMT Integration

In spite of having superior theoretical power, model checking faces serious scalability issues in quantum systems due to exponential state-space growth. The state space grows exponentially with the increase in the number of qubits. This makes exhaustive exploration of the state space impractical. To address this state explosion problem, symbolic model checking techniques have been developed. These methods use binary decision diagrams (BDDs) and related compression strategies [66,67,68,69,70,71,72]. They achieve varying levels of success in improving scalability. For example, BDD-based approaches have verified equivalence for circuits with up to 30 qubits in controlled settings, but runtime and memory usage can grow rapidly beyond this range. [68]. Tensor decision diagram-based image computation demonstrates scalability to circuits such as Grover (20), with runtimes in the order of seconds under favorable partitioning strategies [73].

A significant recent advancement is the integration of Satisfiability Modulo Theories (SMT) solvers into quantum model checking workflows. Modern verification frameworks leverage SMT solvers to handle constraints generated from quantum programs efficiently. The AutoQ tool [63] uses automata-based representations combined with SMT reasoning to verify quantum circuits. This hybrid approach enables:

1.

Efficient handling of arithmetic constraints on quantum amplitudes.

2.

Symbolic representation of measurement outcomes and probabilities.

3.

Integration with classical control logic in hybrid quantum-classical circuits.

4.

Counterexample generation for property violations.

SMT-based model checking has been particularly effective for verifying quantum programs with significant classical components, such as those arising in quantum error correction and hybrid algorithms [35,63,74]. The combination of symbolic state representation and SMT solving pushes the scalability envelope while maintaining completeness for finite-state models.

5.2. The Classical Simulability Threshold

Model checking works well only when a circuit is below the classical simulability threshold [75]. For Clifford-heavy circuits, stabilizer methods can compress the state efficiently using tableau methods [76], and model checking grows only polynomially with the number of qubits.

For circuits with many non-Clifford gates (high T-count or T-depth), the cost often grows exponentially. The number of stabilizer terms increases quickly, and compression becomes less useful. This result is based on known classical simulation limits and should guide the choice of verification method. In certain scenarios, circuits are split into Clifford parts, checked symbolically, and non-Clifford parts, checked with bounded techniques. This approach helps in practice, even though the worst-case cost is still exponential.

5.3. Tool Support and Applications

Several model checking tools have been developed for quantum verification. QMC (Quantum Model Checker) provides early support for quantum protocols [54]. AutoQ [63] implements automata-based verification with SMT integration. The qMC framework [58] targets superconducting quantum logic. These tools have been applied to verify quantum error correction protocols, communication protocols, and small-to-medium scale quantum algorithms.

Despite these advances, model checking tools remain at the prototype stage (Table 2). Production-ready integration with quantum software development kits is limited, and tool maturity varies significantly. Standardized benchmarks and input formats are needed to accelerate tool development and comparison.

6. Theorem Proving

Theorem proving is a deductive method for verifying quantum circuits. In this approach, correctness properties are established through formal logical proofs checked by a proof assistant [77]. As theorem proving produces machine-checked logical proofs, it offers the highest level of assurance for the properties it expresses. However, this assurance is conditional. It applies only to the formal model and specification that the developer encodes.

Quantum circuits have rich algebraic and mathematical structures, such as unitary operators, linearity, and reversibility. These properties make them well-suited for formal reasoning in higher-order logic or dependent type theory. Theorem-proving methods typically formalize the semantics of quantum gates and circuits within a proof assistant. They then prove equivalence, invariants, or correctness theorems with respect to a specification. This approach has been implemented in proof assistants like Coq, Isabelle/HOL, and Lean. These tools are often enhanced with specialized libraries for quantum computation [78,79,80,81,82].

6.1. Integration with SMT Solvers

SMT solvers have been integrated into theorem proving for quantum circuits to automate proof obligations. Modern verification workflows combine the expressiveness of interactive theorem proving with the automated reasoning power of SMT solvers. This hybrid approach addresses the scalability limitations of pure interactive proof while maintaining high assurance.

The Giallar tool [83] exemplifies this approach for quantum compiler verification. Giallar uses SMT solvers to verify that compiler passes preserve quantum semantics. The verification process involves:

1.

Translating quantum circuits into logical formulae capturing gate semantics.

2.

Encoding compiler transformations as logical relations between input and output circuits.

3.

Using SMT solvers to check equivalence or semantic preservation conditions.

4.

Generating counterexamples when verification conditions fail.

Rotational abstractions for verification of quantum Fourier transform circuits [74], and Superposition-Based Abstractions for Quantum Data Encoding Verification [84] elucidate a symbolic deductive abstraction approach to quantum-circuit verification using SMT solvers. These examples show that theorem proving can produce certified, end-to-end results for non-trivial quantum algorithms. At the same time, interactive proof developments are often labor-intensive and require careful modeling of assumptions and bounds. This makes it less suitable for rapid iteration in quantum circuit design workflows.

6.2. Limitations

Despite these advances, theorem proving remains labor-intensive compared to fully automatic methods. Interactive proof development requires significant expertise and careful modeling of assumptions. The integration of SMT solvers automates many proof obligations, but users must still provide high-level specifications and proof strategies.

The choice between interactive theorem proving and SMT-based automation involves trade-offs between assurance level, automation, and scalability. Interactive proofs provide the highest assurance but scale poorly with circuit size. SMT-based approaches offer greater automation but may miss subtle bugs that require inductive reasoning or complex invariants. Hybrid workflows that combine both approaches are emerging as the preferred methodology for high-assurance quantum verification.

6.3. Runtime Verification

Runtime verification monitors the execution of a quantum circuit to check whether it satisfies specified properties. Although it does not provide full formal guarantees, it can detect property violations during testing or actual operation. This makes runtime verification practical for near-term quantum applications [63,83,85,86,87,88,89,90,91]. The runtime verification process typically involves three main steps:

1.

Instrumenting the quantum circuit with extra measurement operations.

2.

Defining assertions like properties for specific circuit states.

3.

Performing statistical testing of these properties during execution.

Runtime verification is particularly useful for validating specific executions on quantum hardware. It serves as a complement to formal methods that analyze entire quantum circuit designs.

7. Applications

This section presents case studies that demonstrate the practical application of quantum-circuit verification.

7.1. Quantum Error Correction

Quantum error correction (QEC) is a key area where formal verification methods are employed. Fault-tolerant quantum computation depends on the correct operation of QEC circuits [92,93,94]. Formal methods have been used to verify different aspects of QEC implementations [95,96,97,98,99], including:

1.

The correctness of stabilizer measurements.

2.

Fault tolerance thresholds.

3.

The implementation of logical operations.

For example, barrier certificates effectively ensure that errors stay within correctable regions of the state space. Model checking is used to verify the sequential behavior of QEC protocols under various fault models.

7.2. Compiler Verification

Quantum circuits are typically written in high-level programming languages and then compiled into hardware-specific instructions. This makes verifying the correctness of the compilation process both critical and essential [37,85,87,89,100,101,102,103]. The Giallar tool [83] uses SMT solvers to check that each compiler pass preserves the semantic integrity of the quantum circuit. This verification process usually involves three main steps:

1.

Translating quantum circuits into logical formulae.

2.

Checking equivalence between the original and compiled circuits.

3.

Verifying that the optimization rules applied during compilation are correct.

Compiler verification is critical for quantum applications where correctness is essential. Small compilation errors can lead to incorrect results, which in safety-critical settings (e.g., quantum error correction or algorithmic circuits) can invalidate algorithmic correctness and result in operational failures.

7.3. Quantum Algorithms

Formal methods have been used to verify the correctness of various quantum algorithms [104,105]. These include Grover’s search algorithm [106], quantum phase estimation [107,108], and quantum approximate optimization algorithms (QAOAs) [109], among others.

Each algorithm presents its own verification challenges:

1.

Grover’s algorithm: Verification requires proving convergence and establishing bounds on the success probability.

2.

Quantum phase estimation: Verification involves ensuring precision guarantees under different noise models.

3.

QAOA: Verification focuses on approximation ratios and convergence properties.

These verifications often use a combination of formal techniques. For example, barrier certificates can be used to establish safety properties, while theorem proving ensures functional correctness. The benefits of each method can thus be exploited depending on the application. Recent studies show the use of combined techniques, privacy-preserving bidirectional data transmission in quantum networks [110], and semi-quantum private comparison protocol [111].

The choice of verification method generally depends on the type of problem. Barrier certificates or abstract interpretation are suitable for systems with large or continuous state spaces. Model checking works well when exhaustive exploration of discrete transitions is feasible. Theorem proving or SMT-based methods are used when semantic correctness or equivalence must be guaranteed across transformations. Runtime verification is useful for detecting errors during actual hardware execution. Hybrid approaches can combine these techniques to balance scalability, automation, and formal guarantees. This allows the verification method to be adapted to the structure and requirements of the quantum system.

As shown in Table 4, verification methods are chosen based on the characteristics and challenges of each quantum computing domain. For quantum error correction, barrier certificates and model checking are particularly suitable. They rigorously guarantee the stability and correctness of feedback-controlled stabilizer circuits across all possible error trajectories. Barrier certificates handle continuous state-space dynamics, while model checking systematically explores discrete syndrome transitions. This combination makes them ideal for the safety-critical nature of error correction.

Table 4. Applications of formal verification in quantum computing.

Domain	Verification Methods	Challenges	Tools
Quantum Error Correction	Barrier certificates, Model checking	Complexity of feedback control	QECVerifier, QuaVer
Quantum Compilers	Theorem proving, SMT solvers	Semantic preservation across layers	Giallar, Quartz
Quantum Algorithms	Abstract interpretation, Barrier certificates	Handling exponential state spaces	QVVerify, CertiQ
Quantum Hardware	Model checking, Runtime verification	Modeling physical imperfections	HQVer, PulseVerifier

In quantum compilers, theorem proving and SMT solvers focus on semantic preservation across multiple compilation layers. The algebraic and logical structure of quantum gates allows formal deduction. It helps to verify that transformations and optimizations preserve program semantics. This ensures correctness for all possible input states.

Quantum algorithms, which often operate on exponentially large state spaces, benefit from abstract interpretation and barrier certificates. Abstract interpretation approximates sets of quantum states to efficiently check invariants. Barrier certificates provide mathematically rigorous safety guarantees without enumerating all states. Both approaches enable scalable verification.

For quantum hardware, model checking and runtime verification are effective. They capture both the discrete and continuous aspects of physical imperfections. Model checking systematically explores control sequences and configurations. Runtime verification monitors live signals to detect deviations from expected behavior.

8. Challenges and Limitations

This section presents a critical assessment of the challenges and limitations in current quantum-circuit verification methods. Abstraction reduces state complexity but discards some concrete information. Typical losses include amplitude, phase details, and correlations across distant qubits. Modular verification works well if modules interact weakly, but it can fail when entanglement spans module boundaries. Symbolic compression (BDDs, tensor decision diagrams) is effective when the circuit exhibits regular structure or limited entanglement. Its compression factor drops for highly entangled or random circuits. Scenario-based methods reduce verification cost by sampling, but the required sample size grows with the number of optimization variables and with the desired confidence. Therefore, it is required to balance $\epsilon$ (allowed violation probability), $\beta$ (confidence), and N (samples). Stronger guarantees always come at a measurable cost in computation, modeling effort, or sample size. Three key challenges, scalability, quantum-specific capabilities, and tool support are listed below.

8.1. Scalability

A major challenge in quantum-circuit verification is the exponential growth of the state space as the number of qubits increases linearly. Figure 1 elucidates a conceptual comparison of how each method addresses the verification problem and manages state explosion. As depicted, model checking employs symbolic compression and decision diagrams, while theorem proving utilizes inductive invariants and machine-checked proofs to address the exponential state space growth. Barrier certificates do not do state enumeration and employ continuous separating functions, and abstract interpretation exploits sound approximation techniques in abstract domains, trying to maintain scalability.

Figure 1. Conceptual comparison of how each formal method addresses the state explosion problem. Barrier certificates use continuous functions to separate safe/unsafe regions without state enumeration (blue curve). Abstract interpretation employs sound over-approximations in abstract domains (grey dots within red box). Model checking leverages symbolic compression through decision diagrams. Theorem proving relies on compositional reasoning and inductive invariants.

Scalability remains dominated by the classical simulability threshold.

1.

Clifford dominated circuits: Exact symbolic compression (stabilizer formalism, tableau methods) and symbolic model checking frequently succeed. Verification scales polynomially with qubit count for circuits dominated by Clifford gates.

2.

High non-Clifford content: Verification costs typically grow exponentially with the number of non-Clifford generators (T-count, T-depth) or with circuit entangling width. Practical methods resort to approximations, including stabilizer rank decompositions, tensor network contraction heuristics, and bounded-error statistical certificates.

This distinction is empirically grounded and theoretically connected to classical simulation results. It helps to guide method selection in practice. Current approaches try to address this challenge using:

1.

Abstraction and approximation techniques that trade completeness for scalability.

2.

Modular verification, which breaks large circuits into smaller components.

3.

Symbolic methods that represent sets of quantum states compactly.

Despite these strategies, verifying circuits with many qubits remains difficult. This underscores the need for further research into scalable verification techniques and methodologies.

8.2. Quantum-Specific Capabilities

Quantum phenomena such as entanglement, superposition, and measurement create verification challenges that do not have a classical equivalent. These effects produce complex correlations between qubits that are hard to abstract or approximate without losing important information.

Measurement and Non-Unitary Semantics

A major modeling and verification challenge is the proper treatment of measurement and other non-unitary operations. The following approaches have been developed recently:

1.

Density-matrix/super-operator semantics: Model gates and noisy channels as completely positive trace preserving (CPTP) maps $\mathcal{E}\left(\rho \right)$ [112]. This captures mixed states and partial traces but increases dimension and computational cost.

2.

Kraus decomposition abstractions: Use parametric Kraus sets to represent measurement noise and non-unitary steps. Verify properties in an abstract (sound) domain, tracking probabilities, and post-measurement subspaces [113].

3.

Relational/probabilistic program logics: Adopt logics where assertions are distributions or linear functions on density operators. Soundness proofs reason about expected measurement outcomes, generalizing classical Hoare logics to quantum CPTP maps [114].

Each approach involves trade-offs between expressiveness and tractability. Approaches employed to address these challenges include:

1.

Creating specialized abstract domains to capture quantum correlations.

2.

Designing verification techniques that are aware of measurements.

3.

Using relational logics to represent and reason about entanglement.

8.3. Tool Support

Many tools have been developed for quantum-circuit verification. The ecosystem is still less mature than that for classical software verification. Most tools require significant expertise to use. They are often tailored to specific verification methods or quantum programming languages. While Table 2 captures the tool maturity status based on the verification method, Table 5 captures the current state of the available tools.

Table 5. Illustrative representation of tool maturity.

Tool/Framework	Function	Maturity
Giallar	Compiler equivalence	Early; prototype
QAFNY/CertiQ	Program verification	Early; prototype
QVVerify	Algorithmic verification	Early
QMC/PPMC model checkers	Model checking	Prototype
QECVerifier, QuaVer	QEC correctness	Early

Checklist for Assessing Tools

1.

Input language compatibility: Does the tool accept mainstream quantum Intermediate Representations (OpenQASM, Quil, Q#, etc.)?

2.

Automation level: How much manual effort is required per verification target?

3.

Scalability: What qubit counts, and gate depths have been demonstrated, and under which circuit families?

4.

Soundness guarantees: Does the tool provide machine-checked soundness (formal proofs) vs. high confidence numeric certificates?

5.

Interoperability: Can it export proofs and counterexamples to theorem provers or SMT solvers?

This practical checklist helps readers choose appropriate implementations. Improving tool support will require:

1.

Standardizing interfaces between verification tools and quantum programming frameworks.

2.

Creating user-friendly interfaces for specifying verification properties.

3.

Establishing elaborate benchmark suites to evaluate and compare verification tools.

4.

Automating the choice of the most suitable verification method for a given circuit.

9. Future Directions

This section presents key challenges and future research directions in quantum-circuit verification. It focuses on practical feasibility, current limitations, and open theoretical problems.

9.1. Hybrid Verification Methods

Future verification frameworks are likely to combine multiple techniques into hybrid approaches. These approaches can leverage the strengths of each method. For example, abstract interpretation can quickly identify potential problem areas. These areas can then be examined in detail using more precise methods, such as theorem proving or model checking. Promising hybrid combinations include:

1.

Using barrier certificates together with abstract interpretation for safety verification.

2.

Combining theorem proving with model checking to verify both functional and temporal properties.

3.

Augmenting runtime verification with formal methods to provide practical assurance.

A practical hybrid pipeline should address the following:

1.

Decomposition policy: A clear way to split a circuit into an easy part (mostly stabilizer gates) and a harder part with few non-Clifford gates. The main question is whether this split can be done automatically with proven size limits. Current methods are heuristic and may fail in hard cases.

2.

Interface semantics: The symbolic and numeric parts must connect in a clear and verified way. This needs a small translator that maps symbolic results into assumptions for numeric tools. Building verified links between tableaus, stabilizer forms, and tensor networks is still an open problem.

3.

Error accumulation: Numeric methods add small errors. We need results that bound the total error in terms of local errors, similar to ideas in numerical analysis. Such guarantees are still limited in the current work.

A focused hybrid verification workflow for stabilizer QEC (e.g., surface code) is given below:

1.

Model syndrome extraction as a discrete transition system (syndrome states + syndrome update rules).

2.

Use model checking for the discrete syndrome protocol and barrier certificates for continuous errors bounded within correctable regions.

3.

Combine results to show that, under the assumed noise model, errors remain within the logical correctable set and logical operations preserve code invariants.

A hybrid strategy for compiler verification is provided below:

1.

Encode the source and target circuits symbolically (SMT formulas or intermediate algebraic form).

2.

Prove semantic preservation for each compiler pass (local rewrite proofs) using SMT/theorem proving or automated equivalence checking for restricted gate sets (e.g., Clifford+T).

3.

When full proof is expensive, use abstract interpretation to catch classes of semantic violations and employ interactive proofs for the remaining critical passes.

A hybrid approach for algorithmic verification:

1.

Grover: Prove convergence and success probability bounds using barrier certificates (to capture iterated amplitude amplification) and symbolic reasoning for the oracle behavior.

2.

Quantum phase estimation (QPE): Establish precision bounds via theorem proving on the phase kickback structure, augmented by model checking for time-bounded noise models.

3.

QAOA: Use abstract interpretation to bound expectation values under parameter perturbations, combined with numerical certification for specific parameter choices.

These approaches show how to mix multiple verification methods to exploit the benefits of each for different problem classes.

9.2. Machine Learning Assisted Verification

Machine learning (ML) offers promising ways to enhance formal verification of quantum circuits. While ML can accelerate heuristic choices (including variable ordering, partitioning, and template degrees) and predict verification failure modes, it cannot replace soundness guarantees. Thus, a realistic research approach can use ML assistance only to suggest candidate abstractions; the verification decisions remain with the sound engine (SMT/interactive proof) employed. Technical feasibility questions include:

1.

How to certify ML suggested invariants (e.g., by running a short verification check)?

2.

How to bound the probability of ML-induced misguidance (statistical validation and cross-validation on benchmark sets)?

3.

Whether learned heuristics generalize across circuit families or require retraining for each new architecture?

Potential applications include:

1.

Learning barrier certificates directly from simulation data.

2.

Predicting which circuit components are hard to verify, to focus verification efforts.

3.

Guiding abstract interpretation using learned heuristics.

4.

Speeding up model checking with learned representations of the state space.

Initial results suggest that ML can reduce verification time for specific circuit classes, but generalization remains limited. Open challenges include developing ML architectures that respect quantum-mechanical constraints and providing statistical guarantees of heuristic correctness.

9.3. Measurement and Non-Unitary Semantics

Quantum features like measurement and non-unitary operations are still not well developed. Important research tasks include:

1.

Designing program logics that work with density matrices and CPTP maps, and proving good completeness results. Current ideas exist, but they lack automation and tool support.

2.

Creating standard benchmark sets with measurement-heavy protocols, such as interactive protocols, teleportation-based compilers, and dynamic circuits, so different methods can be compared fairly.

3.

Proving lower bounds on verification complexity for certain noise and measurement models. This can help set realistic expectations and guide method choice.

Progress will come from solving these concrete technical problems, since each one can be studied with formal analysis and experiments.

9.4. Verifying Fault-Tolerant Quantum Computing

As quantum computing moves toward fault-tolerant operation, new verification challenges and opportunities emerge. Future research directions include:

1.

Verifying quantum error correction protocols under realistic noise models, capable of handling continuous error parameters and stochastic behavior.

2.

Developing verification techniques for distributed quantum systems, involving reasoning about communication and entanglement distribution.

3.

Establishing certification frameworks for quantum hardware components, demanding integration of physical modeling with formal verification.

4.

Creating standards for quantum software verification, requiring community consensus on specification languages and assurance levels.

Advances in these areas will be essential to building reliable and trustworthy quantum computing systems for critical applications.

9.5. Near-Term Research Agenda

We highlight key technical problems for near-term research:

1.

Automatic decomposition: Algorithms to split circuits into Clifford and non-Clifford parts with proven size bounds for the non-Clifford segments.

2.

Verified translation: Formally verified translators between stabilizer tableaux, tensor networks, and density matrix representations.

3.

Error composition: Theorems that bound how verification errors propagate in hybrid pipelines.

4.

ML certification: Methods that give statistical guarantees for verification results suggested by machine learning.

5.

Program logic automation: Automated theorem proving for quantum program logics, combining SMT solvers with quantum reasoning.

These focused problems provide clear paths toward scalable and reliable quantum-circuit verification.

10. Conclusions

Formal methods for quantum-circuit verification have made significant progress in recent years. They have evolved from theoretical frameworks to practical tools that can be applied to real quantum circuits. This study examines the current landscape of various methods, including barrier certificates, abstract interpretation, model checking, and theorem proving. Each method offers unique advantages and is suited to different verification scenarios.

Barrier certificates provide a strong method for safety verification. When combined with scenario-based approaches, they can handle uncertainties in initial states and system dynamics. Abstract interpretation gives a semantic framework for analysing variational quantum circuits and verifying their robustness. Model checking allows exhaustive verification of temporal properties. Theorem proving offers the highest level of assurance through rigorous mathematical proofs.

In spite of these advances, major challenges remain. Scaling verification to larger quantum systems and handling quantum-specific features like entanglement, superposition, and measurement are still difficult. Future research should focus on developing hybrid approaches that combine multiple verification techniques. It should also explore using machine learning to improve scalability and address the verification needs of fault-tolerant quantum computing.

As quantum computing moves closer to practical applications, formal verification methods will be increasingly important for ensuring the reliability and correctness of quantum software and hardware. Developing robust verification tools and methods will be key to building trust in quantum computing systems and unlocking their full potential to solve challenging and complex computational problems.