1. Introduction
This special issue explores the innovative and rapidly evolving field of data structures designed for Graphics Processing Units (GPUs). Originally designed for rendering graphics, GPUs have evolved as powerful parallel computing platforms, driven by their high computational throughput and energy efficiency, which make them well suited for data-parallel workloads [1]. Today, GPUs are widely used as general-purpose accelerators, significantly impacting domains such as scientific computing, artificial intelligence, and big data analytics [2,3].
This Special Issue contains eight papers that explore the development and optimization of data structures leveraging the parallel processing capabilities of GPUs to achieve significant performance enhancements. The papers present state-of-the-art research on various GPU-optimized data structures, showcasing innovative methods and addressing practical challenges.
By featuring both theoretical advancements and practical implementations, this Special Issue bridges the gap between traditional CPU-centric data structures and their GPU-optimized counterparts. This Special Issue provides readers with insights into techniques for maximizing GPU performance, making it an essential resource for researchers and practitioners seeking to exploit the full potential of GPU computing for data-intensive applications.
2. An Overview of Published Articles
Using GPU architectures efficiently requires a holistic approach that synchronizes parallel algorithms, hardware-aware data structures, and execution strategies. Although GPUs offer significant theoretical performance, practical gains are often limited by memory contention, synchronization overhead, and the complexities of irregular workloads.
Achieving high performance in memory-bound kernels depends on managing the memory hierarchy to ensure coalesced access and minimal latency. Modern techniques increasingly leverage larger L1/L2 caches and asynchronous memory copies to transform historically CPU-bound tasks into high-throughput GPU-resident operations [4].
On the other hand, synchronization remains a primary bottleneck, particularly in multi-GPU environments where CPU-mediated communication introduces significant latency. Emerging “CPU-Free” execution models seek to bypass the host entirely, utilizing persistent kernels and device-side synchronization to improve scaling [5]. At the warp level, thread divergence remains a challenge; researchers address this through warp-level intrinsics and specialized scheduling that mimics prefetching to hide memory stalls [6].
Regarding handling irregular and dynamic workloads, applications involving non-uniform data struggle with load imbalance. Modern strategies utilize hierarchical work-stealing and multi-level stack structures to maintain high occupancy, even when the recursion depth or data density is unpredictable [7].
The papers in this Special Issue demonstrate how carefully designing GPU-oriented data structures and computational kernels can significantly improve performance in many scientific and engineering applications. These contributions can broadly be divided into two categories: those proposing fundamental GPU data structures or optimization strategies and those demonstrating the impact of these techniques in demanding application domains.
The first group is composed of three articles that contribute core mechanisms for GPU computing by tackling fundamental GPU data structures and parallel optimization.
The first article (List of Contributions, 1) introduces the Boundary-Aware Concurrent Queue (BACQ), a high-performance First-In-First-Out (FIFO) queue designed specifically for massively parallel GPU environments. The proposed design operates at the warp level, exploiting intra-warp locality to reduce contention and improve throughput. BACQ replaces conflicting accesses to shared data with accesses to private data and employs a ticket-based ordering mechanism to ensure fairness while maintaining scalability. Experimental evaluations demonstrate that BACQ achieves over twice the performance of the state-of-the-art Broker Queue Work Distributor (BWD) queue while preserving FIFO semantics.
In another contribution (List of Contributions, 2), the authors investigate accelerating particle swarm optimization (PSO) for pricing American financial options using GPU architectures. They present a series of progressive optimizations, including kernel fusion, branch reduction, and explicit SIMD vectorization. These techniques significantly improve memory access patterns and reduce control divergence. The final GPU implementation is approximately 150 times faster than the CPU baseline, demonstrating the effectiveness of carefully designed GPU kernels for computational finance.
In complement to this work, the authors of (List of Contributions, 3) propose a High-Efficiency PSO (HEPSO) algorithm that is optimized for GPU architectures. This approach reduces the CPU–GPU communication overhead by performing data initialization directly on the GPU. It also introduces a self-adaptive thread management mechanism that improves execution efficiency. Experiments on benchmark optimization functions demonstrate that HEPSO is more than six times faster than conventional GPU-based PSO implementations.
The second group consist of five articles that demonstrate how GPU-oriented data structures and parallel execution models can significantly improve performance in computationally demanding domains.
The work (List of Contributions, 4) explores using multi-GPU systems to accelerate finite element analysis in structural mechanics. The proposed approach combines GPU-aware Message Passing Interface (MPI) with a distributed conjugate gradient solver and a smoothed aggregation multigrid preconditioner. Through extensive performance evaluations of various models and problem sizes, the study demonstrates the advantages and scalability of distributed many-core architectures for large-scale structural simulations.
In the field of quantum chemistry, the authors of (List of Contributions, 5) present an efficient GPU implementation of the McMurchie–Davidson method for calculating electron repulsion integrals. Their proposed framework generalizes previous implementations by supporting arbitrary azimuthal quantum numbers and exploiting parallelization through shell-based batching and shared-memory buffering. Experiments on an NVIDIA A100 Tensor Core GPU (NVIDIA, Santa Clara, CA, USA) demonstrate significant performance enhancements, including improvements of up to 72× over prior GPU implementations and gains of several orders of magnitude compared with a naive CPU approach.
A related contribution (List of Contributions, 6) addresses the GPU acceleration of Fock matrix construction, which is a computational bottleneck in Hartree–Fock calculations. The authors propose a strategy that decomposes the matrix into multiple replicas, thereby reducing contention caused by concurrent atomic updates. By distributing these operations across the replicas, the method significantly reduces memory conflicts and achieves a speedup of up to 3.75× compared with conventional implementations.
In the field of medical imaging, the authors of (List of Contributions, 7) investigate the feasibility of implementing motion-compensated magnetic resonance image reconstruction on GPUs. Their study presents a CUDA-based implementation of the reconstruction kernel for the Generalized Reconstruction by Inversion of Coupled Systems (GRICS) framework and compares its performance with that of CPU and Matlab (version R2023a)–GPU implementations. The proposed solution significantly reduces the reconstruction time while preserving image quality, achieving speedups of up to 13.9× relative to the CPU version.
Finally, an implementation of wavelet-based autofocus techniques for digital imaging applications accelerated by a GPU is presented in the last article (List of Contributions, 8). The proposed approach significantly reduces the computational cost of recursive wavelet operations by parallelizing the computation of wavelet coefficients and focus metrics across GPU threads. Experimental results demonstrate that even modest GPU hardware can provide substantial performance improvements, highlighting the practicality of GPU-based acceleration for real-world imaging systems.
3. Conclusions
The papers in this Special Issue highlight the importance of efficient data structures, memory-aware designs, and parallel execution strategies for maximizing the capabilities of modern GPU architectures. Through a variety of contributions, the authors address fundamental GPU computing challenges, such as synchronization management, memory contention, and workload organization, as well as their application to demanding computational problems. The results reported across multiple domains—structural mechanics, quantum chemistry, medical imaging, financial computing, and digital imaging—clearly illustrate the substantial performance gains that can be achieved when algorithms and data structures are adapted to the characteristics of GPU platforms.
Looking forward, the rapid evolution of heterogeneous computing systems and increasingly complex memory hierarchies, coupled with the growing scale of data-intensive workloads, will continue to drive research in GPU-oriented data structures and parallel algorithms. Future research will likely focus on adaptive data layouts, improved support for irregular and dynamic workloads, and tighter integration between CPUs and accelerators in heterogeneous environments. We hope the contributions in this Special Issue stimulate further advances and support the development of efficient computational frameworks that can address the challenges posed by next-generation high-performance computing systems.
Author Contributions
Methodology, resources, writing—original draft preparation, writing—review and editing, B.J. and J.A.G.-P. All authors have read and agreed to the published version of the manuscript.
Funding
This research received no external funding.
Conflicts of Interest
The authors declare no conflicts of interest.
List of Contribution
- Polak, M.S.H.; Troendle, D.A.; Jang, B. Boundary-Aware Concurrent Queue: A Fast and Scalable Concurrent FIFO Queue on GPU Environments. Appl. Sci. 2025, 15, 1834. https://doi.org/10.3390/app15041834.
- Li, L.X.; Chen, R.R. GPU-Accelerated PSO for High-Performance American Option Valuation. Appl. Sci. 2025, 15, 9961. https://doi.org/10.3390/app15189961.
- Liu, Z.;Wu, J.; Dong, B.; Liu, Y. GPU-Accelerated High-Efficiency PSO with Initialization and Thread Self-Adaptation. Appl. Sci. 2025, 15, 10429. https://doi.org/10.3390/app151910429.
- Herrero-Pérez, D.; Martínez-Barberá, H. Multi-GPU Acceleration for Finite Element Analysis in Structural Mechanics. Appl. Sci. 2025, 15, 1095. https://doi.org/10.3390/app15031095.
- Fujii, H.; Ito, Y.; Yokogawa, N.; Suzuki, K.; Tsuji, S.; Nakano, K.; Parque, V.; Kasagi, A. Efficient GPU Implementation of the McMurchie–Davidson Method for Shell-Based ERI Computations. Appl. Sci. 2025, 15, 2572. https://doi.org/10.3390/app15052572.
- Tsuji, S.; Ito, Y.; Fujii, H.; Yokogawa, N.; Suzuki, K.; Nakano, K.; Parque, V.; Kasagi, A. GPU-Accelerated Fock Matrix Computation with Efficient Reduction. Appl. Sci. 2025, 15, 4779. https://doi.org/10.3390/app15094779.
- Zeroual, M.A.; Dudysheva, N.; Gras, V.; Mauconduit, F.; Isaieva, K.; Vuissoz, P.A.; Odille, F. Feasibility of Implementing Motion-Compensated Magnetic Resonance Imaging Reconstruction on Graphics Processing Units Using Compute Unified Device Architecture. Appl. Sci. 2025, 15, 5840. https://doi.org/10.3390/app15115840.
- Kim, H.; Lee, D.-Y.; Choi, D.; Lee, D.-W. GPU-Driven Acceleration of Wavelet-Based Autofocus for Practical Applications in Digital Imaging. Appl. Sci. 2025, 15, 10455. https://doi.org/10.3390/app151910455.
References
- Khairy, M.; Wassal, A.; Zahran, M.M. A survey of architectural approaches for improving GPGPU performance, programmability and heterogeneity. J. Parallel Distrib. Comput. 2019, 127, 65–88. [Google Scholar] [CrossRef] [Scilit]
- Ahsan, S.M.M.; Hoque, T.; Hasan, M.S.; Chowdhury, M.; Dhungel, A. Hardware Accelerators for Artificial Intelligence. In AI-Enabled Electronic Circuit and System Design: From Ideation to Utilization; Iranmanesh, A., Sayadi, H., Eds.; Springer Nature Switzerland: Cham, Switzerland, 2025; pp. 497–535. [Google Scholar] [CrossRef] [Scilit]
- Luo, Q. GPU Acceleration for Data Processing and Analytics. In 2023 IEEE International Conference on Big Data (BigData); IEEE: Piscataway, NJ, USA, 2023; p. 3. [Google Scholar] [CrossRef] [Scilit]
- Wijs, A.; Osama, M. The fast and the capacious: Memory-efficient multi-GPU accelerated explicit state space exploration with GPUexplore 3.0. Front. High Perform. Comput. 2024, 2, 1285349. [Google Scholar] [CrossRef] [Scilit]
- Sencan, E.; Kulkarni, D.; Coskun, A.; Konate, K. Analyzing GPU Utilization in HPC Workloads: Insights from Large-Scale Systems. In Proceedings of the Practice and Experience in Advanced Research Computing 2025: The Power of Collaboration; ACM: New York, NY, USA, 2025. [Google Scholar] [CrossRef] [Scilit]
- Lessley, B.; Childs, H. Data-Parallel Hashing Techniques for GPU Architectures. IEEE Trans. Parallel Distrib. Syst. 2020, 31, 237–250. [Google Scholar] [CrossRef] [Scilit]
- Niu, Y.; Lu, Y.; Liu, W.; Casas, M. DiggerBees: Depth First Search Leveraging Hierarchical Block-Level Stealing on GPUs. In Proceedings of the 31st ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming; ACM: New York, NY, USA, 2026; pp. 81–94. [Google Scholar] [CrossRef] [Scilit]
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. |
© 2026 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license.