Abstract
In this paper, we introduce the workflow for converting qubit circuits represented by Open Quantum Assembly format (OpenQASM, also known as QASM) into the qudit form for execution on qudit hardware and provide a method for translating qudit experiment results back into qubit results. We present the comparison of several qudit transpilation regimes, which differ in decomposition of multicontrolled gates: qubit as ordinary qubit transpilation and execution, qutrit with levels and single qubit in qudit, and ququart with levels and 2 qubits per ququart. We provide several examples of transpiling circuits for trapped ion qudit processors, which demonstrate potential advantages of qudits.
1. Introduction
A digital model of quantum computing relies on performing quantum logical operations under qubits, which are quantum analogs of classical bits allowing superposition states [1,2,3]. It is expected that quantum processors of sufficiently high performance may be superior to classical counterparts in various computational problems [3,4], such as prime factorization [5], optimization [6], and simulating complex (quantum) systems [7,8]. Key building blocks for realizing quantum processors based on various physical platforms, such as superconducting circuits [9,10], semiconductor quantum dots [11,12,13,14], photonic systems [15,16], neutral atoms [17,18,19,20], and trapped ions [21,22,23] have been demonstrated. Although quantum advantage has been shown in several experiments with noisy intermediate-scale quantum (NISQ) devices [9,10,15], finding the path towards large-scale quantum computing remains an open question.
A promising approach to scaling ion-based quantum processors is to use additional levels for encoding quantum information, which is at the heart of the concept of qudit-based quantum processors. Qudit-based quantum information processing has been widely studied both theoretically and experimentally during the last decades [24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63]. Experimental results include demonstrations of qudit processors based on trapped ions [64,65,66,67], superconducting circuits [68,69], and quantum light [61]. Specifically, in the case of trapped ions, high-fidelity control over multilevel systems has been shown [64,65,66,67,70]. Qudits can be used both for storing multiple qubits and for using higher levels as ancillas in the case of the decomposition of multiqubit gates. However, as soon as the majority of algorithms are formulated in the qubit form, in order to use qudits, one needs a procedure for transforming qubit circuits in the qudit form to achieve an advantage in terms of the resulting fidelity.
In this work, we focus on the problem of efficient transforming quantum circuits that are expressed via Quantum Assembly (QASM) format to the qudit form. We focus our attention on this format since QASM is the widely used representation of qubit circuits, and many quantum frameworks can handle QASM code according to the desired algorithm. Frameworks qiskit [71] and cirq [72] are commonly used to implement qubit algorithms and run them on quantum hardware, with the ability to optimize qubit circuits and perform topology-aware multiqubit transpilation. Processing of qudit circuits is also the topic of several research, such as the simulation platform for hybrid quantum systems QuDiet [73], which introduces a special QASM format for qudit execution, or the numerical qudit optimization framework bqskit [74]. The distinguishing feature of our transpilation approach is to take qubit QASM circuit, store qubit into qudits, execute circuit on qudit device, and provide qubit results back to a user. From this perspective, our technique provides a seamless qubit circuit interface to the user and utilizes the benefits of qudits with different dimensionality.
To maximize the potential of qudits to execute qubit circuits, we introduce several key concepts that cannot be reached using earlier developed quantum circuit frameworks. Firstly, in our paper, we introduce the idea of a customizable transpiling process with target device description using runtime. While other frameworks often operate with native gates as unitary matrices to perform numerical optimization [74], our transpiler omits a unitary representation of native gates and relies on analytical decompositions and composition rules in terms of native gates and mathematical expressions. These rules can be defined for any quantum device to use in our transpiler seamlessly. Moreover, we propose to use for these rules the similar QASM description format (analytical formulas in the form of syntactic rules). These facts simplify the process of operating with the transpiler and greatly reduce the computing complexity of transpiling and optimizing qubit circuits.
The second idea is the process of unmapping samples obtained via the qudit quantum computer. Using the qubit-to-qudit mapping from transpiler, one can convert these results back to qubit form. This process provides the opportunity to use qudit quantum hardware or a simulator to run any qubit circuit in QASM form and obtain the circuit’s statistics corresponding to qubits defined in the QASM file.
The third is the idea of efficient multiqubit gate decomposition in terms of qudit gates. Using qudit-based transpilation techniques, we expect to benefit in quantum circuit fidelity due to reducing the number of noisy two-qudit operations. We present a comparison of several qudit execution regimes, whose main difference is in the decomposition of multicontrolled gates: qubit as ordinary qubit transpilation and execution, qutrit with levels and single qubit in qudit, and ququart with levels and 2 qubits per ququart.
The paper is organized as follows. In Section 2, we briefly revise the specification of the QASM format. In Section 3, we discuss basic gates for qudit circuit construction. In Section 4, we consider the trapped ion qudit quantum processor as a concrete example of a hardware platform for the transpilation process and provide a description of JSON format for the record of the qudit circuit. In Section 5, we present a developed general transpilation workflow and a concrete realization of transpilation methods for input QASM circuits, which allows one to obtain implementable on a hardware qudit circuit for ion qudits with and levels. In Section 6, we benchmark a transpiler developed on widely used quantum algorithms and compare its different regimes with a qubit qiskit transpiler and between each other. Finally, we conclude this paper in Section 7.
2. Quantum Circuits in the QASM Format
The QASM format [75] is a widely used format for writing qubit quantum circuits in gate-based model in a text form. QASM format could be generated using one of the quantum computing frameworks (e.g., qiskit [71]), from user-defined logic or could be written manually. It is allowed due to the syntactical and semantic simplicity of the QASM representation, which consists of gates, measures, and barrier operations along with their conditional variants. This set of operations is sufficient for quantum program execution on real hardware or on a simulator.
QASM was designed to formalize quantum computations and fully describe quantum circuits. A QASM file is composed of a series of instructions, each of which represents a specific operation that is to be executed on the hardware (see Appendix A).
QASM format does not specify what type of quantum system it uses: qubit or qudit. Although all qubit operations can be expressed using QASM, certain qudit operations may not be expressible due to the lack of a suitable description for the level structure and operations associated with qudits. So, in our experiments, we use the QASM format for qubit quantum circuits, which describe the quantum logic of a program, and as input to the transpiler, which converts QASM circuit into qudit form for further execution on qudit hardware. We also provide JSON format specification for qudit circuit description in Section 4.
3. Qudit Circuits
By analogy with qubit-based quantum computing, one can implement quantum circuits with d-level quantum systems, qudits. On the existing qudit-based hardware, single-qudit operation , which acts on a d-level qudit, is usually implemented as a unitary matrix acting on a linear span of i-th and j-th levels (see an example for a trapped ion platform [64,65] and for a superconducting platform [69]). Single-qudit operation can be defined with the use of a qudit extension of Pauli matrices , and , acting on i-th and j-th levels, that are the analogs to the qubit Pauli matrices extended with zeroes:
where ; d is the number of levels in the qudit; and stands for an imaginary unit. These matrices satisfy the following relations:
where is the identity matrix acting on i-th and j-th levels.
Single-qudit native operations for a trapped ion and a superconducting platform are defined as a rotation with two angle parameters and . Parameter specifies the angle of rotation that is determined by pulse length in a qudit system. Parameter specifies the axis of rotation in the plane within the Bloch sphere. Using a qudit extension of Pauli matrices, we can obtain a matrix representation for a single-qudit operation :
where
and the following symmetry relations are fulfilled:
where the arbitrary integers are n and m.
We note that we define gate without factor to preserve periodicity for all parameters. However, typical definitions of single-qubit gate and single-qudit gate depend on the parameter:
While the qubit operation satisfies the relation and, therefore, two operations become equivalent up to global phase factor , the qudit operation does not hold this equivalence:
where
and is an identity matrix.
Along with operation, qudit devices provide the possibility to apply a phase operation and Z rotation , which can be often implemented virtually (see [67] for the trapped ions and [69] for the superconducting platform), and hence, does not contribute to generating errors:
Another crucial type of operation for quantum computations is entangling a two-qudit gate. The specific form of two-qudit operations varies depending on the physical platform considered. In theoretical papers, two-qudit and gates are commonly considered:
However, trapped ion qudit-based quantum computers operate with a Mølmer–Sørensen gate [76] :
where the pairs of levels and refer to the first and second qubits, respectively. Within superconducting processors, an iSWAP gate of the following form can be typically implemented:
Notably, a real quantum device implies selection rules, which determine allowed level pairs for single-qudit and two-qudit gates. We define a operation between levels i and j as to solve the issue. Effectively, it swaps the population between i-th and j-th levels, allowing us to decompose any into the sequence of allowed swaps and transitions. For any i, j and s, the following identity holds:
where is the pattern for operation that involves the i-th level in n-th qudit in register, e.g., , , , etc., and ∘ denotes the operations’ composition, where operations are applied in a left-to-right order. Also, for this decomposition to be valid, the operation pattern cannot involve an s-th level. For example, for gate, the level swap is performed as follows:
4. Trapped Ion Qudit Quantum Computer
As a concrete example of a qudit device for the transpilation process, we consider the trapped ion qudit-based processor developed in Refs. [65,67]. The authors implemented qudit-trapped ion computations (in this work, we consider at most ) using the , and native gate set. These gates are equivalent to the defined ones in the previous section with parameter modifications:
Considering the allowed level transitions for ion qudits and Equation (21), it is possible to decompose any sequence of qudit operations , and into the sequence of ion native gates , and [63].
Operations , and on allowed levels are stored in an ion quantum computer description format (see Appendix B).
5. Qasm-to-Qudit Form Transpilation
In our model, qudit circuits can only be constructed with the native gate set for a given quantum device. Native gates are the operations physically allowed on the device, and, usually, a set of native gates contains single-particle and two-particle operations. On the other hand, QASM is a more general quantum circuit description format. It can represent not only a sequence of physical gates but rather quantum logic for this circuit with, for example, and controlled or multiqubit Toffoli operations. Hence, in some cases, even qubit circuits in QASM format could not be executed on the device as is.
The transpiler aims to bridge the gap between high-level software and hardware representations of a circuit and to facilitate the process of translating QASM code into a qudit circuit. We divide the transpilation process into three steps, as depicted in Figure 1: qubit transpilation, qubit–qudit transpilation (or qudit transpilation, which is performed according to qubit-to-qudit mapping), and qudit circuit optimization. At the end of transpilation, an optimized qudit circuit can be stored in a format suitable for execution on the target device.
Figure 1.
General scheme of transpilation process and changing the format of the circuits (arrows with caption) during transpilation.
In the first step, the ‘pure’ qubit transpilation takes place. It parses QASM code into an abstract syntax tree, which is used as a circuit representation within the transpiler, and converts a sequence of logical quantum gates into a native gate set using decompositions of the most used gates (e.g., , , , etc.). This process is divided into two phases: preprocessor and optimizer. Each phase could be tuned according to the chosen target device.
At the first phase, the preprocessor performs parsing and checking the semantics of the QASM file. Any encountered error in source code is supplemented with a descriptive error message and the line number and position to refer to it in source code. Next, it expands all QASM gates into the native gate set for the device using the provided qelib1.inc file, which consists of many applied gate declarations according to OpenQASM 2.0 standard. After the preprocessor phase, the user obtains a sequence of native qubit gates. Here, the optimizer could be enabled to reduce the number of operations and produce an equivalent gate sequence.
At the second phase, the optimizer undergoes the subsequences of gates from the source circuit and tries to match them with a predefined set of symmetry relations and gate contraction rules, which can be defined in a separate matcher file matcher.script. The matcher file represents the set of rules in the form of mathematical expressions that can be derived from target device operations’ relations. Due to such a form, this file can be written by developers and scientists for a given device without using a matrix representation of the native gate.
Along with the native gate set, the file with gate declarations qelib1.inc and rule set matcher.script represent the runtime for the given target device. We describe the content of qelib1.inc and matcher.script more precisely in Appendix C. For now, the transpiler supports one of the following runtimes and corresponding native gate sets:
- Quantum emulator:.
- Trapped ion quantum computer:.
- Trapped ion intermediate representation:.
where n, m and other lower indices denote qubits (or qudits) where the operation acts on. Quantum emulator and trapped ion quantum computer runtimes are suitable for the case of qubit execution. Trapped ion intermediate representation is the special runtime, which should not resemble any quantum hardware or quantum simulator. However, this runtime produces a qubit circuit with an extended gate set and passes it into the following step. This extended circuit represents an intermediate format that allows the transpiler to choose a qudit decomposition for , and for a given type of qudit.
Another point of introducing this runtime is that it contains decompositions for multiqubit gates (e.g., Fredkin or multicontrolled Toffoli ) in terms of gates. For many qudit parameters, this gate has special form in the qudit circuit that will arise during the second step of transpilation. The resulting qudit circuit will only contain gates as two-qudit operations. Additionally, the qudit optimization step could be enabled to reduce the length of the qudit sequence of gates. Qudit optimization rules are described in the third step of the transpiler.
In the second step, the transpiler uses a qubit circuit transpiled with a trapped ion intermediate representation runtime from the first step to produce a qudit circuit. Along with the number of parameter of levels in qudit d, it uses a parameter b that defines how many qubits from the original circuit can be embedded in each qudit from the generated qudit circuit. Qudit, containing at least levels, is able to represent qubit register with b qubits by placing register states on qubit levels. If the number of levels is , then the remaining levels are considered as ancillary. An example of qudit structure is presented in Figure 2. Qubits () or qutrits () can only store a single qubit, whereas ququarts () can store one or two qubits.
Figure 2.
Qudit levels to qubit state mapping for and . For any qudit levels d and qubits in qudit b, all qudit levels are divided into qubit levels and ancillary levels. Each qubit level digit is converted into qubit state using its binary representation, whereas ancillary levels are used for specific decompositions.
To store all qubits from the QASM circuit into qudits, the transpiler produces a qubit–qudit mapping. The result is two sets of indices and for any qubit index , where N is the size of the register in the original circuit: stands for qudit index in the qudit register and stands for a qubit index within a single qudit. The current implementation of the transpiler assigns indices in a straightforward manner, as shown in Figure 3: and . Although the straightforward mapping is sufficient for qubit and qutrit transpilation, it may produce a less efficient ququart circuit. In this case, users can specify custom mapping based on their circuit. The aspect of proper mapping will be discussed in Section 6. Also, it is intended to develop an algorithm that uses heuristics to generate proper mapping that minimizes the number of two-qudit gates in the resulting circuit [77].
Figure 3.
Example for a straightforward mapping for . White blocks represent the initial qubits from the QASM circuit. Qubits are uniquely assigned with and indices. The straightforward mapping assigns to the first pair of qubits, to the second pair, and so on. Within a single pair, qubits are distinguished by index I.
These indices are used to convert the qubit circuit into qudit operations. Single-qubit gates for the case (implies ) are mapped as
For , the transpiler decomposes and , considering the position of the qubit within a single qudit ( index). This decomposition consists of qudit gates and , respectively. Levels i, j and k are obtained explicitly from the index of a qubit. For example, for ,
Notably, decompositions of multiqubit gates can benefit for some qudit parameters d and b. For this case, we used a special trapped ion intermediate representation runtime in the first stage on qudit transpilation. With this runtime, we obtained an optimized circuit that contains multiqubit gates, and in the second stage, we utilized these gates to produce the efficient decomposition using different values for transpilation parameters d and b. In our paper, we focus on several cases of qudit transpilation.
The first case is that of qutrits () or ququarts () with , having a special gate decomposition [62], which efficiently uses higher levels and produces a sequence of operations, whereas a straightforward qubit algorithm [78] will require / operations or operations with ancillary qubits (here, N is the number of qubits involved).
The second case is that of qudits with and . In this case, all levels are occupied by qubits, thus no ancillary levels can be used. gates can be represented in terms of gates using standard qubit decomposition. However, some of the operations will end up acting on two qubits in a single qudit, and hence, will be decomposed into gate instead of for qubits in different qudits [79]. Considering the matrix representation of , the following definition for a two-qudit gate is obtained:
where and .
Due to the permutation symmetry of gate, we can virtually swap qubits to obtain an efficient circuit. There is no issue in the case of qubit transpilation; however, for many qudit cases, it can minimize the amount of qudit gates in template decomposition. The analysis of qubit permutations in for qudits will be considered in future works.
The third step of transpilation consists of optimizing the qudit circuit according to the allowed level transitions and the production of the qudit circuit descriptor for execution, as described in Section 4. The circuit after the second step consists of qudit operations , and , while the trapped ion computer accepts operations with specific transition levels only. The transpiler uses level swap operations from Equation (21) whenever possible and keeps only the operations allowed by a selection rule:
where is a pattern for operation acting at the i-th level in the n-th qudit. Using this rule, the transpiler is able to convert any or operation into the sequence of allowed transitions for a given adjacency graph between levels in a given qudit device.
Along with the conversion of the allowed operations, the transpiler optimizes the resulting qudit circuit. Although most initial gates from QASM are already optimized during qubit transpilation, the circuit has the potential for optimization after applying level swaps and gate decompositions. This optimization step differs from qubit optimization due to more specific matching rules. They include combinations of rotations and removing operations that are non-affecting on measurement results :
Rules are designed to preserve the unitary matrix of the circuit, to reduce the amount of and operations and to try to move to the end of the circuit. The last is used to remove trailing phases since they are not affecting measuring in computational Z-basis. Yet this step doesn’t preserve unitary matrix of the circuit and is considered optional.
At the end, the transpiler is able to produce a qudit circuit in the format presented in Section 3. Since this format supports several circuits in a single JSON file, all input QASM files are placed into a single output file.
Notably, qudit circuits and qudit computers operate with qudits and dits (classical numbers ), rather than qubits and bits. This fact leads to the problem of unmapping qudit experiment samples into qubit results. Given qudit computer execution output is an array of qudit states and samples counts, we only have to convert qudit states into qubit states using the mapping.
Qudit state is represented either as an array of numbers (e.g., [0, 1, 2, 1, 2]), or as a string (e.g., “01212”). Firstly, since each qudit consists of b qubits, dits are the only values that should be observed in an experiment. Although other dits with values are still can be sampled, they are considered as an error and can be excluded from qubit samples (strict mode) as shown in Figure 4. The other way to handle higher dits is to interpret them as the highest allowed level (non-strict mode). Secondly, dits can be converted into binary representation (0 → “000”, 1 → “001”, etc.), where each bit corresponds to one of the qubit from the original circuit. The index of the qubit can be obtained by inverting qubit-to-quqit mapping, using indices and . For each dit at position Q from the sampling and for each bit within dit I, we find a qubit index n such that and . In strict mode, if there is no qubit n we assert that I-th bit in Q-th dit is 0, which is possible if there are empty places for qubits in the mapping. Otherwise, in non-strict mode, we just ignore bits not in the mapping and set them to 0. This is equivalent to a partial trace of qudit state over the valid qubit states. Transpiler steps with qubit-to-qudit mapping, along with qudit samples post-processing (unmapping), represent the main part of the workflow qubit circuit execution on qudit-based hardware (Figure 5). In total, any hardware-agnostic QASM circuit serves as an input to this workflow, with the possibility of using custom qubit-to-quqit mapping. After the workflow execution, we obtain qubit results that can be matched with our input circuit. This approach was introduced in [77] and developed in this paper.
Figure 4.
Two possible ways to convert qudit state back to qubit state. The first is strict mode which considers levels as an error and excludes them from resulting samples. The second is non-strict mode, which converts these levels to the highest allowed level.
Figure 5.
Qudit transpilation, quantum execution and sample unmapping form the workflow for qubit circuit execution on qudit-based hardware.
6. Comparison of Transpilation Approaches
To benchmark developed transpiler techniques, in Table 1, we provide a comparison of output circuits for different commonly used cases and different transpiler options that include optimization, qudit level count d, and qubits per qudit parameter b. The With optimization column implies all optimization techniques from Section 5, whereas Without optimization column only decomposes the QASM circuit into Moreover, we used the Qiskit [71] quantum computing framework using and functions that convert the QASM circuit to a native gate set for a given target and perform optimizations. In our case, this was for the trapped ion quantum computer with native gates , and . However, to our knowledge, the Qiskit framework is not able to produce qudit circuits. So, it can only be compared with the developed transpiler with parameters and , which is equivalent to the qubit transpilation.
Table 1.
Comparison of transpilation for different regimes. We produce the circuits for each case and permute qubits manually in order to obtain a minimum count in the ququart regime. This permutation does not affect the gate count in qiskit, qubit and qutrit regimes.
We choose the following list of circuits for a comparison of different transpilation regimes:
- Bernstein–Vazirani algorithm:
- –
- The identification of binary string on 3 qubits and 1 ancillary qubit;
- –
- The identification of binary string on 5 qubits and 1 ancillary qubit.
- Grover algorithm:
- –
- Finding binary string on 3 qubits and 1 ancillary qubit;
- –
- Finding binary string on 4 qubits and 1 ancillary qubit.
- Swap test:
- –
- Orthogonal qubit states on 3 qubits;
- –
- Orthogonal 2-qubits states on 5 qubits.
These input qubit circuits have a representation in QASM format, which is the same for every regime:
- qiskit: , with trapped-ion basic gates;
- qubit: level count , qubits per qudit ;
- qutrit: level count , qubits per qudit ;
- ququart: level count , qubits per qudit .
We note that the qiskit regime is only shown as optimized since always optimizes the input circuit.
Firstly, the effect of circuit optimization can be clearly observed. For every circuit from the list, an optimization pass reduces the number of gates at least by 41%. Furthermore, some cases have a reduction of up to 79% in gate amount in the case of Grover’s algorithm for qubit regime. Notably, the whole circuit can be optimized if the optimizer decides that it is equivalent to the operation. In these experiments, we did not use barriers in the circuits.
Secondly, our transpiler shows better output (in terms of the amount of gates) than the function. However, this result is obtained by the increased number of gates in an output circuit. However, regarding the fact that gates are implemented virtually on qudit quantum computer, our optimization results can be considered more effective.
Thirdly, qutrit and ququart regimes can also optimize the amount of gates. This result has more impact since two-qudit gates are more subjected to errors than single-qudit gates. This effect takes place in circuits with a large number of qubits. However, the single-qudit gate amount for these regimes is much greater than the qubit amount. This is due to our optimization workflow that only optimizes gates on the same levels, but the circuit can contain gates on all pairs of levels. One can consider a simplistic approach to choosing a preferable regime for running a circuit. Given estimates of single-qubit and two-qubit gate errors ( and ), as well as single-qudit and two-qudit gate errors ( and ), the resulting errors in a qubit-based and qudit-based circuit can be approximately upper-bounded as
where and are the numbers of single-qubit (qudit) and two-qubit (qudit) gates correspondingly. Comparing and can help one to choose the best way to run the circuit on the available hardware. We note that can be calculated without including virtual phase gates. We also note that, due to the mentioned fact that the optimization workflow optimizes gates at the same level, but a circuit may contain gates between all pairs of levels, the idea of whole qudit optimization arises. This can decompose any sequence of operations or a general single-qudit unitary matrix into the most optimal sequence in terms of the number of gate amount, as was conducted in [80].
It is worth noting that the performance of the ququart regime is significantly influenced by the qubit-to-qudit mapping. Specifically, the way in which qubits are distributed among qudits has a significant impact on the resulting number of entangling gates. Within a straightforward mapping, for example, three qubits that are affected by the Fredkin gate in the Swap test (2 qubit states) algorithm are placed in separate ququarts, resulting in 16 gates in the qudit circuit. However, with a more carefully designed mapping, it is possible to store two of these qubits in a single ququart, reducing the number of gates to 8. This example demonstrates that different mappings can lead to better or worse results than the qubit regime. Therefore, finding an optimal mapping for a particular circuit is crucial when running a qubit circuit on a qudit platform.
7. Conclusions
In this paper, we provided the general workflow for converting qubit QASM circuits into qudit circuits and compared transpilation for different regimes. With different values for parameters d (dimension of qudit) and b (qubit count in a single qudit), the transpiler uses different decomposition approaches and produces a qudit circuit, which can be executed on a quantum computer with qudit dimension . Parameters d and b should be chosen reasonably for a given problem. The first example is that circuits with a high arity of / gates benefit from the qutrit regime since it decomposes a multiqubit gate into two-qudit operations, whereas qubit decomposition has at least two-qudit gates. The second example is circuits with distinct pairs of qubits with a high weight of interconnection (amount of two-qubit gates) within a pair and low interconnection between pairs. Using the ququart regime and an appropriate qubit-to-qudit mapping can greatly reduce the amount of two-qudit gates compared to the qubit regime, although optimal mapping could be performed automatically (locally for each and globally for a whole circuit). Since naive mapping optimization via finding the best qubit permutation requires , we leave the nearly optimal mapping finding feature to future versions of the transpiler.
We also consider qudit circuit optimization that reduces qudit gate amount in the resulting circuit. For different regimes, the reducing factor is in the range of 40% to 80%. Optimization routine accounts allowed transitions for and gates for a given target qudit system. However, current optimization can be further improved to produce the most optimal output. This is the main focus for future work.
Author Contributions
Conceptualization, A.S.N.; Methodology, E.O.K.; Software, D.A.D.; Validation, E.O.K.; Investigation, D.A.D.; Writing—original draft, D.A.D. and A.S.N.; Writing—review & editing, E.O.K. and A.K.F.; Supervision, A.S.N. and A.K.F.; Funding acquisition, A.K.F. All authors have read and agreed to the published version of the manuscript.
Funding
The work of D.A.D. and A.S.N. was supported by RSF Grant No. 24-71-00084 (developing data post-processing methods for qudit-based architectures). E.O.K. and A.K.F. acknowledge support from the Priority 2030 program at the NIST “MISIS” under the project K1-2022-027.
Institutional Review Board Statement
Not applicable.
Data Availability Statement
Data are contained within the article.
Conflicts of Interest
The authors declare no conflicts of interest.
Appendix A. QASM Format Instructions
Open Quantum Assembly format [75] is commonly used for quantum circuit description. It allows us to represent a circuit as a sequence of instructions.
Quantum and classical register declarations. These instructions define the use of qubits and classical bits in the following circuit: Users can specify them by the register name and register size:
- Quantum register qreg q[N];
- Classical register creg c[M].
Quantum operations’ definitions and declarations. These statements describe which gates can be used in the circuit and define their parameters. opaque operation states that a gate is already presented on the target device, and gate operation defines gate decomposition in terms of previously defined gates and opaque operations. Typically, all useful quantum gates are defined in "qelib1.inc":
- Gate definition gate U(a, b, c) q {…}
- Gate declaration opaque U(a, b, c) q.
Apply gate instruction. With predefined quantum registers and gates, users are able to construct a circuit by applying a gate to a qubit or a set of qubits:
- X q[0]; U(0.0, 1.0, 2.0) q[2];
- CX q[0], q[1].
Barrier statement. Special barrier statement does nothing in a quantum circuit and prevents an optimization by gate merging:
- barrier q[0], q[2];
Reset statement. Collapses qubit state and sets it to :
- reset q[0].
Measure statement. Performs a measurement of qubit and places its result (0 or 1) in a classical bit. At the end of experiments, users should measure qubits and store results in classical bits since QASM semantics states that quantum computer should produce samples according to measured classical bits:
- measure q[0] -> c[0].
Conditional statement. Determines whether the inner statement runs according to value in a classical bit:
- if (c[0] == 1) X q[0];
- if (c[0] == 1) reset q[0].
Appendix B. Ion Quantum Computer Circuit Description Format
Qudit circuits for an ion quantum computer can be written as a JSON file containing an array of objects:
Each object represents a single circuit to execute; hence, it is allowed to describe and execute several circuits in a single file. Circuit contains information, which could be used to execute qudit circuit:
where parameter denotes the number of shots to collect circuit’s statistics, denotes qudit level count d and represents the sequence of qudit operations itself.
Operation is equivalent to one of the qudit gates given by Equation (23) with the given angles and levels parameters:
where and parameters represent and from Equation (23), respectively; divided by , stands for level i with the exception of , where is the only supported level. and are the numbers of qudqudits on which the given operation is acting.
Appendix C. Transpiler’s Runtime Description: qelib1.inc and matcher.script
qelib1.inc is the standard included file from the QASM specification. It has the purpose of storing all definitions of gates ( or instructions), which can be used to construct quantum circuits. There is no regregulation on how to define a native gate set in QASM, yet we use the following notations:
- —Declares gate without definition. We consider these declarations as native gates of the given device.
- —Defines gate in terms of previously declared gates. This can be any gate (, , Toffoli, Fredking).
Transpile uses this notation in the first phase of the qubit transpilation step. Any gate call in the QASM file that it sees is either opaque or . Each is decomposed into the sequence of gate calls. This process runs until there are only gates (also known as native gates) in the circuit.
The matcher.script file is the extension to a target device description that is used in the optimization phase of qubit transpilation as the list of optimization rules. Each rule has one of the following properties:
- Reducing sequence length:.
- Replacing complex gates with simpler equivalent sequences:.
- Replacing gate parameters according to symmetries:.
- Preserving some ordering in a sequence (in this case, the transpiler will try to move to the end of the circuit):but not.
Figure A1.
Examples of gate definitions from trapped ion intermediate representation runtime. Native gates for this runtime are labeled with opaque keyword.
To implement these rules in matcher.script, we defined a special description language, similar to C and QASM. Examples of the rules are depicted in Figure A2.
The transpiler operates with the circuit pattern, which is a sequence of gates acting on the same set of qubits. In matcher.script, it is represented as a composition of gates using the bullet “.” operator. For example, “”, where and are native gates from selected runtime, x and y are qubit patterns and a is a parameter pattern. The matcher goes through each subsequence of gates in the original circuit and tries to find rules to apply and acquire actual values for qubit and parameter patterns. With these values, the matcher runs a code block from the source code and obtains a new sequence of gates via the instruction. The returned value is also a composition of gates using bullet. However, all the qubits and parameters already have concrete values.
Figure A2.
Examples of optimization rules from trapped ion intermediate representation runtime.
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