Search Results (285)

This study presents the development process of a digital twin for a complex dynamic object using Artificial Neural Networks. A separately excited DC motor is considered as an example, which, despite its well-known electromechanical properties, remains a non-trivial object for neural network modeling. It is shown that describing the motor using a generalized neural network with various configurations does not yield satisfactory results. The optimal solution was based on a separation into two distinct nonlinear autoregressive with exogenous inputs (NARX) artificial neural networks with cross-connections for the two main machine variables: one for modeling the armature current with exogenous inputs of voltage and armature speed, and another for modeling the angular speed with inputs of voltage and armature current. Both neural networks are characterized by a relatively small number of neurons in the hidden layer and a time delay of no more than 3 time steps. This solution, consistent with the physical understanding of the motor as an object where electromagnetic energy is converted into thermal and mechanical energy (and vice versa), allows the model to be calibrated for the ideal no-load mode and subsequently account for the influence of torque loads of various natures and changes in the control object parameters over a wide range. The study demonstrates that even for modeling an object such as a DC electric drive with cascaded control, reducing errors at the boundaries of the known operating range requires generating test signals covering approximately 120% of the nominal speed range and 250–400% of the nominal current. Analysis of various test signals revealed that training with a sequence of step changes and linear variations across the entire operating range of armature current and speed provides higher accuracy compared to training with random or uniform signals. Furthermore, to ensure the neural network model’s functionality under varying load torque, a mechanical load observer was developed, and a model architecture incorporating an additional input for disturbance was proposed. The SEDCM_NARX_LOAD neural network model demonstrates a theoretically justified response to load application, although dynamic and static errors arise. In the experiment, the current error was 7.4%, and the speed error was 0.5%. The practical significance of the research lies in the potential use of the proposed model for simulating dynamic and static operational modes of electromechanical systems, tuning controllers, and testing control strategies without employing a physical motor. Full article

This paper presents a high-efficiency bidirectional multidevice interleaved SEPIC–ZETA DC–DC converter for electric mobility applications. The proposed converter offers key advantages, including reduced current and voltage ripple at both the input and output ports, achieved through a port ripple frequency six times higher than the switching frequency. Additionally, the required magnetic and capacitor volume is significantly reduced due to an inductor ripple frequency twice the switching frequency, leading to minimized power losses, reduced stress on power components, and enhanced efficiency. The use of a multidevice structure facilitates more efficient inductor volume optimization and provides improved fault redundancy. The converter is particularly suited for electric vehicle energy management systems, enabling efficient energy management among the various subsystems. It operates in open-loop mode, and this manuscript details the steady-state operating principle under continuous conduction mode. Design guidelines for parameter selection, comprehensive mathematical derivations, and a comparative analysis with existing DC-DC converters are presented. To validate the proposed topology, a 5 kW laboratory prototype was developed and tested across a wide range of load conditions. The experimental results confirm the converter’s high performance, achieving a peak efficiency of 98.6% at rated power. Full article

This paper proposes a single-phase AC-AC solid-state transformer (SST) that eliminates bulky energy storage components. The proposed matrix-type structure comprises a line-frequency (LF) rectifier, a half-bridge (HB) LLC resonant converter, a buck–boost converter, and an LF inverter. The HB LLC resonant converter not only achieves high efficiency at unity voltage gain but also provides high-frequency (HF) isolation as a DC transformer (DCX). Meanwhile, the buck–boost converter ensures precise voltage regulation. The replacement of traditional DC-link electrolytic capacitors with small film capacitors effectively suppresses the second-harmonic power ripple, leading to a significant improvement in both power density and operational reliability. Experimental results from a 1 kW prototype demonstrate high-quality sinusoidal input and output, a wide range of zero-voltage switching (ZVS) operations, and stable output voltage control. Full article

This paper presents a high-efficiency, nW-level operational transconductance amplifier (OTA) capable of operating at 0.3 V with rail-to-rail input and output. The design utilizes a bulk-driven technique in the input stage to extend the common-mode input range under ultra-low-voltage conditions. A simplified intermediate stage ensures reliable MOS operation at ultra-low-voltage levels while reducing power consumption, and a modified Class-AB controlled output stage facilitates rail-to-rail output and enhances current efficiency. Fabricated using SMIC 0.18 $\mathsf{\mu }$m technology and operating at a 0.3 V supply, the OTA achieves a DC gain of 63.07 dB, phase margin of 61.5°, a gain-bandwidth product of 37.68 kHz, and a slew rate of 21.85 V/ms while consuming only 123 nW with a 60 pF load. The design also demonstrates superior small-signal figures of merit (12.25 MHz·pF/$\mathsf{\mu }$W) and large-signal figures of merit (10.66 V/$\mathsf{\mu }$s·pF/$\mathsf{\mu }$W) compared to state-of-the-art low-voltage OTAs. These results indicate that the proposed amplifier offers a balanced solution of low power consumption, wide bandwidth, and high slew rate, making it well-suited for energy-constrained applications such as portable electronics, IoT sensors, and biomedical devices. Full article

The General AntiParticle Spectrometer is a balloon-borne experiment designed to search for low-energy cosmic-ray antinuclei as a potential indirect signature of dark matter. Over the course of at least three long-duration flights over Antarctica, it will explore the sub-$250 \mathrm{M}\mathrm{e}\mathrm{V}/\mathit{n}$ energy range with sensitivity to antideuterons and antihelium, while also extending antiproton measurements below 100 $\mathrm{M}$$\mathrm{e}\mathrm{V}$. The instrument features a tracker built from more than one thousand lithium-drifted silicon detectors, each read out by a dedicated custom integrated circuit. With the first flight scheduled for the austral summer of 2025, a new prototype chip, ANTARES4, has been developed using a commercial 65 $\mathrm{n}$$\mathrm{m}$ complementary metal-oxide semiconductor process for use in the second flight. It integrates eight independent analog channels, each incorporating a low-noise charge-sensitive amplifier with dynamic signal compression, a CR–RC shaping stage with eight selectable peaking times, and on-chip calibration circuitry. The charge-sensitive amplifier uses metal-oxide semiconductor feedback elements with voltage-dependent capacitance to support the wide input energy range from 10 $\mathrm{k}$$\mathrm{e}\mathrm{V}$ to 100 $\mathrm{M}$$\mathrm{e}\mathrm{V}$. Four alternative feedback implementations are included to compare performance and design trade-offs. Leakage current compensation up to 200 $\mathrm{n}$$\mathrm{A}$ per detector strip is provided by a Krummenacher current–feedback network. This paper presents the design and architecture of ANTARES4, highlighting the motivations, design drivers, and performance requirements that guided its development. Full article

Temperature is a crucial indicator in monitoring industrial operations. Two-wire temperature transmitters, known for their precise measurements, are extensively used in sectors like crude oil extraction, refining, and fine chemicals. These transmitters can handle a maximum input voltage of 36 V and output a current signal up to 20 mA, enhancing resistance to electromagnetic interference and line noise while improving system compatibility and safety. In contrast, traditional low-dropout linear regulators (LDOs) typically have an input voltage below 6 V and suffer from limitations such as low power supply rejection ratio (PSRR), inadequate current driving capability, and significant temperature drift. This paper proposes a wide-input-range LDO with enhanced output accuracy and digital trimming, designed using the 180 nm BCD process. It incorporates dynamic mismatch compensation, digital trimming, and a strong-drive buffer, achieving a broad input voltage range and high PSRR with minimal temperature drift. The input voltage spans 6 V to 60 V, the output voltage is 1.8 V, and the PSRR reaches 124.5 dB. Across a temperature range of −40 °C to 130 °C, the maximum output voltage error is only 0.3%. This makes it highly suitable for high-precision circuit power supplies in industrial process control. Full article

To meet the requirements of integrated accelerometers for a high-precision reference voltage under wide supply voltage range, high current drive capability, and low power consumption, this paper presents a bandgap reference operational amplifier (op-amp) circuit implemented in CMOS/BiCMOS technology. The proposed design employs a folded-cascode input stage, a push–pull Class-AB output stage, an adaptive output switching mechanism, and a composite frequency compensation scheme. In addition, overcurrent protection and low-frequency noise suppression techniques are incorporated to balance low static power consumption with high load-driving capability. Simulation results show that, under the typical process corner (TT), with VDD = 3 V and T = 25 °C, the op-amp achieves an output swing of 0.2 V~2.8 V, a low-frequency gain of 102~118 dB, a PSRR of 90 dB at 60 Hz, overcurrent protection of ±25 mA, and a phase margin exceeding 48.8° with a 10 μF capacitive load. Across the entire supply voltage range, the static current remains below 150 μA, while maintaining a line regulation better than 150 μV/V and a load regulation better than 150 μV/mA. These results verify the feasibility of achieving both high drive capability and high stability under stringent power constraints, making the proposed design well-suited as a bandgap reference buffer stage for integrated accelerometers, with strong engineering practicality and potential for broad application. Full article

Three-level non-inverting buck–boost converters are promising for electric vehicle charging stations due to their wide voltage regulation capability and bidirectional power flow. However, the number of three-level operating states is four times that of two-level operating states, and the lack of a unified switching state selection mechanism leads to serious challenges in its application. To address these issues, a finite control set model predictive control (FCS-MPC) strategy is proposed, which can determine the optimal set and select the best switching state from the excessive number of states. Not only does the proposed method achieve fast regulation over a wide voltage range, but it also maintains the input- and output-side capacitor voltage balance simultaneously. A further key advantage is that the number of switching actions in adjacent cycles is minimized. Finally, a hardware-in-the-loop experimental platform is built, and the proposed control method can realize smooth transitions between multiple operation modes without the need for detecting modes. In addition, the state polling range and the number of switching actions are superior to conventional predictive control, which provides an effective solution for high-performance multilevel converter control in energy systems. Full article

Hybrid electric vehicles (HEVs) have gained significant attention for their superior energy efficiency and are becoming a predominant mode of urban transportation. The DC/DC converter plays a critical role in HEV energy management systems, especially in matching the voltage levels between the battery and DC bus. This paper proposes a novel high-gain DC/DC converter with a wide input voltage range based on coupled inductors. The innovation lies in the integration of a resonant cavity and the simultaneous realization of zero-voltage switching (ZVS) and zero-current switching (ZCS), effectively reducing both voltage/current stresses on the power switches and switching losses. Compared with conventional topologies, the proposed design achieves higher voltage gain without extreme duty cycles, improved conversion efficiency, and enhanced reliability. Detailed operating principles are analyzed, and design conditions for voltage stress reduction, gain extension, and soft switching are derived. The simulation model has been conducted in a PSIM environment, and a 300 W experimental prototype, implemented using a dsPIC33FJ64GS606 digital controller, has been established and demonstrates 93% peak efficiency at a 10 times voltage gain. The performance and practical feasibility of the proposed topology have been evaluated by both simulation and experiments. Full article

In loop-powered 4–20 mA transmitter systems, sensors like temperature, pressure, flow, and gas sensors are chosen based on specific application requirements. These systems are widely adopted in high-precision measurement scenarios, including industrial automation, process control, and environmental monitoring. The transmitter requires a high-performance analog front end (AFE) for precise amplification and signal conditioning. This paper presents a low-noise instrumentation amplifier (IA) for high-precision transmitter front ends, featuring a Successive Approximation Register (SAR)-assisted offset calibration architecture. The proposed structure integrates a chopper current-feedback instrumentation amplifier (CFIA) with an automatic offset calibration loop (AOCL), significantly suppressing internal offset errors and enabling high-accuracy signal acquisition under stringent power and environmental temperature constraints. The designed amplifier provides four selectable gain settings, covering a range from ×32 to ×256. Fabricated in a 0.18 μm CMOS process, the CFIA operates at a 1.8 V supply voltage, consumes a static current of 182 μA, and achieves an input-referred noise as low as 20.28 nV/√Hz at 1 kHz, with a common-mode rejection ratio (CMRR) up to 122 dB and a power-supply rejection ratio (PSRR) up to 117 dB. Experimental results demonstrate that the proposed amplifier exhibits excellent performance in terms of input-referred noise, offset voltage, PSRR, and CMRR, making it well-suited for front-end detection in field instruments that require direct interfacing with measured media. Full article

This article presents a new full-bridge converter with two series-connected transformers (TTFB), designed to meet the hold-up time requirements in power systems. The conventional TTFB topology offers low root mean square (RMS) output current, clamped voltage stress across the primary switches, and zero-voltage switching (ZVS) capability. However, under a wide input voltage range, it suffers from a significant circulating current during the freewheeling period, leading to efficiency degradation. To mitigate this issue, a new converter is proposed by integrating the TTFB with a boost circuit, which operates during the hold-up state when the input voltage drops below the nominal level. Thus, the proposed converter can increase the duty ratio under nominal input voltage conditions, thereby reducing the primary-side RMS current and improving efficiency. To validate the effectiveness of the proposed method, a prototype with a 12 V/400 W output was implemented. The proposed converter achieved a peak efficiency of 92.1% at 50% load, and maintained a higher efficiency across the entire load range compared to the conventional design. Thus, the proposed converter offers a solution for applications demanding extended hold-up time with improved efficiency. Full article

This paper presents a microcontroller-based technique for accurately measuring resistive sensors over a wide dynamic range using an adaptive constant current source. Unlike conventional voltage dividers or fixed-current methods—often limited by reduced resolution and saturation when sensor resistance varies across several decades—the proposed system dynamically adjusts the excitation current to maintain optimal Analog-to-Digital Converter (ADC) input conditions. The measurement circuit employs a fixed reference resistor and an inverting amplifier configuration, where the excitation current is generated by one or more pulse-width modulated (PWM) signals filtered through low-pass RC networks. A microcontroller selects the appropriate PWM channel to ensure that the output voltage remains within the ADC’s linear range. To support multiple sensors, an analog switch enables sequential measurements using the same dual-PWM current source. The full experimental implementation uses four op-amps to support modularity, buffering, and dual-range operation. Experimental results show accurate measurement of resistances from 1 kΩ to 100 kΩ, with maximum relative errors of 0.15% in the 1–10 kΩ range and 0.33% in the 10–100 kΩ range. The method provides a low-cost, scalable, and digitally controlled solution suitable for embedded resistive sensing applications without the need for high-resolution ADCs or programmable gain amplifiers. Full article

This paper presents the design and implementation of a high-efficiency, full silicon carbide (SiC)-based center-tapped phase-shifted full-bridge (PSFB) converter for NiCd battery charging applications in railway systems. The converter utilizes SiC MOSFET modules on the primary side and SiC diodes on the secondary side, resulting in significant efficiency improvements due to the superior switching characteristics and high-temperature tolerance inherent in SiC devices. A nanocrystalline-cored center-tapped transformer is optimized to minimize voltage stress on the rectifier diodes. Additionally, the use of a nanocrystalline core provides high saturation flux density, low core loss, and excellent permeability, particularly at high frequencies, which significantly enhances system efficiency. The converter also compensates for temperature fluctuations during operation, enabling a wide and adjustable output voltage range according to the temperature differences. A prototype of the 10-kW, 50-kHz PSFB converter, operating with an input voltage range of 700–750 V and output voltage of 77–138 V, was developed and tested both through simulations and experimentally. The converter achieved a maximum efficiency of 97% and demonstrated a high power density of 2.23 kW/L, thereby validating the effectiveness of the proposed design for railway battery charging applications. Full article

The advancement of Internet of Things (IoT) technology has enabled battery-powered devices to be deployed across a wide range of applications; however, it also introduces challenges such as high energy consumption and security vulnerabilities. To address these issues, adiabatic logic circuits offer a promising solution for achieving energy efficiency and enhancing the security of IoT devices. Adiabatic logic circuits are well suited for energy harvesting systems, especially in applications such as sensor nodes, RFID tags, and other IoT implementations. In these systems, the harvested bipolar sinusoidal RF power is directly used as the power supply for the adiabatic logic circuit. However, adiabatic circuits require a peak detector to provide bulk biasing for pMOS transistors. To meet this requirement, a diode-connected MOS transistor-based voltage doubler circuit is used to convert the sinusoidal input into a usable DC signal. In this paper, we propose a novel adiabatic logic design that maintains low power consumption while optimizing energy and current fluctuations across various input transitions. By ensuring uniform and complementary current flow in each transition within the logic circuit’s functional blocks, the design reduces energy variation and enhances resistance against power analysis attacks. Evaluation under different clock frequencies and load capacitances demonstrates that the proposed adiabatic logic circuit exhibits lower fluctuation and improved security, particularly at load capacitances of 50 fF and 100 fF. The results show that the proposed circuit achieves lower power dissipation compared to conventional designs. As an application example, we implemented an ultrasonic transmitter circuit within a LoRaWAN network at the end-node sensor level, which serves as both a communication protocol and system architecture for long-range communication systems. Full article

Multi-channel LED drivers are crucial for high-power lighting applications. Maintaining a constant average forward current is essential for stable LED luminous intensity, necessitating drivers capable of consistent current delivery across wide operating ranges. Meanwhile, achieving precise current sharing among channels without incurring high costs and system complexity is a significant challenge. Leveraging the constant-current characteristics of the LCL-T network, this paper presents a multi-channel DC/DC LED driver comprising a full-bridge inverter, a transformer, and a passive resonant rectifier. The driver generates a high-frequency AC bus with series-connected diode rectifiers, a structure that guarantees excellent current sharing among all output channels using only a single control loop. Fully considering the impact of higher harmonics, this paper derives an exact solution for the output current. A step-by-step parameter design methodology ensures soft switching and enhanced switch utilization. Finally, experimental verification was conducted using a prototype with five channels and 200 W, confirming the correctness and accuracy of the theoretical analysis. The experimental results showed that within a wide input voltage range of 380 V to 420 V, the driver was able to provide a stable current of 700 mA to each channel, and the system could achieve a peak efficiency of up to 94.4%. Full article