A High-Efficiency Single-Phase AC-AC Solid-State Transformer Without Electrolytic Capacitors

Abstract

This paper proposes a single-phase AC-AC solid-state transformer (SST) that eliminates bulky energy storage components. The proposed matrix-type structure comprises a line-frequency (LF) rectifier, a half-bridge (HB) LLC resonant converter, a buck–boost converter, and an LF inverter. The HB LLC resonant converter not only achieves high efficiency at unity voltage gain but also provides high-frequency (HF) isolation as a DC transformer (DCX). Meanwhile, the buck–boost converter ensures precise voltage regulation. The replacement of traditional DC-link electrolytic capacitors with small film capacitors effectively suppresses the second-harmonic power ripple, leading to a significant improvement in both power density and operational reliability. Experimental results from a 1 kW prototype demonstrate high-quality sinusoidal input and output, a wide range of zero-voltage switching (ZVS) operations, and stable output voltage control.

1. Introduction

As power systems progress and increasingly assimilate renewable energy, conventional line-frequency transformers (LFTs) can no longer meet modern power system requirements for flexibility, power quality, and reliability [1,2]. Their inherent drawbacks, including large size and weight, lack of active control, harmonic generation, and limited fault isolation capability, have significantly restricted their applicability. These limitations have driven the emergence of the solid-state transformer (SST) [3,4].

The SST integrates high-frequency (HF) transformers with advanced semiconductor conversion technology to achieve intelligent power conversion. In addition to voltage transformation and AC/DC or AC/AC conversion, it provides active control and self-protection functions that are absent in conventional LFTs [5]. Compared with LFTs, SSTs offer substantially reduced volume and weight, higher power density through HF operation, precise output voltage regulation, enhanced resilience to grid disturbances, rapid fault isolation, and compatibility with both AC and DC systems. Therefore, SSTs offer particular advantages for renewable energy integration, DC distribution, and electric traction applications [6,7].

To achieve high efficiency, low cost, and high power density, various SST topologies have been developed. In general, according to the number of power conversion stages, SST topologies are categorized as single-stage or multi-stage. Multilevel isolated converters typically include an AC-DC rectifier, an HF DC-DC stage, and a DC-AC inverter. These stages are decoupled by a DC-link featuring substantial energy storage elements, which can achieve superior controllability and provide a dedicated DC interface. However, the increased number of stages introduces additional control complexity and reduces power transmission efficiency. And the bulky energy storage elements, such as the DC-link electrolytic capacitors for energy buffering, lead to reduced power density and reliability [8]. In contrast, single-stage isolated AC-AC converters eliminate bulky energy storage components by employing a direct single-stage AC-AC power conversion approach [9]. In single-phase SST systems, the voltage across the energy storage capacitor generally contains a second-order ripple component at twice the line frequency [10].

To further reduce switching loss, soft switching converter topologies are often introduced into single-stage AC-AC SSTs, including the dual active bridge (DAB) converter [11] and resonant converter [12]. DAB-based direct isolated converters are introduced to realize single-phase AC-AC conversion, inheriting the advantages of zero-voltage switching (ZVS) operation and a wide range of output voltages [13,14]. A single-stage matrix-type SST integrates interleaved totem-pole and DAB, reducing switches and achieving ZVS, high density, and improved reliability [15]. The work in [16] proposed a single-phase AC-AC converter topology centered on an LLC resonant converter. In this design, soft switching on both sides of the transformer is achieved by operating near its resonant frequency. The study in [17] presented a series resonant converters operating as DC transformers (DCXs), which achieve ZVS under light load conditions, with efficiencies exceeding 98%. In [18], modular medium-voltage AC-DC converters utilizing natural voltage balancing without DC-link capacitors notably improve system reliability and power density. Furthermore, [19] proposed a single-stage matrix-type SST incorporating an LLC resonant converter, along with its corresponding modulation and control strategies, in which appropriate dead times are inserted in the HF bridge arms to achieve zero-voltage turn-on for both primary-side and secondary-side switches.

This work introduces a single-phase matrix-based AC-AC SST that eliminates large electrolytic capacitors. The design aims to address key limitations related to bulky energy storage components and dual LF power pulsation. The proposed SST consists of an LF rectifier, an HB LLC resonant converter operating at an established switching frequency, a buck–boost converter, and an LF inverter. The HB LLC resonant converter, which operates near its resonant frequency and maintains unity voltage gain, functions as an HF isolated DCX. Meanwhile, the buck–boost converter ensures accurate regulation of the AC output voltage. Although the HB structure results in a doubled resonant current, it decreases the number of required switching and driving components, leading to cost savings and improved power density.

The remainder of this paper is structured as follows. The topology and operating principles of the proposed SST are detailed in Section 2. The ZVS and control strategy of the proposed SST are analyzed in Section 3. The experimental verification of the presented topology and the methodology are provided in Section 4. Finally, Section 5 concludes the paper.

2. Topology and Operating Principles

2.1. Topology

The topology of the proposed SST is illustrated in Figure 1. It comprises four main sections arranged from left to right: a grid-side rectifier, an HB LLC resonant converter, a buck–boost converter, and a load-side inverter. The grid-side rectifier consists of a full-bridge circuit, an input filter inductor (L_i), and two filter capacitors (C₁ and C₂). L_i is incorporated to suppress sudden changes in the grid-side current and improve the power factor of the system. The HB LLC resonant converter consists of a primary-side HB circuit, a secondary-side HB circuit, a resonant capacitor (C_r), a resonant inductor (L_r), a magnetizing inductor (L_m), an HF isolated transformer (T) featuring an n:1 turns ratio, primary-side capacitors (C₁ and C₂), and secondary-side capacitors (C₃ and C₄). The design employs the existing filter capacitors from the input rectifier to serve as the primary-side capacitors in the HB LLC stage. Furthermore, it achieves integration of the resonant (L_r) and magnetizing (L_m) inductors within the transformer (T). The HB LLC resonant converter can enable ZVS and achieve high efficiency. Thus, it is adopted to implement the DCX function. In addition, the buck–boost converter can serve as the post-regulator for output voltage control. L_b is the key component performing both step-up and step-down voltage conversion. The load-side inverter consists of a full-bridge circuit and an output filter capacitor (C₅). C₅ is repurposed as the filter capacitor for the buck–boost converter. And the entire system integrates 14 MOSFETs in total. The switches in the rectifier and inverter (S₁–S₄ and S₁₁–S₁₄) switch at line frequency. In contrast, the switches in the HB LLC resonant converter and buck–boost converter (S₅–S₈ and S₉–S₁₀) switch at high frequency.

The presented SST has the following advantages. The DC-link voltages on both the primary and secondary sides of its HB LLC resonant converter are time-varying absolute values of the sinusoidal voltages, and the large energy storage components typically required in conventional intermediate DC stages are eliminated. C₁, C₂, C₃, and C₄ are small film capacitors, which improve the power density and extend the lifespan of the converter. As a result, the removal of electrolytic capacitors enhances the system reliability and power density. In addition, it enables effective balancing of instantaneous input/output power and mitigates the ripple power at twice the line frequency.

2.2. Operating Principles

The operating principle of the SST is analyzed below. Synchronized with the input voltage polarity, the grid-side and load-side full-bridge circuits perform LF commutation. Thus, the switches S₁–S₄ and S₁₁–S₁₄ in the rectifier and inverter commutate at LF. When u_i > 0, switches S₁, S₄, S₁₁, and S₁₄ are in the on-state, with S₂, S₃, S₁₂, and S₁₃ kept in the off-state. When u_i < 0, the switching states are reversed. The rectifier converts the single-phase sinusoidal voltage (u_i) at the grid side into a sinusoidal absolute-value voltage (u_dc1) at the primary-side DC-link, and the inverter converts the sinusoidal absolute-value voltage (u_b) into a single-phase sinusoidal voltage (u_o) at the load side. With a fixed 50% duty cycle and operation near resonance, switches S₅–S₈ of the HB LLC resonant converter are controlled in a complementary manner, alternating conduction between S₅, S₇ and S₆, S₈. This generates an AC square-wave voltage (u_pr) in the series resonant tank, which possesses a sinusoidal envelope. The resulting resonant current consequently displays a similar sinusoidal envelope. This process ensures that a unity voltage gain is maintained across the primary and secondary sides of the HB LLC resonant converter. The buck–boost converter offers independent voltage step-up and step-down capability. This enables the system to maintain stable and high-quality AC output under wide input voltage variations. And it allows precise control of the output voltage, which enhances system dynamics and simplifies control design. In order to control the output voltage, the switches S₉ and S₁₀ are driven with a defined duty cycle value in an alternating manner to regulate the secondary-side DC-link voltage (u_dc2). And the duty cycle is adjusted according to the required step-up or step-down operation. Since the resonant stage provides unity gain at a fixed frequency, the system’s voltage gain is mainly determined by the buck–boost converter. Defining d_b as the duty cycle of switch S₉, the steady-state output voltage can be determined as

$$u_o=u_{dc2}{\displaystyle \frac{d_b}{1-d_b}}=u_{dc1}{\displaystyle \frac{d_b}{n(1-d_b)}}=\left|u_i\right|{\displaystyle \frac{d_b}{n(1-d_b)}}$$

(1)

where n is the transformer ratio. Figure 2 illustrates the main operational waveforms of the presented SST.

The HB LLC resonant circuit reduces switching losses and enhances power conversion efficiency by achieving ZVS. This converter topology features two distinct resonant frequencies. The primary one (f_r) is defined by the resonant inductor (L_r) and capacitor (C_r). A second one (f_m) is governed by the path containing the magnetizing inductor (L_m) of the transformer.

$$f_r={\displaystyle \frac{1}{2\pi \sqrt{L_r{C}_r}}}$$

(2)

$$f_m={\displaystyle \frac{1}{2\pi \sqrt{(L_r+L_m)C_r}}}$$

(3)

When f_m < f_s < f_r, switches on both the primary and secondary sides are capable of attaining soft-switching conditions. For f_s > f_r, soft switching is confined to the primary-side switches. Therefore, the switching frequency (f_s) for the resonant converter in this SST design is selected to be slightly lower than the resonant frequency (f_r) but higher than f_m.

3. ZVS Analysis and Control Scheme of the Proposed SST

3.1. ZVS Analysis

To improve converter efficiency, it is important to reduce switching losses. An effective method for achieving this is the implementation of ZVS. If the drain-source voltage (u_ds) of the switching device falls to zero before the gate-source voltage (u_gs) begins to rise, the voltage and current waveforms will not overlap during turn-on. Under this condition, the turn-on switching loss is effectively eliminated, realizing ZVS turn-on.

To achieve ZVS turn-on for switches S₅–S₈ during the dead time in actual operation, a necessary condition must be satisfied wherein the magnetizing current must be sufficient to discharge the output capacitance (C_oss) of the corresponding switch to zero. Therefore, a relatively large magnetizing current (I_m) facilitates the realization of ZVS. Considering that the dead time is sufficiently short and that the switching frequency (f_s) is significantly higher than the line frequency (f_i), the magnetizing inductor current can be approximated as varying linearly within each half-switching interval. The magnetizing current (I_m) can thus be approximated described as

$$I_m={\displaystyle \frac{U_{im}\left|\sin \left({\omega }_{i}t\right)\right|}{8Lm f_s}}$$

(4)

where U_im is the amplitude of the input voltage and w_i is the angular frequency of the input voltage.

Considering the charge/discharge characteristics and charge equilibrium of the junction capacitance, the following condition must be satisfied:

$$I_m{T}_d={\displaystyle \frac{U_{im}\left|\sin \left({\omega }_{i}t\right)\right|}{8Lm f_s}}{T}_d\ge 2C_{oss}{U}_{im}\left|\sin ({\omega }_{i}t)\right|$$

(5)

where T_d is the dead time of the switching device’s drive signals.

The ZVS condition for the converter can be derived as

$$T_d\ge 16C_{oss}Lm f_s$$

(6)

Therefore, the switching frequency, magnetizing inductance, and primary-side dead time must be properly designed to ensure ZVS operation of the primary and secondary sides across the entire input voltage range.

3.2. Control Scheme

The converter’s control objective is to produce a sinusoidal output voltage waveform with a controllable amplitude. The LF commutated inverter only performs LF commutation of the sinusoidal absolute-value voltage generated by the buck–boost converter. Therefore, it is sufficient to regulate the magnitude of sinusoidal absolute-value voltage present at the buck–boost converter output. The control strategy ensures high gain at low frequencies for steady-state accuracy, moderate gain at mid frequencies for dynamic response, and rapid gain attenuation at high frequencies to enhance noise immunity.

For accurate voltage and current control in SST systems, real-time grid phase estimation is essential. Accordingly, a phase-locked loop (PLL) is implemented to maintain synchronization with the grid. The overall voltage gain of the presented SST is governed by the resonant and buck–boost stages.

Figure 3 is a schematic diagram of the converter system control. The PLL extracts the grid phase angle (θ) to generate the reference voltage waveform u_oref = U_mrefcosθ. After the absolute value operation, the reference signal is compared with the measured output voltage magnitude. The resulting error signal is fed into a PI controller and compensator (G_ud(s)) to obtain the control signal (u_b). This signal determines the duty ratio (d_b) of the buck–boost converter for output regulation. The gating logic circuit generates PWM signals for all switches according to the input voltage polarity and control signal (d_b). The rectifier and inverter bridge switches (S₁–S₄ and S₁₁–S₁₄) operate with LF commutation, while the switches (S₅–S₁₀) are driven by the modulation signal. Dead-band circuits are implemented to ensure safe commutation and stable operation of the system.

4. Experimental Verification

In order to validate the effectiveness of the proposed converter, a 1 kW test setup was designed, as shown in Figure 4. The rated input voltage and rated output voltage are both specified as 220 Vrms. The DSP TMS320F28069 from Texas Instruments (Dallas, TX, USA) was selected as the main control chip. The waveforms were measured by an oscilloscope of the model RTM3004 produced by Rohde & Schwarz (Munich, Germany). The voltage waveforms were measured by a high-voltage isolation probe, RT-ZD01 from Rohde & Schwarz, while the current was tested by a current probe of the model TCP2020 from Tektronix Inc. (Beaverton, OR, USA). The load was composed of two sets of 100 ohm and 1000 W resistors for dynamic testing. All 14 active switches employed the MOSFET model FCH072N60F from ON Semiconductor (Phoenix, AZ, USA). After comprehensive consideration, the main circuit parameters are stated in

Table 1. Main circuit parameters of the experimental prototype.

Parameters	Value
Input voltage, ui	220 Vrms
Input frequency, fi	50 Hz
Output voltage, uo	220 Vrms
Output frequency, fo	50 Hz
Turns ratio, n	1
Capacitors, C1 and C2	5.4 μF
Capacitors, C3 and C4	5.4 μF
Capacitor, Cr	0.9 μF
Inductor, Li	220 μH
Inductor, Lr	6.4 μH
Inductor, Lm	320 μH
Inductor, Lb	470 μH
LLC frequency, fs	65 kHz
Buck–boost frequency, fb	20 kHz
Power rating	1 kW

. And the information on the magnetic components is summarized in

Table 2. Information related to the magnetic components.

Item	Transformer, T	Inductor, Lb	Inductor, Li
Magnetic core	PQ5050	NPS200060	NPF157060
Core material	Mn-Zn power ferrite PC95	Iron–silicon–aluminum	Iron–silicon
Core effective volume	37,200 mm3	15,929 mm3	10,549 mm3
Winding material	Litz wire	Enameled copper wire	Enameled copper wire
Winding diameter	0.1 × 220/2.08 mm	1.6 mm	1.4 mm
Manufacturer	LINHYAN (Wuxi, China)	POCO (Shenzhen, China)	POCO (Shenzhen, China)

.

Figure 5a shows the waveforms of the input voltage (u_i), input current (i_i), output voltage (u_o), and output current (i_o). And the total harmonic distortion (THD) values for the input and output current waveforms are 3.04% and 1.44%, respectively. Figure 5b presents the experimental waveforms under the half-load operating condition. And the THD values for the input and output current waveforms are 4.08% and 2.24%, respectively. As can be observed, both the input current and the output current exhibit the desired sinusoidal characteristics. The input current maintains phase alignment with the input voltage, while the output voltage maintains precise tracking of its reference. From Figure 5, it can be verified that the converter possesses the capability of generating sinusoidal input along with a regulated output.

Thermal measurements were carried out under full-load operation after the system reached a steady-state temperature. The test was conducted in a laboratory environment with an ambient temperature of 22 °C, and a FLUKE thermal imager was used to capture the temperature distribution. The primary heat source was concentrated in the switching device areas. Specifically, the high-frequency switching devices, such as those used in the LLC resonant converter and the buck–boost converter, reached a maximum temperature of 61.8 °C, representing a temperature rise of 39.8 °C. In contrast, the line-frequency switching devices operated at a significantly lower temperature of 39.5 °C, corresponding to a temperature rise of 17.5 °C. In summary, the converter’s thermal design is adequate, with all temperatures within safe limits.

The steady-state performance of the HB LLC resonant converter under rated conditions is illustrated in Figure 6. In Figure 6a, u_dc1 and u_dc2 are the voltages across the primary-side and secondary-side DC-link capacitors, while i_pr is the primary-side resonant current and u_se is the secondary-side voltage of the HF transformer. u_dc1 and u_dc2 exhibit sinusoidal absolute-value waveforms, and i_pr and u_se are HF AC signals with sinusoidal envelopes. Figure 6b gives an enlarged view near the voltage peak. By allowing for the use of compact film capacitors in place of bulky electrolytic ones, the proposed design improves the overall power density. Moreover, it successfully mitigates the characteristic dual LF power pulsation inherent to conventional HF schemes.

Figure 7a,b show the ZVS waveforms of the switches S₅–S₈ under the rated operating condition: Figure 7a presents the drain-source voltage (u_{ds_S5}, u_{ds_S6}) and gate-source voltage (u_{gs_S5}, u_{gs_S6}) of the primary-side switch (S₅, S₆), while Figure 7b illustrates the drain-source voltage (u_{ds_S7}, u_{ds_S8}) and gate-source voltage (u_{gs_S7}, u_{gs_S8}) of the secondary-side switch (S₇, S₈). Figure 7c,d present a magnified view of Figure 7a,b near the voltage peak, respectively. As can be observed, for both the primary-side and secondary-side HF switches, the attainment of ZVS for all switches in the HB LLC resonant converter is verified by the timing relationship in which the gate-source voltage rise is delayed relative to the drain-source voltage fall.

Figure 8 and Figure 9 show the dynamic experimental waveforms of the proposed SST. As demonstrated in Figure 8a, when the grid voltage drops from 220 Vrms to 200 Vrms, the input current increases and stabilizes rapidly, while the output voltage maintains regulated operation. Conversely, Figure 8b illustrates the system behavior during a voltage swell from 220 Vrms to 240 Vrms, where the input current decreases and quickly settles, with the output voltage continuing to track its reference. Figure 9 shows that the output power increased from 500 W to 1000 W and then returned to 500 W. It can be concluded that the system offers robust output performance, effective adjustability, and reliable stability.

To evaluate the converter’s efficiency, measurements were taken with a HIOKI 3390 power analyzer from HIOKI E.E. Corporation (Nagano, Japan). The resulting efficiency curve is plotted in Figure 10, showing a peak value of 94.1% at the rated load. As can be observed, the proposed SST achieves a significantly higher efficiency compared with the SST topology reported in [15].

The performance of the proposed topology was compared with other AC–AC converter structures reported in [13,15,20], as summarized in

Table 3. Comparative analysis of performance with existing AC-AC converters.

Parameters	This Work	[15]	[13]	[20]
Switches	14	14	16	12
Input filter inductor	220 μH	800 μH	900 μH	500 μH
DC-link capacitor	Film capacitor (5.4 μF)	Film capacitor (1 μF)	Film capacitor (3 μF)	Electrolytic capacitor
Efficiency	94.1%	93.3%	92.9%	92.8%
MOSFETs	FCH072N60F, 600 V, 52 A, 72 mΩ	FCH072N60F, 600 V, 52 A, 72 mΩ	STD8NM60ND, 600 V, 7 A, 590 mΩ	C2M0040120D, 1200 V, 36 A, 80 mΩ
Transformer frequency	65 kHz	100 kHz	10 kHz	100 kHz
Power rating	1 kW	2 kW	20 kW	1 kW

. The proposed SST employs 14 switches, similar to [15], but fewer than the 16 switches used in [13], which simplifies the circuit configuration and reduces the switching loss. With an input filter inductor of only 220 μH, which is significantly smaller than those used in [13,15], the proposed design effectively reduces the magnetic component volume and enhances the dynamic response. Unlike [20], which adopts electrolytic capacitors as the DC-link energy buffer, the proposed topology utilizes small film capacitors, which improves reliability and lifespan and eliminates the degradation issues of electrolytic capacitors. Although the proposed SST operates at a moderate transformer frequency of 65 kHz compared with the 100 kHz converters in [15,20], it still achieves a higher efficiency of 94.1%, demonstrating excellent soft-switching performance and reduced conduction loss. Furthermore, the use of FCH072N60F MOSFETs with low on-resistance ensures compactness and thermal stability. Overall, the proposed converter achieves a good balance between efficiency, component count, and power density, featuring reduced passive components and enhanced system reliability.

5. Conclusions

A single-phase AC-AC SST based on a matrix configuration was proposed in this paper. The major contributions are as follows. First, by employing a structure with small film capacitors on both primary and secondary DC-links, the converter’s power density is significantly improved and its lifespan is extended. Second, all switches in the HB LLC resonant converter achieve ZVS under a variable DC-link voltage, which reduces switching loss and enhances the conversion efficiency of the converter. In addition, the matrix configuration inherently suppresses double LF power pulsation and realizes power factor correction without auxiliary control circuitry. Meanwhile, the buck–boost converter enables stable and high-quality AC output under wide input voltage variations. Experimental results demonstrate that the converter operates properly, and the feasibility and practical value of the proposed approach are validated. With these advantages, the converter makes an ideal solution for modern power systems, such as smart grids, distribution networks, and microgrids. However, the proposed PET topology offers limited power density improvement due to its multiple discrete passive components. Future work should focus on integrating magnetic elements to achieve a more compact and higher-performance design.