Search Results (72)

Silicon carbide (SiC) power converters are increasingly used in automotive, renewable energy, and industrial applications. While reliability assessments are typically performed at either the device or system level, an integrative approach that simultaneously evaluates both levels remains underexplored. This article presents a novel system-level simulation method with two strategies to evaluate the reliability of power devices and a resonant converter under varying temperatures and total ionizing doses (TIDs). Temperature-sensitive electrical parameters (TSEPs), such as on-state resistance ($R_{\mathrm{ON}}$) and threshold voltage shift ($\Delta V_{\mathrm{TH}}$), are calibrated and analyzed using a B1505A curve tracer. These parameters are incorporated into the system-level simulation of a 300 W resonant converter with a boosting cell. Both Silicon (Si) and SiC-based power resonant converters are assessed for power application in space engineering and harsh environments. Additionally, gate-oxide degradation and $\Delta V_{\mathrm{TH}}$-related issues are discussed based on the simulation results. The thermal-strategy results indicate that SiC MOSFETs maintain a more stable conduction loss at elevated temperatures, exhibiting higher reliability due to their high thermal conductivity. Conversely, increased TIDs result in a negative shift in conduction losses across all SiC devices under the radiation strategy, affecting the long-term reliability of the power converter. Full article

This paper focuses on FinFET transistors. The degradation characteristics of FinFET devices after total ionizing dose (TID) radiation in low-temperature environments were investigated by means of a combination of experiments and TCAD simulations. By analyzing the electronic properties of radiation-induced defects in FinFET transistors under low-temperature conditions, the formation and evolution mechanisms of these defects are studied. A physical model for the low-temperature total dose effects of FinFET transistors is established, providing support for the radiation hardening and space applications of FinFET devices. Full article

It is well known that the space radiation environment, which has contributions from the trapped particles within the Van Allen belts, solar energetic particles (SEPs) and galactic cosmic rays (GCRs), directly influences space systems. These systems rely on complex and fragile electronic devices, whose performance can be degraded because of the action of the radiation and its related phenomena: single-event effects (SEEs), displacement damages (DDs) and total ionizing dose (TID). This could cause failures to arise through various mechanisms, ranging from parametric drift failures, such as leakage current and threshold voltage, among others, to destructive effects, like single-event burnout (SEB) or single-event latch-up (SEL). These failures in electronics affect the system’s reliability and its performance, which could compromise the mission’s success. Considering this, the main objective of the SRPROTEC project is to develop and validate new composite materials with better shielding performance against space radiation to increase the radiation tolerance of microelectronic devices encapsulated with these materials. For this purpose, three composites will be synthesized using a liquid epoxy resin filled with silica as a matrix mixed in different proportions, with a high-Z filler. The presence of low-Z elements from the high hydrogen content in the polymer and the presence of high-Z fillers are expected to produce a material with good radiation shielding properties. The developed materials will be exhaustively characterized, subjecting the three composites and control samples to rheological outgassing; gamma radiation shielding; and thermal, electrical, thermomechanical and moisture absorption, among other tests. Finally, the composite with the best performance will be selected and subjected to degradation tests (thermal cycling in vacuum, thermal cycling, thermal shock and relative humidity tests) to determine its suitability for space packaging applications. Full article

A 10 × 10 µm² radiation-tolerant voltage-domain global shutter pixel with radiation-hardened by design (RHBD) device modification is developed to operate under high ionizing-dose rates and high total ionizing-dose (TID) levels. Therefore, a modified NMOS transistor layout is used in the pixel to achieve radiation hardness. The pixel design is demonstrated to operate up to 1 MGy or 100 Mrad (SiO₂) TID with minimal degradation. The global shutter pixel also includes correlated double sampling (CDS) to reduce noise and the impact of the collected carriers generated by the flux of gamma or X-ray radiation. Combined with an external flash, global shutter operation allows short exposures, which limits the impact of radiation on dark current and dynamic range. The pixel is designed using 180 nm CMOS Image Sensor (CIS) technology. Full article

This paper presents a radiation-hardened 4-bit flash analog-to-digital converter (ADC) implemented in a 22 nm fully depleted silicon-on-insulator (FD-SOI) process for high-reliability applications in radiation environments. To improve single-event upsets (SEU) tolerance, the design introduces a compact fault-tolerant logic scheme based on Dual Modular Redundancy (DMR), offering reliability comparable to Triple Modular Redundancy (TMR) while using two storage nodes instead of three, and a simple XOR-based check in place of a majority voter. A distributed sampling architecture mitigates SEU vulnerabilities in the input path, while thin-oxide devices are used in analog-critical circuits to enhance total ionizing dose (TID) resilience. Post-layout simulations demonstrate SEU detection within 200 ps and correction within ~600 ps. The ADC achieves an active area of 0.089 mm², power consumption below 30 µW, and provides a scalable solution for radiation-tolerant data acquisition in aerospace and other high-reliability systems. Full article

This study aims to evaluate the effects of total ionizing dose (TID) radiation on the performance of n−MOSFET current mirrors. We propose an ovel experimental approach to analyze the interaction between charge trapping in the MOSFET gate oxide and the resulting current mirror degradation by subjecting devices to TID doses from 50 krad(Si) to 300 krad(Si) using a 60Co gamma source Experimental data show that threshold voltage shifts by up to 1.31 V and transconductance increases by 27%. This degradation leads to this a reduction of more than 10% in current mirror output accuracy occurs at the highest dose. These quantitative criteria establish a clear benchmark for assessing the impact of TID on current mirror performance. These effects are attributed to positive charge trapping in the gate oxide and at the Si–SiO₂ interface induced by ionizing radiation. This study focuses exclusively on radiation effects; electrical stress phenomena such as over−voltage or electrostatic discharge (ESD) are not addressed. The results highlight the critical importance of accounting for TID effects when designing high−performance n−MOSFET current mirrors for radiation−hardened applications. Full article

This study systematically investigates the mechanism by which total ionizing dose (TID) affects the lifetime degradation of NMOS devices induced by hot-carrier injection (HCI). Experiments involved Cobalt-60 (Co-60) gamma-ray irradiation to a cumulative dose of 500 krad (Si), followed by 168 h annealing at 100 °C to simulate long-term stability. However, under HCI stress conditions (V_D = 2.7 V, V_G = 1.8 V), irradiated devices show a 6.93% increase in threshold voltage shift (ΔV_th) compared to non-irradiated counterparts. According to the IEC 62416 standard, the lifetime degradation of irradiated devices induced by HCI stress is only 65% of that of non-irradiated devices. Conversely, when the saturation drain current (I_Dsat) degrades by 10%, the lifetime doubles compared to non-irradiated counterparts. Mechanistic analysis demonstrates that partial neutralization of E’ center positive charges at the gate oxide interface by hot electrons weakens the electric field shielding effect, accelerating ΔV_th drift, while interface trap charges contribute minimally to degradation due to annealing-induced self-healing. The saturation drain current shift degradation primarily correlates with electron mobility variations. This work elucidates the multi-physics mechanisms through which TID impacts device reliability and provides critical insights for radiation-hardened design optimization. Full article

The impacts of total ionizing dose (TID) were investigated in 28 nm 3D charge trapping (CT) NAND Flash memories. This study focused on the variations in the raw bit error rate (RBER) of irradiated flash across different operational modes and bias states. It was observed that the data pattern stored in Flash influences the bit error count after irradiation. The experimental findings demonstrated a dose-dependent relationship with standby current, read operation current, and threshold voltage shifts. Additionally, TID was found to affect the time required for erasure and programming operations. These results were then bench-marked against similar NAND Flash devices, revealing superior resistance to TID effects. Full article

In this paper, the degradation mechanism of the RF performance of 22 nm fully depleted (FD) silicon-on-insulator nMOSFETs at different total ionizing dose levels has been investigated. The RF figures of merit (the cut-off frequency f_T, maximum oscillation frequency f_max) show significant degradation of approximately 14.1% and 6.8%, respectively. The variation of the small-signal parameters (output conductance (g_ds), transconductance (g_m), reflection coefficient (|Γ_in|), and capacitance (C_gg)) at different TID levels has been discussed. TID-induced trapped charges in the gate oxide and buried oxide increase the vertical channel field, which leads to more complex degradation of small-signal parameters across a wide frequency range. Full article

This manuscript focuses on studying the radiation response of the Commercial-off-the-shelf (COTS) AD524CDZ operational amplifier. Total Ionizing Dose (TID) effects were tested using low-dose ⁶⁰Co irradiation. Single-Event Effect (SEE) sensitivity was studied on this operational amplifier using a 105 MeV proton beam. Additionally, further study of the SEE response was carried out using a Two-photon absorption laser to scan some sensitive sectors of the die. For this laser experiment, different gain setups and laser energies were employed to determine how the Single Event Transient (SET) response of the device was affected based on the test configuration. The results from the TID experiments revealed that the studied device remained functional after 100 krads (Si). Proton experiments revealed the studied device exhibited a high SET response with a maximum DC offset SET of about 1.5 V. Laser experiments demonstrated that there was a clear SET reduction when using 10× and 1000× gain setups. Full article

The working environment of electronic devices in the aerospace field is harsh. In order to ensure the reliable application of the SOI FinFET, the total ionizing dose (TID) and hot carrier injecting (HCI) reliability of an SOI FinFET were investigated in this study. First, the influence of TID on the device was simulated. The results show that TID causes the threshold voltage to decrease and the off-state current and subthreshold swing to increase. TID causes more damage to the device at high temperature and also reduces the saturation drain current of the device. HCI causes the device threshold voltage to increase and the saturation drain current to decrease. The HCI is more severe at high temperatures. Finally, the coupling effects of the two were simulated, and the results show that the two effects cancel each other out, and the degradation of various electrical characteristic parameters is different under different coupling modes. Full article

The exposure of spaceborne devices to high-energy charged particles in space results in the occurrence of both a total ionizing dose (TID) and the single-event effect (SEE). These phenomena present significant challenges for the reliable operation of spacecraft and satellites. The rapid advancement of semiconductor fabrication processes and the continuous reduction in device feature size have led to an increase in the significance of the synergistic effects of TID and SEE in static random access memory (SRAM). In order to elucidate the involved physical mechanisms, the synergistic effects of TID and single-event upset (SEU) in a new kind of 130 nm 7T silicon-on-insulator (SOI) SRAM were investigated by means of cobalt-60 gamma-ray and heavy ion irradiation experiments. The findings demonstrate that 7T SOI SRAM is capable of maintaining normal reading and writing functionality when subjected to TID irradiation at a total dose of up to 750 krad(Si). In general, the TID was observed to reduce the SEU cross-section of the 7T SOI SRAM. However, the extent of this reduction was influenced by the heavy ion LET value and the specific writing data pattern employed. Based on the available evidence, it can be proposed that TID preirradiation represents a promising avenue for enhancing the resilience of 7T SOI SRAMs to SEU. Full article

This paper investigates the temperature-dependent effects of gamma-ray irradiation on β-Ga₂O₃ vertical Schottky barrier diodes (SBDs) under a 100 V reverse bias condition at a total dose of 1 Mrad(Si). As the irradiation dose increased, the radiation damage became more severe. The total ionizing dose (TID) degradation behavior and mechanisms were evaluated through DC, capacitance–voltage (C-V), and low-frequency noise (LFN) measurements by varying irradiation, and the test results indicated that TID effects introduced interface defects and altered the carrier concentration within the material. The impact of TID effects was more pronounced at lower temperatures compared to higher temperatures. Additionally, the annealing effect in the high-temperature experimental conditions ameliorated the growth of interface trap defects caused by irradiation. These results suggest that compared to low-temperature testing, the device exhibits higher TID tolerance after high-temperature exposure, providing valuable insights for in-depth radiation reliability studies on subsequent related devices. Full article

The coupling effect of negative bias temperature instability (NBTI) and total ionizing dose (TID) was investigated by simulation based on the fully depleted silicon on insulator (FDSOI) PMOS. After simulating the situation of irradiation after NBT stress, it was found that the NBTI effect weakens the threshold degradation of FDSOI PMOS under irradiation. Afterward, NBT stress was decomposed into high gate voltage stress and high-temperature stress, which was applied to the device simultaneously with irradiation. The devices under high gate voltage exhibited more severe threshold voltage degradation after irradiation compared to those under low gate voltage. Devices at high temperatures also exhibit more severe threshold degradation after irradiation compared to devices under low temperatures. Finally, the simultaneous effect of high gate voltage, high temperature, and irradiation on the device was investigated, which fully demonstrated the impact of the NBT stress on the TID effect, resulting in far more severe threshold voltage degradation. Full article

In this study, the degradation characteristics of radio frequency (RF)-low-noise amplifiers (LNA) due to a total ionizing dose (TID) is investigated. As a device-under-test (DUT), sample LNAs were prepared using silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) as core elements. The LNA was based on a cascode stage with emitter degeneration for narrowband applications. By using a simplified small-signal model of a SiGe HBT, design equations such as gain, impedance matching, and noise figure (NF) were derived for analyzing TID-induced degradations in the circuit-level performance. To study radiation effects in circuits, the SiGe-RF-LNAs fabricated in a commercial 350 nm SiGe technology were exposed to 10-keV X-rays to a total ionizing dose of up to 3 Mrad(SiO₂). The TID-induced performance changes of the LNA were modeled by applying degradation to device parameters. In the modeling process, new parameter values after irradiation were estimated based on information in the literature, without direct measurements of SiGe HBTs used in the LNA chip. As a result, the relative contributions of parameters on the circuit metrics were compared, identifying dominant parameters for degradation modeling. For the TID effects on input matching (S₁₁) and NF, the base resistance (R_B) and the base-to-emitter capacitance (C_π) of the input transistor were mostly responsible, whereas the transconductances (g_m) played a key role in the output matching (S₂₂) and gain (S₂₁). To validate the proposed approach, it has been applied to a different LNA in the literature and the modeling results predicted the TID-induced degradations within reasonable ranges. Full article